[gcc(refs/vendors/ibm/heads/mmaplus)] MMA+: Add initial support for some MMA+ built-ins

https://gcc.gnu.org/g:50679b8dc0805a7c628962bef50b40b9ace33d06 commit 50679b8dc0805a7c628962bef50b40b9ace33d06 Author: Peter Bergner Date: Thu May 1 17:49:03 2025 -0500 MMA+: Add initial support for some MMA+ built-ins Add support for MMA+ built-ins __builtin_mma_dmmr, __builtin_m

[gcc(refs/vendors/ibm/heads/mmaplus)] MMA+: Update mma_assemble_acc for DMF

https://gcc.gnu.org/g:aae6bc2b309f16bfdf512f87e00af10349274c71 commit aae6bc2b309f16bfdf512f87e00af10349274c71 Author: Peter Bergner Date: Fri Apr 25 16:43:34 2025 -0500 MMA+: Update mma_assemble_acc for DMF Diff: --- gcc/config/rs6000/mma.md | 33 - 1 fil

[gcc(refs/vendors/ibm/heads/mmaplus)] MMA+: Remove unneeded mma_xxsetaccz define_expand

https://gcc.gnu.org/g:4c9dc6b25cdb1498635d0be9a279fda05da699da commit 4c9dc6b25cdb1498635d0be9a279fda05da699da Author: Peter Bergner Date: Fri Apr 25 16:47:45 2025 -0500 MMA+: Remove unneeded mma_xxsetaccz define_expand Diff: --- gcc/config/rs6000/mma.md | 19 --- 1 file

[gcc(refs/vendors/ibm/heads/mmaplus)] MMA+: Fix mma.md whitespace

https://gcc.gnu.org/g:692dbe94ad697119f17cfcc6ea86a7bdba747b5f commit 692dbe94ad697119f17cfcc6ea86a7bdba747b5f Author: Peter Bergner Date: Fri Apr 25 14:46:42 2025 -0500 MMA+: Fix mma.md whitespace Diff: --- gcc/config/rs6000/mma.md | 40 1 file c

[gcc(refs/vendors/ibm/heads/mmaplus)] MMA+: Fix up MMA+ constraint and predicate usage

https://gcc.gnu.org/g:a456fc556e2b9a8653ec04bba0e230b076d376ae commit a456fc556e2b9a8653ec04bba0e230b076d376ae Author: Peter Bergner Date: Fri Apr 25 14:31:20 2025 -0500 MMA+: Fix up MMA+ constraint and predicate usage Replace all mma.md "d" constraints with the new "wD" constrain

[gcc(refs/vendors/ibm/heads/mmaplus)] MMA+: Remove unneeded vsx_assemble_pair define_expand

https://gcc.gnu.org/g:387911c08004aab826812e5b9d058a82f9c2733c commit 387911c08004aab826812e5b9d058a82f9c2733c Author: Peter Bergner Date: Fri Apr 25 13:34:46 2025 -0500 MMA+: Remove unneeded vsx_assemble_pair define_expand Diff: --- gcc/config/rs6000/mma.md | 15 +-- 1 file

[gcc(refs/vendors/ibm/heads/mmaplus)] MMA+: Fix TARGET_DENSE_MATH usage

https://gcc.gnu.org/g:213136a56382d41afbdea35ec59a089552610db4 commit 213136a56382d41afbdea35ec59a089552610db4 Author: Peter Bergner Date: Fri Apr 25 13:19:12 2025 -0500 MMA+: Fix TARGET_DENSE_MATH usage Diff: --- gcc/config/rs6000/mma.md| 24 gcc/config/

[gcc(refs/vendors/ibm/heads/mmaplus)] rs6000: Disassemble opaque modes using subregs to allow optimizations [PR109116]

https://gcc.gnu.org/g:a7e4699f286e48b9de7b8c81542b0e6897df7c0a commit a7e4699f286e48b9de7b8c81542b0e6897df7c0a Author: Peter Bergner Date: Fri Jan 17 16:14:48 2025 -0500 rs6000: Disassemble opaque modes using subregs to allow optimizations [PR109116] PR109116 exposes an issue whe

[gcc] Created branch 'ibm/heads/peter-15-branch' in namespace 'refs/vendors'

The branch 'ibm/heads/peter-15-branch' was created in namespace 'refs/vendors' pointing to: c9d4d3ba15c5... testsuite: Force -mcmodel=small for gcc.target/aarch64/pr11

[gcc/ibm/heads/gcc-12-branch] (478 commits) ibm: Merge up to top of releases/gcc-12

The branch 'ibm/heads/gcc-12-branch' was updated to point to: 1d9871af38fe... ibm: Merge up to top of releases/gcc-12 It previously pointed to: 95d8973a6f8f... ibm: Merge up to top of releases/gcc-12 Diff: Summary of changes (added commits): --- 1d9871a...

[gcc(refs/vendors/ibm/heads/mmaplus)] Update ChangeLog.*

https://gcc.gnu.org/g:89c0f5b4778d7a65eb2448340642d842b23994f7 commit 89c0f5b4778d7a65eb2448340642d842b23994f7 Author: Michael Meissner Date: Tue Oct 22 17:55:58 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.mmaplus | 814 ++ 1 file

[gcc(refs/vendors/ibm/heads/mmaplus)] Update ChangeLog.*

https://gcc.gnu.org/g:5e032b1a1424bdd5c6657b545b4fd6b64edb0999 commit 5e032b1a1424bdd5c6657b545b4fd6b64edb0999 Author: Michael Meissner Date: Wed Nov 6 16:54:27 2024 -0500 Update ChangeLog.* Diff: --- gcc/ChangeLog.mmaplus | 13 + 1 file changed, 13 insertions(+) diff --git

[gcc(refs/vendors/ibm/heads/mmaplus)] Set default name to power8 if no --with-cpu.

https://gcc.gnu.org/g:596a6fa8f3aa19a98d5ea9726a11d19c9b0c1c58 commit 596a6fa8f3aa19a98d5ea9726a11d19c9b0c1c58 Author: Michael Meissner Date: Wed Nov 6 16:52:07 2024 -0500 Set default name to power8 if no --with-cpu. 2024-11-06 Michael Meissner gcc/ *

[gcc(refs/vendors/ibm/heads/mmaplus)] Revert changes

https://gcc.gnu.org/g:72fce80f31f4df84078284c077789067e579929b commit 72fce80f31f4df84078284c077789067e579929b Author: Michael Meissner Date: Tue Oct 22 17:51:04 2024 -0400 Revert changes Diff: --- gcc/config/rs6000/altivec.md | 14 gcc/config/rs6000/constraint

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2686-Add paddis support.

https://gcc.gnu.org/g:83a5d8b95e312f0c19998719dbe048d67fce3415 commit 83a5d8b95e312f0c19998719dbe048d67fce3415 Author: Michael Meissner Date: Tue Oct 22 17:01:20 2024 -0400 RFC2686-Add paddis support. 2024-10-22 Michael Meissner gcc/ * config/rs6000/co

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2677-Add xvrlw support.

https://gcc.gnu.org/g:904961a355ecae12ce801a7475b439d5e8ef1479 commit 904961a355ecae12ce801a7475b439d5e8ef1479 Author: Michael Meissner Date: Tue Oct 22 17:02:33 2024 -0400 RFC2677-Add xvrlw support. 2024-10-22 Michael Meissner gcc/ * config/rs6000/alt

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2655-Add saturating subtract built-ins.

https://gcc.gnu.org/g:56e6cba06a8f626faff300ffef89017977c27928 commit 56e6cba06a8f626faff300ffef89017977c27928 Author: Michael Meissner Date: Tue Oct 22 17:00:35 2024 -0400 RFC2655-Add saturating subtract built-ins. This patch adds support for a saturating subtract built-in functi

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2656-Support load/store vector with right length.

https://gcc.gnu.org/g:8a4e2eb426c73182fc91e5faef8f4d0f0a3f6122 commit 8a4e2eb426c73182fc91e5faef8f4d0f0a3f6122 Author: Michael Meissner Date: Tue Oct 22 16:59:43 2024 -0400 RFC2656-Support load/store vector with right length. This patch adds support for new instructions that may b

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-PowerPC: Add support for 1, 024 bit DMR registers.

https://gcc.gnu.org/g:453484d9b339d29b44323734f838bb8b301b085f commit 453484d9b339d29b44323734f838bb8b301b085f Author: Michael Meissner Date: Tue Oct 22 16:58:33 2024 -0400 RFC2653-PowerPC: Add support for 1,024 bit DMR registers. This patch is a prelimianry patch to add the full

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-PowerPC: Switch to dense math names for all MMA operations.

https://gcc.gnu.org/g:253c0abd46d96818f051ca6e7ae81983094abe6a commit 253c0abd46d96818f051ca6e7ae81983094abe6a Author: Michael Meissner Date: Tue Oct 22 16:57:05 2024 -0400 RFC2653-PowerPC: Switch to dense math names for all MMA operations. This patch changes the assembler instruc

[gcc(refs/vendors/ibm/heads/mmaplus)] Use vector pair load/store for memcpy with -mcpu=future

https://gcc.gnu.org/g:805a9d9c81d277706cc3a5e3270767d5f101aae6 commit 805a9d9c81d277706cc3a5e3270767d5f101aae6 Author: Michael Meissner Date: Tue Oct 22 16:54:35 2024 -0400 Use vector pair load/store for memcpy with -mcpu=future In the development for the power10 processor, GCC di

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-Add dense math test for new instruction names.

https://gcc.gnu.org/g:fa38ab238e9f5bb8a3ca3a13ac160734857440b1 commit fa38ab238e9f5bb8a3ca3a13ac160734857440b1 Author: Michael Meissner Date: Tue Oct 22 16:57:52 2024 -0400 RFC2653-Add dense math test for new instruction names. 2024-10-22 Michael Meissner gcc/testsuit

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-Add support for dense math registers.

https://gcc.gnu.org/g:07bd318f83e5b93fb487bd9e097124646eede5d1 commit 07bd318f83e5b93fb487bd9e097124646eede5d1 Author: Michael Meissner Date: Tue Oct 22 16:56:10 2024 -0400 RFC2653-Add support for dense math registers. The MMA subsystem added the notion of accumulator registers as

[gcc(refs/vendors/ibm/heads/mmaplus)] Add -mcpu=future tuning support.

https://gcc.gnu.org/g:4e5faa8611582139b33bab10f65a53fc8c58b385 commit 4e5faa8611582139b33bab10f65a53fc8c58b385 Author: Michael Meissner Date: Tue Oct 22 16:53:40 2024 -0400 Add -mcpu=future tuning support. This patch makes -mtune=future use the same tuning decision as -mtune=powe

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-Add wD constraint.

https://gcc.gnu.org/g:fdca7a07c697a45f4bf1d3969cd9902fe502b199 commit fdca7a07c697a45f4bf1d3969cd9902fe502b199 Author: Michael Meissner Date: Tue Oct 22 16:55:18 2024 -0400 RFC2653-Add wD constraint. This patch adds a new constraint ('wD') that matches the accumulator registers

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_MODULO to TARGET_POWER9

https://gcc.gnu.org/g:cff03e03f35f7e27538ccea63ce0773b9e641cc4 commit cff03e03f35f7e27538ccea63ce0773b9e641cc4 Author: Michael Meissner Date: Tue Oct 22 16:51:43 2024 -0400 Change TARGET_MODULO to TARGET_POWER9 As part of the architecture flags patches, this patch changes the use

[gcc(refs/vendors/ibm/heads/mmaplus)] Update tests to work with architecture flags changes.

https://gcc.gnu.org/g:133e2820bf27118f45a412e7588a44da767a2d02 commit 133e2820bf27118f45a412e7588a44da767a2d02 Author: Michael Meissner Date: Tue Oct 22 16:52:24 2024 -0400 Update tests to work with architecture flags changes. Two tests used -mvsx to raise the processor level to a

[gcc(refs/vendors/ibm/heads/mmaplus)] Add support for -mcpu=future

https://gcc.gnu.org/g:1fda538674d13775e58b900efe20d78d1b36e57a commit 1fda538674d13775e58b900efe20d78d1b36e57a Author: Michael Meissner Date: Tue Oct 22 16:53:04 2024 -0400 Add support for -mcpu=future This patch adds the support that can be used in developing GCC support for

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_POPCNTD to TARGET_POWER7

https://gcc.gnu.org/g:27c3e09525ae509dce78fcff423019a310116ad7 commit 27c3e09525ae509dce78fcff423019a310116ad7 Author: Michael Meissner Date: Tue Oct 22 16:50:48 2024 -0400 Change TARGET_POPCNTD to TARGET_POWER7 As part of the architecture flags patches, this patch changes the use

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_CMPB to TARGET_POWER6

https://gcc.gnu.org/g:a63f9e5522286c58ef1c502908892aa496e49cf7 commit a63f9e5522286c58ef1c502908892aa496e49cf7 Author: Michael Meissner Date: Tue Oct 22 16:49:52 2024 -0400 Change TARGET_CMPB to TARGET_POWER6 As part of the architecture flags patches, this patch changes the use of

[gcc(refs/vendors/ibm/heads/mmaplus)] Do not allow -mvsx to boost processor to power7.

https://gcc.gnu.org/g:b4bc2c4ae3e92cff696ca01979ccefb30d7f6694 commit b4bc2c4ae3e92cff696ca01979ccefb30d7f6694 Author: Michael Meissner Date: Tue Oct 22 16:42:11 2024 -0400 Do not allow -mvsx to boost processor to power7. This patch restructures the code so that -mvsx for example

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_FPRND to TARGET_POWER5X

https://gcc.gnu.org/g:f9667b2f18d9babc111b30b22fde2241125bcaf7 commit f9667b2f18d9babc111b30b22fde2241125bcaf7 Author: Michael Meissner Date: Tue Oct 22 16:48:59 2024 -0400 Change TARGET_FPRND to TARGET_POWER5X As part of the architecture flags patches, this patch changes the use

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_POPCNTB to TARGET_POWER5

https://gcc.gnu.org/g:baaf1472a8684897432a613dc530577e33efdf14 commit baaf1472a8684897432a613dc530577e33efdf14 Author: Michael Meissner Date: Tue Oct 22 16:48:20 2024 -0400 Change TARGET_POPCNTB to TARGET_POWER5 As part of the architecture flags patches, this patch changes the use

[gcc(refs/vendors/ibm/heads/mmaplus)] Add rs6000 architecture masks.

https://gcc.gnu.org/g:930ca76e5ab0497a82dbc1ffdb53a370c444b9a0 commit 930ca76e5ab0497a82dbc1ffdb53a370c444b9a0 Author: Michael Meissner Date: Tue Oct 22 16:40:13 2024 -0400 Add rs6000 architecture masks. This patch begins the journey to move architecture bits that are not user IS

[gcc(refs/vendors/ibm/heads/mmaplus)] Use architecture flags for defining _ARCH_PWR macros.

https://gcc.gnu.org/g:f09b1dd1d965ad3ab5886789f953baf4c8247a08 commit f09b1dd1d965ad3ab5886789f953baf4c8247a08 Author: Michael Meissner Date: Tue Oct 22 16:41:09 2024 -0400 Use architecture flags for defining _ARCH_PWR macros. For the newer architectures, this patch changes GCC to

[gcc(refs/vendors/ibm/heads/mmaplus)] Add ChangeLog.dmf and update REVISION.

https://gcc.gnu.org/g:4b6030cb0dccf0d2e079895fdd7d4068910adabd commit 4b6030cb0dccf0d2e079895fdd7d4068910adabd Author: Michael Meissner Date: Tue Oct 22 16:38:02 2024 -0400 Add ChangeLog.dmf and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chang

[gcc r15-9538] testsuite: Replace altivec vector attribute with generic equivalent [PR112822]

https://gcc.gnu.org/g:17c5ad25811a92c45083a0ad0b9c7e0d944c9521 commit r15-9538-g17c5ad25811a92c45083a0ad0b9c7e0d944c9521 Author: Peter Bergner Date: Wed Apr 16 21:48:59 2025 + testsuite: Replace altivec vector attribute with generic equivalent [PR112822] Usage of the altivec

[gcc r15-9188] rs6000: Add Cobol support to traceback table [PR119308]

https://gcc.gnu.org/g:c669ab0a866697577fec0c8c2e662640c4be4c94 commit r15-9188-gc669ab0a866697577fec0c8c2e662640c4be4c94 Author: Peter Bergner Date: Thu Apr 3 10:52:29 2025 -0500 rs6000: Add Cobol support to traceback table [PR119308] The AIX traceback table documentation states t

[gcc r15-7432] rs6000: Add cast to avoid pointer to integer comparison warning [PR117674]

https://gcc.gnu.org/g:c9b8a8fc55168ba9ec5432fc7b86621074e1b887 commit r15-7432-gc9b8a8fc55168ba9ec5432fc7b86621074e1b887 Author: Peter Bergner Date: Fri Feb 7 13:39:42 2025 -0600 rs6000: Add cast to avoid pointer to integer comparison warning [PR117674] 2025-02-07 Peter Bergner

[gcc r12-10930] rs6000: Fix ICE for invalid constants in built-in functions

https://gcc.gnu.org/g:4dbace39f1149984e6b85574d4665ce18240db8e commit r12-10930-g4dbace39f1149984e6b85574d4665ce18240db8e Author: Peter Bergner Date: Thu Jan 16 10:53:27 2025 -0600 rs6000: Fix ICE for invalid constants in built-in functions For invalid constant operand values used

[gcc r12-10929] rs6000: Fix loop limit for built-in constant checking

https://gcc.gnu.org/g:4e508cbb938a8936bc6aefd7823b55107aa4a7f9 commit r12-10929-g4e508cbb938a8936bc6aefd7823b55107aa4a7f9 Author: Peter Bergner Date: Thu Jan 16 10:49:45 2025 -0600 rs6000: Fix loop limit for built-in constant checking The loop checking for built-in constant operan

[gcc r13-9344] rs6000: Fix ICE for invalid constants in built-in functions

https://gcc.gnu.org/g:2c42f598b4365fac40bbc32a795e42b87962c874 commit r13-9344-g2c42f598b4365fac40bbc32a795e42b87962c874 Author: Peter Bergner Date: Thu Jan 16 10:53:27 2025 -0600 rs6000: Fix ICE for invalid constants in built-in functions For invalid constant operand values used

[gcc r13-9343] rs6000: Fix loop limit for built-in constant checking

https://gcc.gnu.org/g:a54c3a72defe4bd7c33f20fc3d51496e160a8aa7 commit r13-9343-ga54c3a72defe4bd7c33f20fc3d51496e160a8aa7 Author: Peter Bergner Date: Thu Jan 16 10:49:45 2025 -0600 rs6000: Fix loop limit for built-in constant checking The loop checking for built-in constant operand

[gcc r14-11242] rs6000: Fix ICE for invalid constants in built-in functions

https://gcc.gnu.org/g:a1acb1c0edec1e04b20b3e7d561a04098dfd47b6 commit r14-11242-ga1acb1c0edec1e04b20b3e7d561a04098dfd47b6 Author: Peter Bergner Date: Thu Jan 16 10:53:27 2025 -0600 rs6000: Fix ICE for invalid constants in built-in functions For invalid constant operand values used

[gcc r14-11241] rs6000: Fix loop limit for built-in constant checking

https://gcc.gnu.org/g:68df37647bdce7fc85c5f0f25629027800a4fcb5 commit r14-11241-g68df37647bdce7fc85c5f0f25629027800a4fcb5 Author: Peter Bergner Date: Thu Jan 16 10:49:45 2025 -0600 rs6000: Fix loop limit for built-in constant checking The loop checking for built-in constant operan

[gcc r15-6960] rs6000: Fix ICE for invalid constants in built-in functions

https://gcc.gnu.org/g:0696af74b3392e2178215607337b116d1bb53e34 commit r15-6960-g0696af74b3392e2178215607337b116d1bb53e34 Author: Peter Bergner Date: Thu Jan 16 10:53:27 2025 -0600 rs6000: Fix ICE for invalid constants in built-in functions For invalid constant operand values used

[gcc r15-6959] rs6000: Fix loop limit for built-in constant checking

https://gcc.gnu.org/g:1a2d63a78f99b7fdc2eff5bf9065682d5bbbaaca commit r15-6959-g1a2d63a78f99b7fdc2eff5bf9065682d5bbbaaca Author: Peter Bergner Date: Thu Jan 16 10:49:45 2025 -0600 rs6000: Fix loop limit for built-in constant checking The loop checking for built-in constant operand

[gcc r15-6883] rs6000: Add clobber and guard for vsx_stxvd2x4_le_const [PR116030]

https://gcc.gnu.org/g:f12bb6c26b86c616e4de8c542804cb5b5c9ebdc6 commit r15-6883-gf12bb6c26b86c616e4de8c542804cb5b5c9ebdc6 Author: Jiufu Guo Date: Mon Jan 13 18:16:16 2025 -0600 rs6000: Add clobber and guard for vsx_stxvd2x4_le_const [PR116030] Previously, vsx_stxvd2x4_le_const_ was

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-Add dense math test for new instruction names.

https://gcc.gnu.org/g:8ae1c5a877c240fcec1c0217e687e316394103d3 commit 8ae1c5a877c240fcec1c0217e687e316394103d3 Author: Michael Meissner Date: Tue Oct 22 16:57:52 2024 -0400 RFC2653-Add dense math test for new instruction names. 2024-10-22 Michael Meissner gcc/testsuit

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-PowerPC: Add support for 1, 024 bit DMR registers.

https://gcc.gnu.org/g:cfffa0fc9c76e930d507a549527ede03862f81ad commit cfffa0fc9c76e930d507a549527ede03862f81ad Author: Michael Meissner Date: Tue Oct 22 16:58:33 2024 -0400 RFC2653-PowerPC: Add support for 1,024 bit DMR registers. This patch is a prelimianry patch to add the full

[gcc(refs/vendors/ibm/heads/mmaplus)] Update ChangeLog.*

https://gcc.gnu.org/g:93f4f03f35b1c37ee6618d7907e90b66c0bc0c88 commit 93f4f03f35b1c37ee6618d7907e90b66c0bc0c88 Author: Michael Meissner Date: Tue Oct 22 17:55:58 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.mmaplus | 814 ++ 1 file

[gcc(refs/vendors/ibm/heads/mmaplus)] Update ChangeLog.*

https://gcc.gnu.org/g:b0534a239f4e7cd1e7e19b16eeca2d6dba49b57a commit b0534a239f4e7cd1e7e19b16eeca2d6dba49b57a Author: Michael Meissner Date: Wed Nov 6 16:54:27 2024 -0500 Update ChangeLog.* Diff: --- gcc/ChangeLog.mmaplus | 13 + 1 file changed, 13 insertions(+) diff --git

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2677-Add xvrlw support.

https://gcc.gnu.org/g:12dc932b4ea19c1e6bb6d5dff6c4f6ea9f3f5e09 commit 12dc932b4ea19c1e6bb6d5dff6c4f6ea9f3f5e09 Author: Michael Meissner Date: Tue Oct 22 17:02:33 2024 -0400 RFC2677-Add xvrlw support. 2024-10-22 Michael Meissner gcc/ * config/rs6000/alt

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2655-Add saturating subtract built-ins.

https://gcc.gnu.org/g:92ab335ad4356e4c383a77fb2ab24bf60aefc44c commit 92ab335ad4356e4c383a77fb2ab24bf60aefc44c Author: Michael Meissner Date: Tue Oct 22 17:00:35 2024 -0400 RFC2655-Add saturating subtract built-ins. This patch adds support for a saturating subtract built-in functi

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_FPRND to TARGET_POWER5X

https://gcc.gnu.org/g:25d8c2792e5e8ebf00b6d6a9295ad9e051895c6c commit 25d8c2792e5e8ebf00b6d6a9295ad9e051895c6c Author: Michael Meissner Date: Tue Oct 22 16:48:59 2024 -0400 Change TARGET_FPRND to TARGET_POWER5X As part of the architecture flags patches, this patch changes the use

[gcc(refs/vendors/ibm/heads/mmaplus)] Add ChangeLog.dmf and update REVISION.

https://gcc.gnu.org/g:899fe7e3026fef4d0a4e9fdc517bdaea67e156e8 commit 899fe7e3026fef4d0a4e9fdc517bdaea67e156e8 Author: Michael Meissner Date: Tue Oct 22 16:38:02 2024 -0400 Add ChangeLog.dmf and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chang

[gcc(refs/vendors/ibm/heads/mmaplus)] Set default name to power8 if no --with-cpu.

https://gcc.gnu.org/g:57af3f6b604772d371328520b972755fed590704 commit 57af3f6b604772d371328520b972755fed590704 Author: Michael Meissner Date: Wed Nov 6 16:52:07 2024 -0500 Set default name to power8 if no --with-cpu. 2024-11-06 Michael Meissner gcc/ *

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2686-Add paddis support.

https://gcc.gnu.org/g:aa6348c986600150bc32069cf1e07a608f378068 commit aa6348c986600150bc32069cf1e07a608f378068 Author: Michael Meissner Date: Tue Oct 22 17:01:20 2024 -0400 RFC2686-Add paddis support. 2024-10-22 Michael Meissner gcc/ * config/rs6000/co

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_MODULO to TARGET_POWER9

https://gcc.gnu.org/g:e493980945dc9b1e6b52fb6a02dfd05d97d9c4fc commit e493980945dc9b1e6b52fb6a02dfd05d97d9c4fc Author: Michael Meissner Date: Tue Oct 22 16:51:43 2024 -0400 Change TARGET_MODULO to TARGET_POWER9 As part of the architecture flags patches, this patch changes the use

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-PowerPC: Switch to dense math names for all MMA operations.

https://gcc.gnu.org/g:e9de88cf40fd3e61cb824384e1b1780d39f89ebe commit e9de88cf40fd3e61cb824384e1b1780d39f89ebe Author: Michael Meissner Date: Tue Oct 22 16:57:05 2024 -0400 RFC2653-PowerPC: Switch to dense math names for all MMA operations. This patch changes the assembler instruc

[gcc(refs/vendors/ibm/heads/mmaplus)] Revert changes

https://gcc.gnu.org/g:789030a88dc752b80277f1868d94cb8e4e82d481 commit 789030a88dc752b80277f1868d94cb8e4e82d481 Author: Michael Meissner Date: Tue Oct 22 17:51:04 2024 -0400 Revert changes Diff: --- gcc/config/rs6000/altivec.md | 14 gcc/config/rs6000/constraint

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-Add support for dense math registers.

https://gcc.gnu.org/g:e3507bcba8da515736267a70c3dfb5fac05463c4 commit e3507bcba8da515736267a70c3dfb5fac05463c4 Author: Michael Meissner Date: Tue Oct 22 16:56:10 2024 -0400 RFC2653-Add support for dense math registers. The MMA subsystem added the notion of accumulator registers as

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2656-Support load/store vector with right length.

https://gcc.gnu.org/g:6f039c1f5c4b0b7bfc765c355a9a1b9152500a56 commit 6f039c1f5c4b0b7bfc765c355a9a1b9152500a56 Author: Michael Meissner Date: Tue Oct 22 16:59:43 2024 -0400 RFC2656-Support load/store vector with right length. This patch adds support for new instructions that may b

[gcc(refs/vendors/ibm/heads/mmaplus)] Update tests to work with architecture flags changes.

https://gcc.gnu.org/g:4a8a2d079162111f3cfbf7c5147e5554f97a5113 commit 4a8a2d079162111f3cfbf7c5147e5554f97a5113 Author: Michael Meissner Date: Tue Oct 22 16:52:24 2024 -0400 Update tests to work with architecture flags changes. Two tests used -mvsx to raise the processor level to a

[gcc(refs/vendors/ibm/heads/mmaplus)] Use vector pair load/store for memcpy with -mcpu=future

https://gcc.gnu.org/g:898e330bd7d50a0cb630d3b206561e4d54877a2b commit 898e330bd7d50a0cb630d3b206561e4d54877a2b Author: Michael Meissner Date: Tue Oct 22 16:54:35 2024 -0400 Use vector pair load/store for memcpy with -mcpu=future In the development for the power10 processor, GCC di

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-Add wD constraint.

https://gcc.gnu.org/g:af1a75250d8b9e9c2170c579e6127368e22d2282 commit af1a75250d8b9e9c2170c579e6127368e22d2282 Author: Michael Meissner Date: Tue Oct 22 16:55:18 2024 -0400 RFC2653-Add wD constraint. This patch adds a new constraint ('wD') that matches the accumulator registers

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_POPCNTD to TARGET_POWER7

https://gcc.gnu.org/g:f986a6097fcffd83d871946d8c479d0ee398baea commit f986a6097fcffd83d871946d8c479d0ee398baea Author: Michael Meissner Date: Tue Oct 22 16:50:48 2024 -0400 Change TARGET_POPCNTD to TARGET_POWER7 As part of the architecture flags patches, this patch changes the use

[gcc(refs/vendors/ibm/heads/mmaplus)] Do not allow -mvsx to boost processor to power7.

https://gcc.gnu.org/g:8b38dc4e1d3d1794cdc9436f5ad392c8d5442912 commit 8b38dc4e1d3d1794cdc9436f5ad392c8d5442912 Author: Michael Meissner Date: Tue Oct 22 16:42:11 2024 -0400 Do not allow -mvsx to boost processor to power7. This patch restructures the code so that -mvsx for example

[gcc(refs/vendors/ibm/heads/mmaplus)] Use architecture flags for defining _ARCH_PWR macros.

https://gcc.gnu.org/g:9597f840febcc4820270023c5d843e5a0a051587 commit 9597f840febcc4820270023c5d843e5a0a051587 Author: Michael Meissner Date: Tue Oct 22 16:41:09 2024 -0400 Use architecture flags for defining _ARCH_PWR macros. For the newer architectures, this patch changes GCC to

[gcc/ibm/heads/mmaplus] (1192 commits) Update ChangeLog.*

The branch 'ibm/heads/mmaplus' was updated to point to: b0534a239f4e... Update ChangeLog.* It previously pointed to: 3b2b644646c7... Update ChangeLog.* Diff: !!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST): --

[gcc(refs/vendors/ibm/heads/mmaplus)] Add -mcpu=future tuning support.

https://gcc.gnu.org/g:7b173d32ded5d88d6f4973b167c6304b60453492 commit 7b173d32ded5d88d6f4973b167c6304b60453492 Author: Michael Meissner Date: Tue Oct 22 16:53:40 2024 -0400 Add -mcpu=future tuning support. This patch makes -mtune=future use the same tuning decision as -mtune=powe

[gcc(refs/vendors/ibm/heads/mmaplus)] Add support for -mcpu=future

https://gcc.gnu.org/g:99ed71cbb0b2d61153e2bac086e226d85db219fa commit 99ed71cbb0b2d61153e2bac086e226d85db219fa Author: Michael Meissner Date: Tue Oct 22 16:53:04 2024 -0400 Add support for -mcpu=future This patch adds the support that can be used in developing GCC support for

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_CMPB to TARGET_POWER6

https://gcc.gnu.org/g:9a17bb6964e3b15bc596d8f06d38e125fbb8948d commit 9a17bb6964e3b15bc596d8f06d38e125fbb8948d Author: Michael Meissner Date: Tue Oct 22 16:49:52 2024 -0400 Change TARGET_CMPB to TARGET_POWER6 As part of the architecture flags patches, this patch changes the use of

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_POPCNTB to TARGET_POWER5

https://gcc.gnu.org/g:c535ab073031bb3c9e512c635bcbc0c099e59485 commit c535ab073031bb3c9e512c635bcbc0c099e59485 Author: Michael Meissner Date: Tue Oct 22 16:48:20 2024 -0400 Change TARGET_POPCNTB to TARGET_POWER5 As part of the architecture flags patches, this patch changes the use

[gcc(refs/vendors/ibm/heads/mmaplus)] Add rs6000 architecture masks.

https://gcc.gnu.org/g:f596a7323701b001d9bbf1a8f3cf06b6d75669e0 commit f596a7323701b001d9bbf1a8f3cf06b6d75669e0 Author: Michael Meissner Date: Tue Oct 22 16:40:13 2024 -0400 Add rs6000 architecture masks. This patch begins the journey to move architecture bits that are not user IS

[gcc r15-4962] testsuite: Fix up gcc.target/powerpc/safe-indirect-jump-3.c test [PR117444]

https://gcc.gnu.org/g:f185a89fc4b6e6f5ae5475cd7c723b3acf39976b commit r15-4962-gf185a89fc4b6e6f5ae5475cd7c723b3acf39976b Author: Peter Bergner Date: Tue Nov 5 10:30:46 2024 -0600 testsuite: Fix up gcc.target/powerpc/safe-indirect-jump-3.c test [PR117444] The test safe-indirect-jum

[gcc r14-10860] rs6000: ROP - Do not disable shrink-wrapping for leaf functions [PR114759]

https://gcc.gnu.org/g:b4d4b86aebe1314a145732150d59a7b9ba066032 commit r14-10860-gb4d4b86aebe1314a145732150d59a7b9ba066032 Author: Peter Bergner Date: Tue Jun 18 17:42:45 2024 -0500 rs6000: ROP - Do not disable shrink-wrapping for leaf functions [PR114759] Only disable shrink-wrapp

[gcc r12-10790] rs6000: Fix PTImode handling in power8 swap optimization pass [PR116415]

https://gcc.gnu.org/g:eeb72f26ea7e70baadf2e3b9e89e8f7055fec0a9 commit r12-10790-geeb72f26ea7e70baadf2e3b9e89e8f7055fec0a9 Author: Peter Bergner Date: Fri Aug 23 11:45:40 2024 -0500 rs6000: Fix PTImode handling in power8 swap optimization pass [PR116415] Our power8 swap optimizatio

[gcc r13-9154] rs6000: Fix PTImode handling in power8 swap optimization pass [PR116415]

https://gcc.gnu.org/g:507ed9118b29d7a5a2b751876bec9a1f5009de01 commit r13-9154-g507ed9118b29d7a5a2b751876bec9a1f5009de01 Author: Peter Bergner Date: Fri Aug 23 11:45:40 2024 -0500 rs6000: Fix PTImode handling in power8 swap optimization pass [PR116415] Our power8 swap optimization

[gcc r14-10849] rs6000: Fix PTImode handling in power8 swap optimization pass [PR116415]

https://gcc.gnu.org/g:ab74b2d86471cdb5b8a327e734630f1288125d9e commit r14-10849-gab74b2d86471cdb5b8a327e734630f1288125d9e Author: Peter Bergner Date: Fri Aug 23 11:45:40 2024 -0500 rs6000: Fix PTImode handling in power8 swap optimization pass [PR116415] Our power8 swap optimizatio

[gcc] Created branch 'ibm/heads/mmaplus' in namespace 'refs/vendors'

The branch 'ibm/heads/mmaplus' was created in namespace 'refs/vendors' pointing to: bf11ecbb02b5... testsuite: Add test directive checking removal of link_erro

[gcc r15-3136] rs6000: Fix PTImode handling in power8 swap optimization pass [PR116415]

https://gcc.gnu.org/g:6e68c3df1540c5bafbb47343698bf4e270333fdb commit r15-3136-g6e68c3df1540c5bafbb47343698bf4e270333fdb Author: Peter Bergner Date: Fri Aug 23 11:45:40 2024 -0500 rs6000: Fix PTImode handling in power8 swap optimization pass [PR116415] Our power8 swap optimization

[gcc/ibm/heads/gcc-14-branch] (210 commits) ibm: Merge up to top of releases/gcc-14

The branch 'ibm/heads/gcc-14-branch' was updated to point to: 7ea4c6f44d3... ibm: Merge up to top of releases/gcc-14 It previously pointed to: a9332cff81c... ibm: Merge up to top of releases/gcc-14 Diff: Summary of changes (added commits): --- 7ea4c6f... ib

[gcc r15-2896] rs6000: ROP - Do not disable shrink-wrapping for leaf functions [PR114759]

https://gcc.gnu.org/g:0451bc503da9c858e9f1ddfb8faec367c2e032c8 commit r15-2896-g0451bc503da9c858e9f1ddfb8faec367c2e032c8 Author: Peter Bergner Date: Tue Jun 18 17:42:45 2024 -0500 rs6000: ROP - Do not disable shrink-wrapping for leaf functions [PR114759] Only disable shrink-wrappi

[gcc r12-10642] rs6000: Catch unsupported ABI errors when using -mrop-protect [PR114759, PR115988]

https://gcc.gnu.org/g:f7bebf4c07dffaa75c77152e8004aa0ccbf6eeac commit r12-10642-gf7bebf4c07dffaa75c77152e8004aa0ccbf6eeac Author: Peter Bergner Date: Thu Jul 18 18:01:46 2024 -0500 rs6000: Catch unsupported ABI errors when using -mrop-protect [PR114759,PR115988] 2024-07-18 Peter

[gcc r12-10640] rs6000: ROP - Emit hashst and hashchk insns on Power8 and later [PR114759]

https://gcc.gnu.org/g:aa293f40770bae5e94f33d4700f2f0ce9eff712b commit r12-10640-gaa293f40770bae5e94f33d4700f2f0ce9eff712b Author: Peter Bergner Date: Wed Jun 19 16:07:29 2024 -0500 rs6000: ROP - Emit hashst and hashchk insns on Power8 and later [PR114759] We currently only emit th

[gcc r12-10641] rs6000: Error on CPUs and ABIs that don't support the ROP protection insns [PR114759]

https://gcc.gnu.org/g:25cf4d2a2200903fe868f8cbd9d24f35768041c1 commit r12-10641-g25cf4d2a2200903fe868f8cbd9d24f35768041c1 Author: Peter Bergner Date: Mon Jul 15 16:57:32 2024 -0500 rs6000: Error on CPUs and ABIs that don't support the ROP protection insns [PR114759] We currently

[gcc r12-10639] rs6000: Compute rop_hash_save_offset for non-Altivec compiles [PR115389]

https://gcc.gnu.org/g:60e513cd47aadd8f139079f8388b14930e6e0913 commit r12-10639-g60e513cd47aadd8f139079f8388b14930e6e0913 Author: Peter Bergner Date: Fri Jun 14 14:36:20 2024 -0500 rs6000: Compute rop_hash_save_offset for non-Altivec compiles [PR115389] We currently only compute t

[gcc r12-10638] rs6000: Update ELFv2 stack frame comment showing the correct ROP save location

https://gcc.gnu.org/g:2647b9e052eafbbec1094558167be9a24e2d8221 commit r12-10638-g2647b9e052eafbbec1094558167be9a24e2d8221 Author: Peter Bergner Date: Fri Jun 7 16:03:08 2024 -0500 rs6000: Update ELFv2 stack frame comment showing the correct ROP save location The ELFv2 stack frame

[gcc r13-8941] rs6000: Error on CPUs and ABIs that don't support the ROP protection insns [PR114759]

https://gcc.gnu.org/g:63b1b3e23c3c589c2859d481705dc706cbff35a1 commit r13-8941-g63b1b3e23c3c589c2859d481705dc706cbff35a1 Author: Peter Bergner Date: Mon Jul 15 16:57:32 2024 -0500 rs6000: Error on CPUs and ABIs that don't support the ROP protection insns [PR114759] We currently s

[gcc r13-8940] rs6000: ROP - Emit hashst and hashchk insns on Power8 and later [PR114759]

https://gcc.gnu.org/g:77fd352a47137d79e6b7a480503ce4368f13c3e5 commit r13-8940-g77fd352a47137d79e6b7a480503ce4368f13c3e5 Author: Peter Bergner Date: Wed Jun 19 16:07:29 2024 -0500 rs6000: ROP - Emit hashst and hashchk insns on Power8 and later [PR114759] We currently only emit the

[gcc r13-8942] rs6000: Catch unsupported ABI errors when using -mrop-protect [PR114759, PR115988]

https://gcc.gnu.org/g:9a4603d323d890dfab6d27ede17dc904abdccd9b commit r13-8942-g9a4603d323d890dfab6d27ede17dc904abdccd9b Author: Peter Bergner Date: Thu Jul 18 18:01:46 2024 -0500 rs6000: Catch unsupported ABI errors when using -mrop-protect [PR114759,PR115988] 2024-07-18 Peter

[gcc r13-8939] rs6000: Compute rop_hash_save_offset for non-Altivec compiles [PR115389]

https://gcc.gnu.org/g:bc51e5abcd9cf9a4f74384f2df7c0c8c5ae07c1c commit r13-8939-gbc51e5abcd9cf9a4f74384f2df7c0c8c5ae07c1c Author: Peter Bergner Date: Fri Jun 14 14:36:20 2024 -0500 rs6000: Compute rop_hash_save_offset for non-Altivec compiles [PR115389] We currently only compute th

[gcc r13-8938] rs6000: Update ELFv2 stack frame comment showing the correct ROP save location

https://gcc.gnu.org/g:9bbdec4d94f9120b75d03a610e0338bb05ee40f7 commit r13-8938-g9bbdec4d94f9120b75d03a610e0338bb05ee40f7 Author: Peter Bergner Date: Fri Jun 7 16:03:08 2024 -0500 rs6000: Update ELFv2 stack frame comment showing the correct ROP save location The ELFv2 stack frame

[gcc r14-10493] rs6000: Error on CPUs and ABIs that don't support the ROP protection insns [PR114759]

https://gcc.gnu.org/g:35e5c2d2e4af20d143ee1a4f8f4f2bd8b24c4af1 commit r14-10493-g35e5c2d2e4af20d143ee1a4f8f4f2bd8b24c4af1 Author: Peter Bergner Date: Mon Jul 15 16:57:32 2024 -0500 rs6000: Error on CPUs and ABIs that don't support the ROP protection insns [PR114759] We currently

[gcc r14-10494] rs6000: Catch unsupported ABI errors when using -mrop-protect [PR114759, PR115988]

https://gcc.gnu.org/g:bd535b46aaffe637b2eeb634e56ee6e9efa511bf commit r14-10494-gbd535b46aaffe637b2eeb634e56ee6e9efa511bf Author: Peter Bergner Date: Thu Jul 18 18:01:46 2024 -0500 rs6000: Catch unsupported ABI errors when using -mrop-protect [PR114759,PR115988] 2024-07-18 Peter

[gcc r14-10492] rs6000: ROP - Emit hashst and hashchk insns on Power8 and later [PR114759]

https://gcc.gnu.org/g:e2d746e5ab73b0b1f1a8104101c09b1f4ab3fa25 commit r14-10492-ge2d746e5ab73b0b1f1a8104101c09b1f4ab3fa25 Author: Peter Bergner Date: Wed Jun 19 16:07:29 2024 -0500 rs6000: ROP - Emit hashst and hashchk insns on Power8 and later [PR114759] We currently only emit th

[gcc r14-10491] rs6000: Compute rop_hash_save_offset for non-Altivec compiles [PR115389]

https://gcc.gnu.org/g:33ebeb2435d68ae0546b29394e99e00647943fa9 commit r14-10491-g33ebeb2435d68ae0546b29394e99e00647943fa9 Author: Peter Bergner Date: Fri Jun 14 14:36:20 2024 -0500 rs6000: Compute rop_hash_save_offset for non-Altivec compiles [PR115389] We currently only compute t

[gcc r14-10490] rs6000: Update ELFv2 stack frame comment showing the correct ROP save location

https://gcc.gnu.org/g:c33532c59752723a4f7dfc305545b34c61281380 commit r14-10490-gc33532c59752723a4f7dfc305545b34c61281380 Author: Peter Bergner Date: Fri Jun 7 16:03:08 2024 -0500 rs6000: Update ELFv2 stack frame comment showing the correct ROP save location The ELFv2 stack frame

[gcc r12-10628] rs6000: Fix .machine cpu selection w/ altivec [PR97367]

https://gcc.gnu.org/g:319b57fb02b52ba9036c00dda36ff28d8274e13d commit r12-10628-g319b57fb02b52ba9036c00dda36ff28d8274e13d Author: René Rebe Date: Fri Jul 12 21:17:08 2024 + rs6000: Fix .machine cpu selection w/ altivec [PR97367] There are various non-IBM CPUs with altivec, so

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