[gcc r16-1280] xtensa: Implement l(ceil|floor)sfsi2 insn patterns and their scaled variants

https://gcc.gnu.org/g:5f3b5b0616fe883e86e95d9476371cf87059ca7f commit r16-1280-g5f3b5b0616fe883e86e95d9476371cf87059ca7f Author: Takayuki 'January June' Suwa Date: Sun Jun 8 14:05:05 2025 +0900 xtensa: Implement l(ceil|floor)sfsi2 insn patterns and their scaled variants By using t

[gcc r16-1033] xtensa: Remove include of reload.h

https://gcc.gnu.org/g:2e1f0142708e29bf0f19ef76c9dded913081a0ef commit r16-1033-g2e1f0142708e29bf0f19ef76c9dded913081a0ef Author: Takayuki 'January June' Suwa Date: Tue May 27 15:59:21 2025 +0900 xtensa: Remove include of reload.h As one of the last steps in removing old reload.

[gcc r16-1032] xtensa: Remove an unnecessary constraint modifier from movsf_internal insn pattern

https://gcc.gnu.org/g:2e5130f6870bdb016f58f42f2ff99a2226e93af6 commit r16-1032-g2e5130f6870bdb016f58f42f2ff99a2226e93af6 Author: Takayuki 'January June' Suwa Date: Tue May 27 15:58:35 2025 +0900 xtensa: Remove an unnecessary constraint modifier from movsf_internal insn pattern In

[gcc r16-1031] xtensa: Implement TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS

https://gcc.gnu.org/g:9050005673b68f5267a4c8262363b547555337a0 commit r16-1031-g9050005673b68f5267a4c8262363b547555337a0 Author: Takayuki 'January June' Suwa Date: Tue May 27 15:57:26 2025 +0900 xtensa: Implement TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS Implement TARGET_IRA_CHANGE_P

[gcc r16-530] testsuite: xtensa: add support for effective_target_sync_*

https://gcc.gnu.org/g:aa0d25683bb5c7f2256d9e897fe471f0de84ea9b commit r16-530-gaa0d25683bb5c7f2256d9e897fe471f0de84ea9b Author: Max Filippov Date: Sun Apr 27 18:05:20 2025 -0700 testsuite: xtensa: add support for effective_target_sync_* Add new function check_effective_target_xten

[gcc r16-529] xtensa: Fix up unwanted spills of SFmode hard registers holding function arguments/returns

https://gcc.gnu.org/g:6d73d75a7c04caf3457297400372f87765b9a653 commit r16-529-g6d73d75a7c04caf3457297400372f87765b9a653 Author: Takayuki 'January June' Suwa Date: Sun May 11 04:51:11 2025 +0900 xtensa: Fix up unwanted spills of SFmode hard registers holding function arguments/returns

[gcc r15-5074] xtensa: Fix the issue in "*extzvsi-1bit_addsubx"

https://gcc.gnu.org/g:b433140a6cb40acedb2e6cb43c4e5a388e33f805 commit r15-5074-gb433140a6cb40acedb2e6cb43c4e5a388e33f805 Author: Takayuki 'January June' Suwa Date: Sun Nov 10 15:39:22 2024 +0900 xtensa: Fix the issue in "*extzvsi-1bit_addsubx" The second source register of insn "*

[gcc r15-4706] xtensa: Define TARGET_DIFFERENT_ADDR_DISPLACEMENT_P target hook

https://gcc.gnu.org/g:211459e12147e9ed42c0a0947b1b95b551e03ef3 commit r15-4706-g211459e12147e9ed42c0a0947b1b95b551e03ef3 Author: Takayuki 'January June' Suwa Date: Wed Oct 23 11:31:15 2024 +0900 xtensa: Define TARGET_DIFFERENT_ADDR_DISPLACEMENT_P target hook In commit bc5a9dab55d1

[gcc r15-2398] xtensa: Add missing speed cost for TYPE_FARITH in TARGET_INSN_COST

https://gcc.gnu.org/g:c1d35de0d94d43b9976aff44001dadd4dd42b7ae commit r15-2398-gc1d35de0d94d43b9976aff44001dadd4dd42b7ae Author: Takayuki 'January June' Suwa Date: Wed Jul 24 06:07:06 2024 +0900 xtensa: Add missing speed cost for TYPE_FARITH in TARGET_INSN_COST According to the im

[gcc r15-2397] xtensa: Fix suboptimal loading of pooled constant value into hardware single-precision FP register

https://gcc.gnu.org/g:fb7b82964f54192d0723a45c0657d2eb7c5ac97c commit r15-2397-gfb7b82964f54192d0723a45c0657d2eb7c5ac97c Author: Takayuki 'January June' Suwa Date: Tue Jul 23 16:03:12 2024 +0900 xtensa: Fix suboptimal loading of pooled constant value into hardware single-precision FP regi

[gcc r15-2396] xtensa: Fix the regression introduce by r15-959-gbe9b3f4375e7

https://gcc.gnu.org/g:8ebb1d79ea16f37214c33d853061d3c9cf5e7f46 commit r15-2396-g8ebb1d79ea16f37214c33d853061d3c9cf5e7f46 Author: Takayuki 'January June' Suwa Date: Sat Jul 20 05:35:33 2024 +0900 xtensa: Fix the regression introduce by r15-959-gbe9b3f4375e7 It is not wrong but also

[gcc r15-2392] xtensa: Make use of scaled [U]FLOAT/TRUNC.S instructions

https://gcc.gnu.org/g:f9c7775f58798a051b57356ad321b758a2ee837d commit r15-2392-gf9c7775f58798a051b57356ad321b758a2ee837d Author: Takayuki 'January June' Suwa Date: Sun Jul 14 20:04:15 2024 +0900 xtensa: Make use of scaled [U]FLOAT/TRUNC.S instructions [U]FLOAT.S machine instructio

[gcc r15-2391] xtensa: Make use of std::swap where appropriate

https://gcc.gnu.org/g:56c4979dd8be40681f2724861fc41ae6135e1e78 commit r15-2391-g56c4979dd8be40681f2724861fc41ae6135e1e78 Author: Takayuki 'January June' Suwa Date: Sun Jul 14 20:03:13 2024 +0900 xtensa: Make use of std::swap where appropriate No functional changes. gcc/Ch

[gcc r15-2385] gcc: xtensa: disable late-combine by default

https://gcc.gnu.org/g:9d5d6e61500411ea9043258e300d5b0f57e5c391 commit r15-2385-g9d5d6e61500411ea9043258e300d5b0f57e5c391 Author: Max Filippov Date: Fri Jul 19 17:27:03 2024 -0700 gcc: xtensa: disable late-combine by default gcc/ * config/xtensa/xtensa.cc (xtensa_option

[gcc r15-1453] xtensa: Eliminate double MEMW insertions for volatile memory

https://gcc.gnu.org/g:0982552bc4eeffb5520deba10dedecfb2390a8de commit r15-1453-g0982552bc4eeffb5520deba10dedecfb2390a8de Author: Takayuki 'January June' Suwa Date: Wed Jun 19 13:59:54 2024 +0900 xtensa: Eliminate double MEMW insertions for volatile memory This patch makes avoid in

[gcc r15-1433] xtensa: constantsynth: Reforge to fix some non-fatal issues

https://gcc.gnu.org/g:23141088e8fb50bf916ac0b2e364b1eef9f3569d commit r15-1433-g23141088e8fb50bf916ac0b2e364b1eef9f3569d Author: Takayuki 'January June' Suwa Date: Wed Jun 19 11:55:57 2024 +0900 xtensa: constantsynth: Reforge to fix some non-fatal issues The previous constant synt

[gcc r15-959] xtensa: Prepend "(use A0_REG)" to sibling call CALL_INSN_FUNCTION_USAGE instead of emitting it as in

https://gcc.gnu.org/g:be9b3f4375e74b6f10dd15fc563c93f803e91db5 commit r15-959-gbe9b3f4375e74b6f10dd15fc563c93f803e91db5 Author: Takayuki 'January June' Suwa Date: Fri May 31 19:24:48 2024 +0900 xtensa: Prepend "(use A0_REG)" to sibling call CALL_INSN_FUNCTION_USAGE instead of emitting it

[gcc r15-958] xtensa: Simplify several MD templates

https://gcc.gnu.org/g:68cda24d3ac12292a599ff8f9b58fdbc95baba4e commit r15-958-g68cda24d3ac12292a599ff8f9b58fdbc95baba4e Author: Takayuki 'January June' Suwa Date: Fri May 31 19:23:13 2024 +0900 xtensa: Simplify several MD templates No functional changes. gcc/ChangeLog:

[gcc r15-936] xtensa: Use epilogue_completed rather than cfun->machine->epilogue_done

https://gcc.gnu.org/g:1b58f46ba2079b327580ffa1720c0b40ab3db74d commit r15-936-g1b58f46ba2079b327580ffa1720c0b40ab3db74d Author: Takayuki 'January June' Suwa Date: Thu May 30 22:32:24 2024 +0900 xtensa: Use epilogue_completed rather than cfun->machine->epilogue_done In commit ad89d

[gcc r15-935] xtensa: Use REG_P(), MEM_P(), etc. instead of comparing GET_CODE()

https://gcc.gnu.org/g:1e091097b1b42fed562a6d80a6e08603d1c648a2 commit r15-935-g1e091097b1b42fed562a6d80a6e08603d1c648a2 Author: Takayuki 'January June' Suwa Date: Thu May 30 22:32:24 2024 +0900 xtensa: Use REG_P(), MEM_P(), etc. instead of comparing GET_CODE() Instead of comparing

[gcc r14-9655] libgcc: arm: fix build for FDPIC target

https://gcc.gnu.org/g:c2e68ff9edd5da7a55ba6574b4ce49ce6495b18d commit r14-9655-gc2e68ff9edd5da7a55ba6574b4ce49ce6495b18d Author: Max Filippov Date: Fri Mar 22 13:03:46 2024 -0700 libgcc: arm: fix build for FDPIC target libgcc/ * unwind-arm-common.inc (__gnu_personality

[gcc r14-9638] xtensa: Add supplementary split pattern for "*addsubx"

https://gcc.gnu.org/g:7a01cc711f33530436712a5bfd18f8457a68ea1f commit r14-9638-g7a01cc711f33530436712a5bfd18f8457a68ea1f Author: Takayuki 'January June' Suwa Date: Fri Mar 22 08:36:30 2024 +0900 xtensa: Add supplementary split pattern for "*addsubx" int test(int a) { return

[gcc r14-9480] gcc: xtensa: reorder movsi_internal patterns for better code generation during LRA

https://gcc.gnu.org/g:bc5a9dab55d13f888a3cdd150c8cf5c2244f35e0 commit r14-9480-gbc5a9dab55d13f888a3cdd150c8cf5c2244f35e0 Author: Max Filippov Date: Thu Mar 14 04:20:36 2024 -0700 gcc: xtensa: reorder movsi_internal patterns for better code generation during LRA After switching to