https://gcc.gnu.org/g:9050005673b68f5267a4c8262363b547555337a0
commit r16-1031-g9050005673b68f5267a4c8262363b547555337a0 Author: Takayuki 'January June' Suwa <jjsuwa_sys3...@yahoo.co.jp> Date: Tue May 27 15:57:26 2025 +0900 xtensa: Implement TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS Implement TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS in order to avoid using ALL_REGS rclass as is done on other targets, instead of overestimating between integer and FP register move costs. gcc/ChangeLog: * config/xtensa/xtensa.cc (xtensa_ira_change_pseudo_allocno_class): New prototype and function. (TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS): Define macro. (xtensa_register_move_cost): Change between integer and FP register move cost to a value based on actual behavior, i.e. 2, the default and the same as the move cost between integer registers. Diff: --- gcc/config/xtensa/xtensa.cc | 27 +++++++++++++++++++++++---- 1 file changed, 23 insertions(+), 4 deletions(-) diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc index e03dee3f4c4a..d1856f76c053 100644 --- a/gcc/config/xtensa/xtensa.cc +++ b/gcc/config/xtensa/xtensa.cc @@ -197,6 +197,8 @@ static void xtensa_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED, tree function); static rtx xtensa_delegitimize_address (rtx); +static reg_class_t xtensa_ira_change_pseudo_allocno_class (int, reg_class_t, + reg_class_t); @@ -366,6 +368,9 @@ static rtx xtensa_delegitimize_address (rtx); #undef TARGET_DIFFERENT_ADDR_DISPLACEMENT_P #define TARGET_DIFFERENT_ADDR_DISPLACEMENT_P hook_bool_void_true +#undef TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS +#define TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS xtensa_ira_change_pseudo_allocno_class + struct gcc_target targetm = TARGET_INITIALIZER; @@ -4432,12 +4437,10 @@ xtensa_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, && reg_class_subset_p (to, AR_REGS))) return 2; - /* The cost between AR_REGS and FR_REGS must be <= 8 (2x the default - MEMORY_MOVE_COST) to avoid unwanted spills, and > 4 (2x the above - case) to avoid excessive register-to-register moves. */ + /* The cost between AR_REGS and FR_REGS is 2 (the default value). */ if ((reg_class_subset_p (from, AR_REGS) && to == FP_REGS) || (from == FP_REGS && reg_class_subset_p (to, AR_REGS))) - return 5; + return 2; if ((reg_class_subset_p (from, AR_REGS) && to == ACC_REG) || (from == ACC_REG && reg_class_subset_p (to, AR_REGS))) @@ -5433,4 +5436,20 @@ xtensa_delegitimize_address (rtx op) return op; } +/* Implement TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS, in order to tell + the register allocator to avoid using ALL_REGS rclass. */ + +static reg_class_t +xtensa_ira_change_pseudo_allocno_class (int regno, reg_class_t allocno_class, + reg_class_t best_class) +{ + if (allocno_class != ALL_REGS) + return allocno_class; + + if (best_class != ALL_REGS) + return best_class; + + return FLOAT_MODE_P (PSEUDO_REGNO_MODE (regno)) ? FP_REGS : AR_REGS; +} + #include "gt-xtensa.h"