[gcc r15-9267] i386: Add PTA_AVX10_1_256 to PTA_DIAMONDRAPIDS

https://gcc.gnu.org/g:2b809d6f4fb62aeccf482a889bc2775e5d94ef80 commit r15-9267-g2b809d6f4fb62aeccf482a889bc2775e5d94ef80 Author: Haochen Jiang Date: Fri Mar 28 16:16:27 2025 +0800 i386: Add PTA_AVX10_1_256 to PTA_DIAMONDRAPIDS For -march= handling, PTA_AVX10_1 will not imply PTA_A

[gcc r14-11443] i386: Add -mavx10.1 back with 512 bit alias

https://gcc.gnu.org/g:5ba6fdc5476d33c57f4751cae93054fdbc7211c0 commit r14-11443-g5ba6fdc5476d33c57f4751cae93054fdbc7211c0 Author: Haochen Jiang Date: Mon Mar 24 15:51:16 2025 +0800 i386: Add -mavx10.1 back with 512 bit alias When AVX10.1 options are added into GCC 14, E-core is su

[gcc r15-8705] Revert "AVX10.2 ymm rounding: Support vcvt{, u}w2ph and vdivp{s, d, h} intrins"

https://gcc.gnu.org/g:dfab1d787b4fae7dedfa623534ae0bfa4ed39c2a commit r15-8705-gdfab1d787b4fae7dedfa623534ae0bfa4ed39c2a Author: Haochen Jiang Date: Mon Mar 24 14:24:05 2025 +0800 Revert "AVX10.2 ymm rounding: Support vcvt{,u}w2ph and vdivp{s,d,h} intrins" This reverts commit 3d1b

[gcc r15-8706] Revert "AVX10.2 ymm rounding: Support vcvttps2{, u}{dq, qq} and vcvtu{dq, qq}2p{s, d, h} intrins"

https://gcc.gnu.org/g:e17a9ea286969f33b05d6d69d82573a3a63d49c7 commit r15-8706-ge17a9ea286969f33b05d6d69d82573a3a63d49c7 Author: Haochen Jiang Date: Mon Mar 24 14:24:07 2025 +0800 Revert "AVX10.2 ymm rounding: Support vcvttps2{,u}{dq,qq} and vcvtu{dq,qq}2p{s,d,h} intrins" This re

[gcc r15-8712] Revert "AVX10.2 ymm rounding: Support vcvtpd2{, u}{dq, qq} intrins"

https://gcc.gnu.org/g:1d15565adb7d68c00b95151a078303f1e2fd1892 commit r15-8712-g1d15565adb7d68c00b95151a078303f1e2fd1892 Author: Haochen Jiang Date: Mon Mar 24 14:24:29 2025 +0800 Revert "AVX10.2 ymm rounding: Support vcvtpd2{,u}{dq,qq} intrins" This reverts commit 508ac49e1a94c28

[gcc r15-8696] Revert "AVX10.2 ymm rounding: Support vmulp{s, d, h} and vrangep{s, d} intrins"

https://gcc.gnu.org/g:f2367fcb3377cf95869095514be99e7633aad3d2 commit r15-8696-gf2367fcb3377cf95869095514be99e7633aad3d2 Author: Haochen Jiang Date: Mon Mar 24 14:23:51 2025 +0800 Revert "AVX10.2 ymm rounding: Support vmulp{s,d,h} and vrangep{s,d} intrins" This reverts commit 90cc

[gcc r15-8713] Revert "AVX10.2 ymm rounding: Support vcvtdq2p{s, h} and vcvtpd2p{s, h} intrins"

https://gcc.gnu.org/g:a5caa9ad987533d83313e9cfce3285f51528775e commit r15-8713-ga5caa9ad987533d83313e9cfce3285f51528775e Author: Haochen Jiang Date: Mon Mar 24 14:24:31 2025 +0800 Revert "AVX10.2 ymm rounding: Support vcvtdq2p{s,h} and vcvtpd2p{s,h} intrins" This reverts commit 8

[gcc r15-8691] i386: Remove 256 bit rounding for AVX10.2 minmax and convert instructions

https://gcc.gnu.org/g:1a5a77f1eb43acdf90fff2da0a0f37186aecbdf4 commit r15-8691-g1a5a77f1eb43acdf90fff2da0a0f37186aecbdf4 Author: Haochen Jiang Date: Mon Mar 24 14:23:37 2025 +0800 i386: Remove 256 bit rounding for AVX10.2 minmax and convert instructions Since we will support 512 b

[gcc r15-8717] i386: Raise deprecate warning for -mavx10.1-256/512 and -mevex512 while add -mavx10.1 back with 512

https://gcc.gnu.org/g:f775bb892cb75616bd947ce76c7fdfdc515cbcfd commit r15-8717-gf775bb892cb75616bd947ce76c7fdfdc515cbcfd Author: Haochen Jiang Date: Mon Mar 24 14:24:39 2025 +0800 i386: Raise deprecate warning for -mavx10.1-256/512 and -mevex512 while add -mavx10.1 back with 512 bit alias

[gcc r15-8702] Revert "AVX10.2 ymm rounding: Support vfmaddcph and vfmaddsub{132, 231, 213}p{s, d, h} intrins"

https://gcc.gnu.org/g:bd66bf1fd8862be4ebc41caa503672d7ec294e3d commit r15-8702-gbd66bf1fd8862be4ebc41caa503672d7ec294e3d Author: Haochen Jiang Date: Mon Mar 24 14:24:00 2025 +0800 Revert "AVX10.2 ymm rounding: Support vfmaddcph and vfmaddsub{132,231,213}p{s,d,h} intrins" This rev

[gcc r15-8707] Revert "AVX10.2 ymm rounding: Support vcvttph2{, u}{dq, qq, w} intrins"

https://gcc.gnu.org/g:a67476dbb4e0fdc02786bb58c050d89ddd84f773 commit r15-8707-ga67476dbb4e0fdc02786bb58c050d89ddd84f773 Author: Haochen Jiang Date: Mon Mar 24 14:24:09 2025 +0800 Revert "AVX10.2 ymm rounding: Support vcvttph2{,u}{dq,qq,w} intrins" This reverts commit 493c50960505

[gcc r15-8714] Revert "AVX10.2 ymm rounding: Support vadd{s, d, h} and vcmp{s, d, h} intrins"

https://gcc.gnu.org/g:e1139c5b0daa6bfdb0d8d5df2fc7f23a2840af25 commit r15-8714-ge1139c5b0daa6bfdb0d8d5df2fc7f23a2840af25 Author: Haochen Jiang Date: Mon Mar 24 14:24:33 2025 +0800 Revert "AVX10.2 ymm rounding: Support vadd{s,d,h} and vcmp{s,d,h} intrins" This reverts commit e22e3a

[gcc r15-8708] Revert "AVX10.2 ymm rounding: Support vcvtqq2p{s, d, h} and vcvttpd2{, u}{dq, qq} intrins"

https://gcc.gnu.org/g:2695a7378f7c0726000d1a6f055c6d33ae44165c commit r15-8708-g2695a7378f7c0726000d1a6f055c6d33ae44165c Author: Haochen Jiang Date: Mon Mar 24 14:24:14 2025 +0800 Revert "AVX10.2 ymm rounding: Support vcvtqq2p{s,d,h} and vcvttpd2{,u}{dq,qq} intrins" This reverts

[gcc r15-8709] Revert "AVX10.2 ymm rounding: Support vcvtps2{, u}{dq, qq} intrins"

https://gcc.gnu.org/g:08fd9bd48abc8578b9f6c9844d3ce47e587980ed commit r15-8709-g08fd9bd48abc8578b9f6c9844d3ce47e587980ed Author: Haochen Jiang Date: Mon Mar 24 14:24:16 2025 +0800 Revert "AVX10.2 ymm rounding: Support vcvtps2{,u}{dq,qq} intrins" This reverts commit 0f5a42d41b46b74

[gcc r15-8711] Revert "AVX10.2 ymm rounding: Support vcvtph2p{s, d, sx} and vcvtph2{, u}{dq, qq} intrins"

https://gcc.gnu.org/g:99a9e7218055260c6d3a769daa109dfb756054c2 commit r15-8711-g99a9e7218055260c6d3a769daa109dfb756054c2 Author: Haochen Jiang Date: Mon Mar 24 14:24:27 2025 +0800 Revert "AVX10.2 ymm rounding: Support vcvtph2p{s,d,sx} and vcvtph2{,u}{dq,qq} intrins" This reverts

[gcc r15-8710] Revert "AVX10.2 ymm rounding: Support vcvtph2{, u}w and vcvtps2p{d, hx} intrins"

https://gcc.gnu.org/g:567c939888e0d3bbb8464f8241d9364279320b56 commit r15-8710-g567c939888e0d3bbb8464f8241d9364279320b56 Author: Haochen Jiang Date: Mon Mar 24 14:24:18 2025 +0800 Revert "AVX10.2 ymm rounding: Support vcvtph2{,u}w and vcvtps2p{d,hx} intrins" This reverts commit b

[gcc r15-8704] Revert "AVX10.2 ymm rounding: Support vfc{madd, mul}cph, vfixupimmp{s, d} intrins"

https://gcc.gnu.org/g:c40e4cd1cf382adaa4f1e66278610a728aa6a258 commit r15-8704-gc40e4cd1cf382adaa4f1e66278610a728aa6a258 Author: Haochen Jiang Date: Mon Mar 24 14:24:03 2025 +0800 Revert "AVX10.2 ymm rounding: Support vfc{madd,mul}cph, vfixupimmp{s,d} intrins" This reverts commit

[gcc r15-8703] Revert "AVX10.2 ymm rounding: Support vfmadd{132, 231, 213}p{s, d, h} intrins"

https://gcc.gnu.org/g:c6834aab3e64d5c305bf305d32f2513927b89484 commit r15-8703-gc6834aab3e64d5c305bf305d32f2513927b89484 Author: Haochen Jiang Date: Mon Mar 24 14:24:01 2025 +0800 Revert "AVX10.2 ymm rounding: Support vfmadd{132,231,213}p{s,d,h} intrins" This reverts commit 0683ca

[gcc r15-8701] Revert "AVX10.2 ymm rounding: Support vfm{sub, subadd}{132, 231, 213}p{s, d, h} intrins"

https://gcc.gnu.org/g:1cceae938241058582930b2d600eb88966a71284 commit r15-8701-g1cceae938241058582930b2d600eb88966a71284 Author: Haochen Jiang Date: Mon Mar 24 14:23:58 2025 +0800 Revert "AVX10.2 ymm rounding: Support vfm{sub,subadd}{132,231,213}p{s,d,h} intrins" This reverts com

[gcc r15-8700] Revert "AVX10.2 ymm rounding: Support vfmulcph and vfnmadd{132, 231, 213}p{s, d, h} intrins"

https://gcc.gnu.org/g:3f2d586544b962971d8fb26d3198c8c6e7fc964a commit r15-8700-g3f2d586544b962971d8fb26d3198c8c6e7fc964a Author: Haochen Jiang Date: Mon Mar 24 14:23:56 2025 +0800 Revert "AVX10.2 ymm rounding: Support vfmulcph and vfnmadd{132,231,213}p{s,d,h} intrins" This revert

[gcc r15-8699] Revert "AVX10.2 ymm rounding: Support vfnmsub{132, 231, 213}p{s, d, h} intrins"

https://gcc.gnu.org/g:2f52807115e7a77c4bdd206e48172c9cb6564a13 commit r15-8699-g2f52807115e7a77c4bdd206e48172c9cb6564a13 Author: Haochen Jiang Date: Mon Mar 24 14:23:55 2025 +0800 Revert "AVX10.2 ymm rounding: Support vfnmsub{132,231,213}p{s,d,h} intrins" This reverts commit 0983d

[gcc r15-8695] Revert "AVX10.2 ymm rounding: Support vreducep{s, d, h} and vrndscalep{s, d, h} intrins"

https://gcc.gnu.org/g:0ca02194d25a7759c05cfc213941fdae73537a96 commit r15-8695-g0ca02194d25a7759c05cfc213941fdae73537a96 Author: Haochen Jiang Date: Mon Mar 24 14:23:45 2025 +0800 Revert "AVX10.2 ymm rounding: Support vreducep{s,d,h} and vrndscalep{s,d,h} intrins" This reverts co

[gcc r15-8698] Revert "AVX10.2 ymm rounding: Support vgetexpp{s, d, h} and vgetmantp{s, d, h} intrins"

https://gcc.gnu.org/g:0e2a74bf745c4aa05a186a7c21e660cad01d4c1c commit r15-8698-g0e2a74bf745c4aa05a186a7c21e660cad01d4c1c Author: Haochen Jiang Date: Mon Mar 24 14:23:54 2025 +0800 Revert "AVX10.2 ymm rounding: Support vgetexpp{s,d,h} and vgetmantp{s,d,h} intrins" This reverts com

[gcc r15-8693] Revert "AVX10.2 ymm rounding: Support vsqrtp{s, d, h} and vsubp{s, d, h} intrins"

https://gcc.gnu.org/g:dd4dac26025f06e99afa983e68323a004c28622e commit r15-8693-gdd4dac26025f06e99afa983e68323a004c28622e Author: Haochen Jiang Date: Mon Mar 24 14:23:42 2025 +0800 Revert "AVX10.2 ymm rounding: Support vsqrtp{s,d,h} and vsubp{s,d,h} intrins" This reverts commit 7f

[gcc r15-8694] Revert "AVX10.2 ymm rounding: Support vscalefp{s, d, h} intrins"

https://gcc.gnu.org/g:cbed647fb6484d751c0b544d4ece3f478aa50d08 commit r15-8694-gcbed647fb6484d751c0b544d4ece3f478aa50d08 Author: Haochen Jiang Date: Mon Mar 24 14:23:43 2025 +0800 Revert "AVX10.2 ymm rounding: Support vscalefp{s,d,h} intrins" This reverts commit 1f86cf06c7897f6ab4

[gcc r15-8697] Revert "AVX10.2 ymm rounding: Support v{max, min}p{s, d, h} intrins"

https://gcc.gnu.org/g:3fc26227878727cde701bb37de2818d44c256914 commit r15-8697-g3fc26227878727cde701bb37de2818d44c256914 Author: Haochen Jiang Date: Mon Mar 24 14:23:52 2025 +0800 Revert "AVX10.2 ymm rounding: Support v{max,min}p{s,d,h} intrins" This reverts commit cc8a7596477e9d6

[gcc r15-8692] i386: Remove 256 bit rounding for AVX10.2 saturation convert instructions

https://gcc.gnu.org/g:bf54429c8dc0118587b969b4f9ce0f08c8c08115 commit r15-8692-gbf54429c8dc0118587b969b4f9ce0f08c8c08115 Author: Haochen Jiang Date: Mon Mar 24 14:23:40 2025 +0800 i386: Remove 256 bit rounding for AVX10.2 saturation convert instructions Since we will support 512 b

[gcc r15-8246] i386: Remove XFAIL for pr103750 testcases

https://gcc.gnu.org/g:289867bb298507d7c99a30f92d650a86df99225f commit r15-8246-g289867bb298507d7c99a30f92d650a86df99225f Author: Haochen Jiang Date: Tue Mar 11 10:52:46 2025 +0800 i386: Remove XFAIL for pr103750 testcases After commit r15-4510, the following testcases also do not

[gcc r15-7876] i386: Correct mask width for bf8->fp16 intrin on 256/512 bit

https://gcc.gnu.org/g:a1eaeac63adc4e20b7e74290fdbe51725d40ddeb commit r15-7876-ga1eaeac63adc4e20b7e74290fdbe51725d40ddeb Author: Haochen Jiang Date: Wed Mar 5 10:35:11 2025 +0800 i386: Correct mask width for bf8->fp16 intrin on 256/512 bit For bf8 -> fp16 convert, when dst is 256

[gcc r13-9401] i386: Treat Granite Rapids/Granite Rapids-D similar as Sapphire Rapids in x86-tune.def

https://gcc.gnu.org/g:bc3fd553305933e5dd504790781aace3b0d0bf6f commit r13-9401-gbc3fd553305933e5dd504790781aace3b0d0bf6f Author: Haochen Jiang Date: Wed Feb 26 11:28:45 2025 +0800 i386: Treat Granite Rapids/Granite Rapids-D similar as Sapphire Rapids in x86-tune.def Since GNR, GN

[gcc r14-11345] i386: Treat Granite Rapids/Granite Rapids-D similar as Sapphire Rapids in x86-tune.def

https://gcc.gnu.org/g:ba488a332ad171eff17c1f135c111c5730f4ce25 commit r14-11345-gba488a332ad171eff17c1f135c111c5730f4ce25 Author: Haochen Jiang Date: Wed Feb 26 11:28:45 2025 +0800 i386: Treat Granite Rapids/Granite Rapids-D similar as Sapphire Rapids in x86-tune.def Since GNR, G

[gcc r15-7725] i386: Treat Granite Rapids/Granite Rapids-D/Diamond Rapids similar as Sapphire Rapids in x86-tune.de

https://gcc.gnu.org/g:44c4a72061e86259d3defd3d1c7911f453043e3c commit r15-7725-g44c4a72061e86259d3defd3d1c7911f453043e3c Author: Haochen Jiang Date: Wed Feb 26 11:28:45 2025 +0800 i386: Treat Granite Rapids/Granite Rapids-D/Diamond Rapids similar as Sapphire Rapids in x86-tune.def

[gcc r15-7599] i386: Re-order i386.opt.urls

https://gcc.gnu.org/g:101e3101e0f311ed7cbd775f5db50ac04af71086 commit r15-7599-g101e3101e0f311ed7cbd775f5db50ac04af71086 Author: Haochen Jiang Date: Tue Feb 18 10:59:11 2025 +0800 i386: Re-order i386.opt.urls The order of i386.opt.urls need to be the same as i386.opt. gcc

[gcc r14-11315] i386: Deprecate -m[no-]avx10.1 and make -mno-avx10.1-512 to disable the whole AVX10.1

https://gcc.gnu.org/g:de562367d344758ea9264992e884f031d4435688 commit r14-11315-gde562367d344758ea9264992e884f031d4435688 Author: Haochen Jiang Date: Tue Feb 11 11:29:34 2025 +0800 i386: Deprecate -m[no-]avx10.1 and make -mno-avx10.1-512 to disable the whole AVX10.1 Based on the

[gcc r15-7585] i386: Regenerate i386.opt.urls

https://gcc.gnu.org/g:46276080e726421f6683db08e2bb42fd8d3367a6 commit r15-7585-g46276080e726421f6683db08e2bb42fd8d3367a6 Author: Haochen Jiang Date: Mon Feb 17 14:04:49 2025 +0800 i386: Regenerate i386.opt.urls We need to regenerate i386.opt.urls after removing -mavx10.1.

[gcc r15-7583] i386: Deprecate -m[no-]avx10.1 and make -mno-avx10.1-512 to disable the whole AVX10.1

https://gcc.gnu.org/g:e4f4a5c85e08fb5b9945ba72f07069b2ea7d34e7 commit r15-7583-ge4f4a5c85e08fb5b9945ba72f07069b2ea7d34e7 Author: Haochen Jiang Date: Tue Feb 11 11:29:34 2025 +0800 i386: Deprecate -m[no-]avx10.1 and make -mno-avx10.1-512 to disable the whole AVX10.1 Based on the f

[gcc r15-7584] i386: Re-alias avx10.2 to 512 bit and deprecate -mno-avx10.2-[256, 512]

https://gcc.gnu.org/g:9ea56e2a3e1e172873a3ed0be34c4d252b06de9e commit r15-7584-g9ea56e2a3e1e172873a3ed0be34c4d252b06de9e Author: Haochen Jiang Date: Tue Feb 11 11:29:43 2025 +0800 i386: Re-alias avx10.2 to 512 bit and deprecate -mno-avx10.2-[256,512] As mentioned in avx10.1 option

[gcc r14-11314] i386: Do not check vector size conflict when AVX512 is not explicitly set [PR 118815]

https://gcc.gnu.org/g:31cbac836bb4f4c2172a91ee6164d8fdd32a8cb8 commit r14-11314-g31cbac836bb4f4c2172a91ee6164d8fdd32a8cb8 Author: Haochen Jiang Date: Mon Feb 10 16:53:27 2025 +0800 i386: Do not check vector size conflict when AVX512 is not explicitly set [PR 118815] When AVX512 i

[gcc r15-7582] i386: Do not check vector size conflict when AVX512 is not explicitly set [PR 118815]

https://gcc.gnu.org/g:e15216046dba02ffa1c3ae367cdc86d5fd3df0be commit r15-7582-ge15216046dba02ffa1c3ae367cdc86d5fd3df0be Author: Haochen Jiang Date: Mon Feb 10 16:53:27 2025 +0800 i386: Do not check vector size conflict when AVX512 is not explicitly set [PR 118815] When AVX512 is

[gcc r15-7464] i386: Fix AVX512BW intrin header with __OPTIMIZE__ [PR 118813]

https://gcc.gnu.org/g:30a3a557a54c1b3166d76624898779c3646d02b2 commit r15-7464-g30a3a557a54c1b3166d76624898779c3646d02b2 Author: Haochen Jiang Date: Mon Feb 10 14:00:57 2025 +0800 i386: Fix AVX512BW intrin header with __OPTIMIZE__ [PR 118813] When moving intrins around for AVX10 i

[gcc r14-11300] i386: Fix AVX512BW intrin header with __OPTIMIZE__ [PR 118813]

https://gcc.gnu.org/g:cec0326137ef91e2910a9c70eb9743f032e87137 commit r14-11300-gcec0326137ef91e2910a9c70eb9743f032e87137 Author: Haochen Jiang Date: Mon Feb 10 14:00:57 2025 +0800 i386: Fix AVX512BW intrin header with __OPTIMIZE__ [PR 118813] When moving intrins around for AVX10

[gcc r15-7140] i386: Change mnemonics from VCOMSBF16 to VCOMISBF16

https://gcc.gnu.org/g:a75896c142f845831a81f818dd329e87736c05a9 commit r15-7140-ga75896c142f845831a81f818dd329e87736c05a9 Author: Haochen Jiang Date: Thu Jan 23 09:52:06 2025 +0800 i386: Change mnemonics from VCOMSBF16 to VCOMISBF16 Besides mnemonics change, this patch also use the

[gcc r15-7142] i386: Change mnemonics from VCVTNEPH2[B, H]F8 to VCVTPH2[B, H]F8

https://gcc.gnu.org/g:f1056463cb4c7950fc1bada6485c14df71ea3dd7 commit r15-7142-gf1056463cb4c7950fc1bada6485c14df71ea3dd7 Author: Haochen Jiang Date: Thu Jan 23 09:52:20 2025 +0800 i386: Change mnemonics from VCVTNEPH2[B,H]F8 to VCVTPH2[B,H]F8 gcc/ChangeLog: PR tar

[gcc r15-7144] i386: Omit "p" for packed in intrin name for FP8 convert

https://gcc.gnu.org/g:06b78732f7ce424ab7d8c619f1ea90936fedff51 commit r15-7144-g06b78732f7ce424ab7d8c619f1ea90936fedff51 Author: Haochen Jiang Date: Thu Jan 23 09:52:29 2025 +0800 i386: Omit "p" for packed in intrin name for FP8 convert gcc/ChangeLog: * config/i38

[gcc r15-7139] i386: Change mnemonics from V[GETEXP, FPCLASS]PBF16 to V[GETEXP, FPCLASS]BF16

https://gcc.gnu.org/g:a3e198853031504b5a71373ff09c33ee5be1a824 commit r15-7139-ga3e198853031504b5a71373ff09c33ee5be1a824 Author: Haochen Jiang Date: Thu Jan 23 09:52:04 2025 +0800 i386: Change mnemonics from V[GETEXP,FPCLASS]PBF16 to V[GETEXP,FPCLASS]BF16 Besides mnemonics change,

[gcc r15-7143] i386: Change mnemonics from VCVT[, T]NEBF162I[, U]BS to VCVT[, T]BF162I[, U]BS

https://gcc.gnu.org/g:f1f281324b23e602436a10404c4b3a671d7f6f06 commit r15-7143-gf1f281324b23e602436a10404c4b3a671d7f6f06 Author: Haochen Jiang Date: Thu Jan 23 09:52:28 2025 +0800 i386: Change mnemonics from VCVT[,T]NEBF162I[,U]BS to VCVT[,T]BF162I[,U]BS gcc/ChangeLog:

[gcc r15-7137] i386: Change mnemonics from V[GETMANT, REDUCENE, RNDSCALENE]PBF16 to V[GETMANT, REDUCE, RNDSCALE]BF16

https://gcc.gnu.org/g:71a27375d09ec6b4dee3938b6d1ed6762ecdcfea commit r15-7137-g71a27375d09ec6b4dee3938b6d1ed6762ecdcfea Author: Haochen Jiang Date: Thu Jan 23 09:52:01 2025 +0800 i386: Change mnemonics from V[GETMANT,REDUCENE,RNDSCALENE]PBF16 to V[GETMANT,REDUCE,RNDSCALE]BF16 gc

[gcc r15-7136] i386: Change mnemonics from VMINMAXNEPBF16 to VMINMAXBF16

https://gcc.gnu.org/g:5472f5185c0c78483f0d4e078e974030d7b5dccd commit r15-7136-g5472f5185c0c78483f0d4e078e974030d7b5dccd Author: Haochen Jiang Date: Thu Jan 23 09:52:00 2025 +0800 i386: Change mnemonics from VMINMAXNEPBF16 to VMINMAXBF16 gcc/ChangeLog: PR target/1

[gcc r15-7141] i386: Change mnemonics from VCVTNE2PH2[B, H]F8 to VCVT2PH2[B, H]F8

https://gcc.gnu.org/g:cfef82be8973c9dc481c96306ba3e2c342398e48 commit r15-7141-gcfef82be8973c9dc481c96306ba3e2c342398e48 Author: Haochen Jiang Date: Thu Jan 23 09:52:16 2025 +0800 i386: Change mnemonics from VCVTNE2PH2[B,H]F8 to VCVT2PH2[B,H]F8 gcc/ChangeLog: PR t

[gcc r15-7138] i386: Change mnemonics from V[RSQRT, SCALEF, SQRTNE]PBF16 to V[RSQRT, SCALEF, SQRT]BF16

https://gcc.gnu.org/g:d4d5935f124ab72bb32d76ba8467aa2cdbc2a329 commit r15-7138-gd4d5935f124ab72bb32d76ba8467aa2cdbc2a329 Author: Haochen Jiang Date: Thu Jan 23 09:52:03 2025 +0800 i386: Change mnemonics from V[RSQRT,SCALEF,SQRTNE]PBF16 to V[RSQRT,SCALEF,SQRT]BF16 gcc/ChangeLog:

[gcc r15-7134] i386: Change mnemonics from VF[, N]M[ADD, SUB][132, 213, 231]NEPBF16 to VF[, N]M[ADD, SUB][132, 213, 231]BF1

https://gcc.gnu.org/g:d584660fd44c714855c5295b45cb4a06f1d82e58 commit r15-7134-gd584660fd44c714855c5295b45cb4a06f1d82e58 Author: Haochen Jiang Date: Thu Jan 23 09:51:57 2025 +0800 i386: Change mnemonics from VF[,N]M[ADD,SUB][132,213,231]NEPBF16 to VF[,N]M[ADD,SUB][132,213,231]BF16

[gcc r15-7135] i386: Change mnemonics from V[CMP, MAX, MIN]PBF16 to V[CMP, MAX, MIN]BF16

https://gcc.gnu.org/g:7f59b88279963cd05d2c2620a03d8ddc9b7a2775 commit r15-7135-g7f59b88279963cd05d2c2620a03d8ddc9b7a2775 Author: Haochen Jiang Date: Thu Jan 23 09:51:59 2025 +0800 i386: Change mnemonics from V[CMP,MAX,MIN]PBF16 to V[CMP,MAX,MIN]BF16 gcc/ChangeLog:

[gcc r15-7133] i386: Change mnemonics from V[ADDNE, DIVNE, MULNE, RCP, SUBNE]PBF16 to V[ADD, DIV, MUL, RCP, SUB]BF16

https://gcc.gnu.org/g:b2667fca938c393579e6e4ae9144ff5111ee8b8f commit r15-7133-gb2667fca938c393579e6e4ae9144ff5111ee8b8f Author: Haochen Jiang Date: Thu Jan 23 09:51:56 2025 +0800 i386: Change mnemonics from V[ADDNE,DIVNE,MULNE,RCP,SUBNE]PBF16 to V[ADD,DIV,MUL,RCP,SUB]BF16 gcc/Ch

[gcc r15-7132] i386: Enhance AMX tests

https://gcc.gnu.org/g:a19aca8afbf141bb550e9040135cc46387ce7f73 commit r15-7132-ga19aca8afbf141bb550e9040135cc46387ce7f73 Author: Haochen Jiang Date: Thu Jan 23 09:51:54 2025 +0800 i386: Enhance AMX tests After Binutils got changed, the previous usage on intrin will raise warni

[gcc r15-7131] i386: Append -march=x86-64-v3 to AVX10.2/512 VNNI testcases

https://gcc.gnu.org/g:447a01c1712c362c6b1a955ad8433a9a85af43e0 commit r15-7131-g447a01c1712c362c6b1a955ad8433a9a85af43e0 Author: Haochen Jiang Date: Thu Jan 23 09:51:52 2025 +0800 i386: Append -march=x86-64-v3 to AVX10.2/512 VNNI testcases These two testcases are misses on previou

[gcc r15-6723] i386: Remove not used model number for Diamond Rapids

https://gcc.gnu.org/g:b37628e4ae7e5e0a70a562c3b23d22964ead1ad2 commit r15-6723-gb37628e4ae7e5e0a70a562c3b23d22964ead1ad2 Author: Haochen Jiang Date: Wed Jan 8 14:44:56 2025 +0800 i386: Remove not used model number for Diamond Rapids In ISE, The model number for Diamond Rapids is 1

[gcc r15-6680] i386: Change mnemonics from TCVTROWPS2PBF16[H, L] to TCVTROWPS2BF16[H, L]

https://gcc.gnu.org/g:814cbfc91a3c9f4286d13d04075287f6dac76e74 commit r15-6680-g814cbfc91a3c9f4286d13d04075287f6dac76e74 Author: Haochen Jiang Date: Thu Jan 2 16:55:34 2025 +0800 i386: Change mnemonics from TCVTROWPS2PBF16[H,L] to TCVTROWPS2BF16[H,L] In ISE056, the mnemonics for T

[gcc r15-5665] i386/testsuite: Correct AVX10.2 FP8 test mask usage

https://gcc.gnu.org/g:efb1d2e2368e60da3c691ee3cb510ee690d1fa2a commit r15-5665-gefb1d2e2368e60da3c691ee3cb510ee690d1fa2a Author: Haochen Jiang Date: Fri Nov 22 15:57:47 2024 +0800 i386/testsuite: Correct AVX10.2 FP8 test mask usage Under FP8, we should not use AVX512F_LEN_HALF to

[gcc r15-5642] i386/testsuite: Do not append AVX10.2 option for check_effective_target

https://gcc.gnu.org/g:832e963a477268e023b0fae4e8c59d29be8e7f42 commit r15-5642-g832e963a477268e023b0fae4e8c59d29be8e7f42 Author: Haochen Jiang Date: Fri Nov 22 14:32:16 2024 +0800 i386/testsuite: Do not append AVX10.2 option for check_effective_target When -avx10.2 meet -march wit

[gcc r15-5582] i386/testsuite: Enhance AVX10.2 vmovd/w testcases

https://gcc.gnu.org/g:45135f9d5f7316d1256813d808b0f37287ba77d3 commit r15-5582-g45135f9d5f7316d1256813d808b0f37287ba77d3 Author: Haochen Jiang Date: Thu Nov 21 14:31:26 2024 +0800 i386/testsuite: Enhance AVX10.2 vmovd/w testcases Under -fno-omit-frame-pointer, %ebp will be used, w

[gcc r13-9186] testsuite: Correct dg-error to dg-warning for cmpccxadd testcase in GCC13

https://gcc.gnu.org/g:68fd1665f0f8e4e59c645ea6cd97a69bb799d339 commit r13-9186-g68fd1665f0f8e4e59c645ea6cd97a69bb799d339 Author: Haochen Jiang Date: Thu Nov 14 11:06:01 2024 +0800 testsuite: Correct dg-error to dg-warning for cmpccxadd testcase in GCC13 In GCC13, the error for GCC

[gcc r14-10916] i386: Add new model number for Arrow Lake

https://gcc.gnu.org/g:4380d6f8acc878fbdeb6ce86f4be64d340bdfd4b commit r14-10916-g4380d6f8acc878fbdeb6ce86f4be64d340bdfd4b Author: Haochen Jiang Date: Mon Nov 11 10:52:33 2024 +0800 i386: Add new model number for Arrow Lake gcc/ChangeLog: * common/config/i386/cpuin

[gcc r15-5073] Initial Diamond Rapids Support

https://gcc.gnu.org/g:74ae651bd61a7128c77ca08328956564fd49a23b commit r15-5073-g74ae651bd61a7128c77ca08328956564fd49a23b Author: Haochen Jiang Date: Mon Nov 11 10:48:16 2024 +0800 Initial Diamond Rapids Support gcc/ChangeLog: * common/config/i386/cpuinfo.h

[gcc r15-5072] i386: Add new model number for Arrow Lake

https://gcc.gnu.org/g:c659e293d6fcf53466502dd5389b03e9a295c14d commit r15-5072-gc659e293d6fcf53466502dd5389b03e9a295c14d Author: Haochen Jiang Date: Mon Nov 11 10:48:14 2024 +0800 i386: Add new model number for Arrow Lake gcc/ChangeLog: * common/config/i386/cpuinf

[gcc r13-9162] i386: Do not allow pointer conversion for CMPccXADD intrin under -O0

https://gcc.gnu.org/g:100751c7905d6866540ca243135629994d3fd032 commit r13-9162-g100751c7905d6866540ca243135629994d3fd032 Author: Haochen Jiang Date: Fri Nov 1 15:59:47 2024 +0800 i386: Do not allow pointer conversion for CMPccXADD intrin under -O0 The pointer conversion to wider t

[gcc r14-10864] i386: Do not allow pointer conversion for CMPccXADD intrin under -O0

https://gcc.gnu.org/g:82bfb6c5ba6d1f84472271f367221988cd50f478 commit r14-10864-g82bfb6c5ba6d1f84472271f367221988cd50f478 Author: Haochen Jiang Date: Fri Nov 1 15:59:47 2024 +0800 i386: Do not allow pointer conversion for CMPccXADD intrin under -O0 The pointer conversion to wider

[gcc r15-4847] Use IN_RANGE in prefetch builtin

https://gcc.gnu.org/g:79a75b1f551821687e1ce27a82ee39b802ace2b4 commit r15-4847-g79a75b1f551821687e1ce27a82ee39b802ace2b4 Author: Haochen Jiang Date: Fri Nov 1 16:42:12 2024 +0800 Use IN_RANGE in prefetch builtin These are the last minute changes that should apply to MOVRS patch bu

[gcc r15-4846] i386: Do not allow pointer conversion for CMPccXADD intrin under -O0

https://gcc.gnu.org/g:c5a36c4e591e41efe3e4d892ff62831d801752d3 commit r15-4846-gc5a36c4e591e41efe3e4d892ff62831d801752d3 Author: Haochen Jiang Date: Fri Nov 1 15:59:47 2024 +0800 i386: Do not allow pointer conversion for CMPccXADD intrin under -O0 The pointer conversion to wider t

[gcc r15-4831] Support Intel AMX-TRANSPOSE

https://gcc.gnu.org/g:9f2f36a7db9070a9d6e1f0fb736a12217651d169 commit r15-4831-g9f2f36a7db9070a9d6e1f0fb736a12217651d169 Author: Haochen Jiang Date: Fri Nov 1 10:04:38 2024 +0800 Support Intel AMX-TRANSPOSE gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_availa

[gcc r15-4828] Support Intel SM4 EVEX instructions

https://gcc.gnu.org/g:8ee5cd4b84489bee0f72153e96a9afe9493e170d commit r15-4828-g8ee5cd4b84489bee0f72153e96a9afe9493e170d Author: Haochen Jiang Date: Fri Nov 1 10:04:27 2024 +0800 Support Intel SM4 EVEX instructions gcc/ChangeLog: * config/i386/i386-builtin-types.d

[gcc r15-4834] Support Intel AMX-MOVRS

https://gcc.gnu.org/g:f8ae2cce23fc6c36dc553cc90e0091cdbc8dda22 commit r15-4834-gf8ae2cce23fc6c36dc553cc90e0091cdbc8dda22 Author: Hu, Lin1 Date: Fri Nov 1 10:04:43 2024 +0800 Support Intel AMX-MOVRS gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_available_featu

[gcc r15-4833] Support Intel MOVRS

https://gcc.gnu.org/g:e9ab41b79933d42410126f0eb7b29f820745276c commit r15-4833-ge9ab41b79933d42410126f0eb7b29f820745276c Author: Hu, Lin1 Date: Fri Nov 1 10:04:40 2024 +0800 Support Intel MOVRS gcc/ChangeLog: * builtins.cc (expand_builtin_prefetch): Expand for

[gcc r15-4832] Support Intel AMX-FP8

https://gcc.gnu.org/g:dd859e93a16704448e70b5941711ecd626e098ba commit r15-4832-gdd859e93a16704448e70b5941711ecd626e098ba Author: Liwei Xu Date: Fri Nov 1 10:04:39 2024 +0800 Support Intel AMX-FP8 gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_avail

[gcc r15-4830] Support Intel AMX-TF32

https://gcc.gnu.org/g:8cc38abf575381905eb3a869b0874bdaddb608bb commit r15-4830-g8cc38abf575381905eb3a869b0874bdaddb608bb Author: Haochen Jiang Date: Fri Nov 1 10:04:36 2024 +0800 Support Intel AMX-TF32 gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_available_f

[gcc r15-4829] Support Intel AMX-AVX512

https://gcc.gnu.org/g:343f8113385d00e9ffac53150bca4f78be30e19c commit r15-4829-g343f8113385d00e9ffac53150bca4f78be30e19c Author: Haochen Jiang Date: Fri Nov 1 10:04:34 2024 +0800 Support Intel AMX-AVX512 gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_available

[gcc r15-4765] testsuite: Adjust AVX10.2 check_effective_target

https://gcc.gnu.org/g:12086865232382f93081d5564ff44b14bd71341c commit r15-4765-g12086865232382f93081d5564ff44b14bd71341c Author: Haochen Jiang Date: Tue Oct 29 15:51:14 2024 +0800 testsuite: Adjust AVX10.2 check_effective_target Since Binutils haven't fully merged all AVX10.2 inst

[gcc r15-4513] i386: Refactor get_intel_cpu

https://gcc.gnu.org/g:f132c006d78a4e504626c0b23b69655ffeb5f5e7 commit r15-4513-gf132c006d78a4e504626c0b23b69655ffeb5f5e7 Author: Haochen Jiang Date: Mon Oct 21 13:42:12 2024 +0800 i386: Refactor get_intel_cpu From ISE, it shows that we will have family 0x13 for Diamond Rapids.

[gcc r15-4420] testsuite: Fix typos for AVX10.2 convert testcases

https://gcc.gnu.org/g:e3257c12b789ba2fd89baea566417c91c4468cc3 commit r15-4420-ge3257c12b789ba2fd89baea566417c91c4468cc3 Author: Victor Rodriguez Date: Thu Oct 17 10:55:56 2024 +0800 testsuite: Fix typos for AVX10.2 convert testcases Fix typos related to types for vcvtne[,2]ph[b,h

[gcc r15-4407] testsuite: Add -march=x86-64-v3 to AVX10 testcases to slience warning for GCC built with AVX512 arch

https://gcc.gnu.org/g:8b9b696c98def874139effc0380929df4a4356f0 commit r15-4407-g8b9b696c98def874139effc0380929df4a4356f0 Author: Haochen Jiang Date: Wed Oct 16 15:40:12 2024 +0800 testsuite: Add -march=x86-64-v3 to AVX10 testcases to slience warning for GCC built with AVX512 arch

[gcc r14-10689] doc: Add more alias option and reorder Intel CPU -march documentation

https://gcc.gnu.org/g:a3efd2ff9db0545d0f504153a6a0195e1c92e5cf commit r14-10689-ga3efd2ff9db0545d0f504153a6a0195e1c92e5cf Author: Haochen Jiang Date: Wed Sep 18 11:20:15 2024 +0800 doc: Add more alias option and reorder Intel CPU -march documentation This patch is backported from

[gcc r12-10716] doc: Add more alias option and reorder Intel CPU -march documentation

https://gcc.gnu.org/g:8483527158024d200b3a9e4edecbe188fa22fdaa commit r12-10716-g8483527158024d200b3a9e4edecbe188fa22fdaa Author: Haochen Jiang Date: Wed Sep 18 11:20:15 2024 +0800 doc: Add more alias option and reorder Intel CPU -march documentation This patch is backported from

[gcc r13-9044] doc: Add more alias option and reorder Intel CPU -march documentation

https://gcc.gnu.org/g:de1d625849a7760da5d5a3a08601d8ac890c6100 commit r13-9044-gde1d625849a7760da5d5a3a08601d8ac890c6100 Author: Haochen Jiang Date: Wed Sep 18 11:20:15 2024 +0800 doc: Add more alias option and reorder Intel CPU -march documentation This patch is backported from G

[gcc r15-3702] doc: Add more alias option and reorder Intel CPU -march documentation

https://gcc.gnu.org/g:877fb9bdb06d18df51c6043f74dde66fe6f46b78 commit r15-3702-g877fb9bdb06d18df51c6043f74dde66fe6f46b78 Author: Haochen Jiang Date: Wed Sep 18 11:20:15 2024 +0800 doc: Add more alias option and reorder Intel CPU -march documentation Since r15-3539, there are reque

[gcc r15-3701] i386: Enhance AVX10.2 convert tests

https://gcc.gnu.org/g:89e62d42f366cd835022f0ba00ba1d10305ae0ce commit r15-3701-g89e62d42f366cd835022f0ba00ba1d10305ae0ce Author: Haochen Jiang Date: Thu Sep 5 11:27:33 2024 +0800 i386: Enhance AVX10.2 convert tests For AVX10.2 convert tests, all of them are missing mask tests

[gcc r15-3700] i386: Add missing avx512f-mask-type.h include

https://gcc.gnu.org/g:2b7b8d3bb52a23aa8b1d6e9a2d57c83db2078f73 commit r15-3700-g2b7b8d3bb52a23aa8b1d6e9a2d57c83db2078f73 Author: Haochen Jiang Date: Sat Sep 14 15:55:53 2024 +0800 i386: Add missing avx512f-mask-type.h include Since commit r15-3594, we fixed the bugs in MASK_TYPE f

[gcc r15-3594] i386: Fix incorrect avx512f-mask-type.h include

https://gcc.gnu.org/g:5958279509c4601499ac22629512f1723e6744b4 commit r15-3594-g5958279509c4601499ac22629512f1723e6744b4 Author: Haochen Jiang Date: Tue Sep 3 13:38:36 2024 +0800 i386: Fix incorrect avx512f-mask-type.h include In avx512f-mask-type.h, we need SIZE being defined to

[gcc r13-9011] doc: Enhance Intel CPU documentation

https://gcc.gnu.org/g:0a16b1b97c112e41a0d37235e83678a67abd9454 commit r13-9011-g0a16b1b97c112e41a0d37235e83678a67abd9454 Author: Haochen Jiang Date: Fri Sep 6 11:19:26 2024 +0800 doc: Enhance Intel CPU documentation This patch will add those recent aliased CPU names into documenta

[gcc r14-10658] doc: Enhance Intel CPU documentation

https://gcc.gnu.org/g:3951efed1cce970a5c61eacbad7e5f5314a9fc17 commit r14-10658-g3951efed1cce970a5c61eacbad7e5f5314a9fc17 Author: Haochen Jiang Date: Fri Sep 6 11:19:26 2024 +0800 doc: Enhance Intel CPU documentation This patch will add those recent aliased CPU names into document

[gcc r15-3539] doc: Enhance Intel CPU documentation

https://gcc.gnu.org/g:91bc2ad28c58ca3f4c2f96601d8af51f570e08c4 commit r15-3539-g91bc2ad28c58ca3f4c2f96601d8af51f570e08c4 Author: Haochen Jiang Date: Fri Sep 6 11:19:26 2024 +0800 doc: Enhance Intel CPU documentation This patch will add those recent aliased CPU names into documenta

[gcc r14-10627] i386: Fix vfpclassph non-optimizied intrin

https://gcc.gnu.org/g:59157c038d683e91c419a1fadd5f91f15218f57b commit r14-10627-g59157c038d683e91c419a1fadd5f91f15218f57b Author: Haochen Jiang Date: Mon Sep 2 15:00:22 2024 +0800 i386: Fix vfpclassph non-optimizied intrin The intrin for non-optimized got a typo in mask type, whic

[gcc r13-9002] i386: Fix vfpclassph non-optimizied intrin

https://gcc.gnu.org/g:e152aee5709dd3e341ef965450500f754f8b0a46 commit r13-9002-ge152aee5709dd3e341ef965450500f754f8b0a46 Author: Haochen Jiang Date: Mon Sep 2 15:00:22 2024 +0800 i386: Fix vfpclassph non-optimizied intrin The intrin for non-optimized got a typo in mask type, which

[gcc r12-10696] i386: Fix vfpclassph non-optimizied intrin

https://gcc.gnu.org/g:6e59b188c4a051d4f2de5220d30681e6963d96c0 commit r12-10696-g6e59b188c4a051d4f2de5220d30681e6963d96c0 Author: Haochen Jiang Date: Mon Sep 2 15:00:22 2024 +0800 i386: Fix vfpclassph non-optimizied intrin The intrin for non-optimized got a typo in mask type, whic

[gcc r15-3410] i386: Fix vfpclassph non-optimizied intrin

https://gcc.gnu.org/g:9b312595f9ac073f55d858b6f833097608b40bba commit r15-3410-g9b312595f9ac073f55d858b6f833097608b40bba Author: Haochen Jiang Date: Mon Sep 2 15:00:22 2024 +0800 i386: Fix vfpclassph non-optimizied intrin The intrin for non-optimized got a typo in mask type, which

[gcc r15-3359] i386: Support vec_cmp for V8BF/V16BF/V32BF in AVX10.2

https://gcc.gnu.org/g:f77435aa3911c437cba71991509eee57b333b3ce commit r15-3359-gf77435aa3911c437cba71991509eee57b333b3ce Author: Levy Hsu Date: Mon Sep 2 10:24:49 2024 +0800 i386: Support vec_cmp for V8BF/V16BF/V32BF in AVX10.2 gcc/ChangeLog: * config/i386/i386-ex

[gcc r15-3358] i386: Support vectorized BF16 sqrt with AVX10.2 instruction

https://gcc.gnu.org/g:e19f65b0be1e91ff86689feb7695080dad4c9197 commit r15-3358-ge19f65b0be1e91ff86689feb7695080dad4c9197 Author: Levy Hsu Date: Mon Sep 2 10:24:48 2024 +0800 i386: Support vectorized BF16 sqrt with AVX10.2 instruction gcc/ChangeLog: * config/i386/s

[gcc r15-3356] i386: Support vectorized BF16 FMA with AVX10.2 instructions

https://gcc.gnu.org/g:6d294fb8ac9baf2624446deaa4c995b7a7719823 commit r15-3356-g6d294fb8ac9baf2624446deaa4c995b7a7719823 Author: Levy Hsu Date: Mon Sep 2 10:24:46 2024 +0800 i386: Support vectorized BF16 FMA with AVX10.2 instructions gcc/ChangeLog: * config/i386/s

[gcc r15-3357] i386: Support vectorized BF16 smaxmin with AVX10.2 instructions

https://gcc.gnu.org/g:29ef601973d7b79338694e59581d4c24bcd07f69 commit r15-3357-g29ef601973d7b79338694e59581d4c24bcd07f69 Author: Levy Hsu Date: Mon Sep 2 10:24:47 2024 +0800 i386: Support vectorized BF16 smaxmin with AVX10.2 instructions gcc/ChangeLog: * config/i3

[gcc r15-3355] i386: Support vectorized BF16 add/sub/mul/div with AVX10.2 instructions

https://gcc.gnu.org/g:f82fa0da4d9e1fdaf5e4edd70364d5781534ce11 commit r15-3355-gf82fa0da4d9e1fdaf5e4edd70364d5781534ce11 Author: Levy Hsu Date: Mon Sep 2 10:24:45 2024 +0800 i386: Support vectorized BF16 add/sub/mul/div with AVX10.2 instructions AVX10.2 introduces several non-exce

[gcc r15-3354] i386: Optimize generate insn for AVX10.2 compare

https://gcc.gnu.org/g:3b1decef83003db9cf8667977c293435c0f3d024 commit r15-3354-g3b1decef83003db9cf8667977c293435c0f3d024 Author: Hu, Lin1 Date: Mon Sep 2 10:24:36 2024 +0800 i386: Optimize generate insn for AVX10.2 compare gcc/ChangeLog: * config/i386/i386-expand.

[gcc r15-3353] i386: Optimize ordered and nonequal

https://gcc.gnu.org/g:86f5031c804220274a9bbebd26b8ebf47a2207ac commit r15-3353-g86f5031c804220274a9bbebd26b8ebf47a2207ac Author: Hu, Lin1 Date: Mon Sep 2 10:24:31 2024 +0800 i386: Optimize ordered and nonequal Currently, when we input !__builtin_isunordered (a, b) && (a != b), gcc

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