https://gcc.gnu.org/g:f000ed0a034cc99cdc17eb5cfc8f8258f883ed44
commit r15-10012-gf000ed0a034cc99cdc17eb5cfc8f8258f883ed44
Author: H.J. Lu
Date: Wed Jul 9 09:43:52 2025 +0800
libstdc++: Update some baseline_symbols.txt (x32)
* config/abi/post/x86_64-linux-gnu/x32/baseline_s
https://gcc.gnu.org/g:7e6a220b18df8ef13dde7c19407f4341ff16f091
commit r13-9799-g7e6a220b18df8ef13dde7c19407f4341ff16f091
Author: H.J. Lu
Date: Thu Jul 3 10:54:39 2025 +0800
x86-64: Add RDI clobber to 64-bit dynamic TLS patterns
*tls_global_dynamic_64_largepic, *tls_local_dynamic_6
https://gcc.gnu.org/g:536ed87cfb3a1453730411f217fa119b87ffaf90
commit r13-9798-g536ed87cfb3a1453730411f217fa119b87ffaf90
Author: H.J. Lu
Date: Tue Jul 1 17:17:06 2025 +0800
x86-64: Add RDI clobber to tls_global_dynamic_64 patterns
*tls_global_dynamic_64_ uses RDI as the __tls_get_
https://gcc.gnu.org/g:59db34888d289dae8fae2bcbf5e435be53da0edc
commit r14-11896-g59db34888d289dae8fae2bcbf5e435be53da0edc
Author: H.J. Lu
Date: Thu Jul 3 10:54:39 2025 +0800
x86-64: Add RDI clobber to 64-bit dynamic TLS patterns
*tls_global_dynamic_64_largepic, *tls_local_dynamic_
https://gcc.gnu.org/g:4d929cd27e66c7d9c519cbcd77f12e1d58e85689
commit r14-11895-g4d929cd27e66c7d9c519cbcd77f12e1d58e85689
Author: H.J. Lu
Date: Tue Jul 1 17:17:06 2025 +0800
x86-64: Add RDI clobber to tls_global_dynamic_64 patterns
*tls_global_dynamic_64_ uses RDI as the __tls_get
https://gcc.gnu.org/g:c139a8814456f4f13202170600f2e28b1498830b
commit r16-2321-gc139a8814456f4f13202170600f2e28b1498830b
Author: H.J. Lu
Date: Sun Mar 2 09:10:57 2025 +0800
x86: Don't change mode for XOR in ix86_expand_ternlog
There is no need to change mode for XOR in ix86_expand
https://gcc.gnu.org/g:11f73c82f178beb9f3f29cbfe2e0a5e592e40b69
commit r16-2305-g11f73c82f178beb9f3f29cbfe2e0a5e592e40b69
Author: Uros Bizjak
Date: Tue Jul 15 05:05:10 2025 +0800
x86: Convert MMX integer loads from constant vector pool
For MMX 16-bit, 32-bit and 64-bit constant vec
https://gcc.gnu.org/g:44680038685d3747e7cef45abdcf8192bfcb5bb2
commit r16-2304-g44680038685d3747e7cef45abdcf8192bfcb5bb2
Author: H.J. Lu
Date: Tue Jul 15 22:49:12 2025 -0700
x86: Warn -pg without -mfentry only on glibc targets
Since only glibc targets support -mfentry, warn -pg wi
https://gcc.gnu.org/g:dc07752af00f9e8ce3c9b25bf7dd4941a5df682d
commit r16-2233-gdc07752af00f9e8ce3c9b25bf7dd4941a5df682d
Author: Uros Bizjak
Date: Mon Jul 14 17:16:36 2025 +0800
x86: Check all 0s/1s vectors with standard_sse_constant_p
commit 77473a27bae04da99d6979d43e7bd0a8106f45
https://gcc.gnu.org/g:07d8de9174c421d719649639a1452b8b9f2eee32
commit r16-2232-g07d8de9174c421d719649639a1452b8b9f2eee32
Author: H.J. Lu
Date: Wed Jul 2 08:58:23 2025 +0800
x86-64: Add --enable-x86-64-mfentry
When profiling is enabled with shrink wrapping, the mcount call may not
https://gcc.gnu.org/g:fcc6ce1a4934a45bfd4e8e21e118d3f1046d3d85
commit r15-9967-gfcc6ce1a4934a45bfd4e8e21e118d3f1046d3d85
Author: H.J. Lu
Date: Thu Jul 3 10:54:39 2025 +0800
x86-64: Add RDI clobber to 64-bit dynamic TLS patterns
*tls_global_dynamic_64_largepic, *tls_local_dynamic_6
https://gcc.gnu.org/g:3f6e48cdb1969dc718d702d045cc4d349f53f239
commit r15-9966-g3f6e48cdb1969dc718d702d045cc4d349f53f239
Author: H.J. Lu
Date: Tue Jul 1 17:17:06 2025 +0800
x86-64: Add RDI clobber to tls_global_dynamic_64 patterns
*tls_global_dynamic_64_ uses RDI as the __tls_get_
https://gcc.gnu.org/g:3e34c54d72f6e3723601bcd936409af4a42d17b8
commit r16-2072-g3e34c54d72f6e3723601bcd936409af4a42d17b8
Author: H.J. Lu
Date: Wed Jul 2 08:51:47 2025 +0800
check-function-bodies: Support "^[0-9]+:"
While working on
https://gcc.gnu.org/bugzilla/show_bug.cg
https://gcc.gnu.org/g:401199377c50045ede560daf3f6e8b51749c2a87
commit r16-2047-g401199377c50045ede560daf3f6e8b51749c2a87
Author: H.J. Lu
Date: Tue Jun 17 10:17:17 2025 +0800
x86: Improve vector_loop/unrolled_loop for memset/memcpy
1. Don't generate the loop if the loop count is 1.
https://gcc.gnu.org/g:349da53f13de274864d01b6ccc466961c472dbe1
commit r16-1971-g349da53f13de274864d01b6ccc466961c472dbe1
Author: H.J. Lu
Date: Thu Jul 3 10:13:48 2025 +0800
x86: Emit label only for __mcount_loc section
commit ecc81e33123d7ac9c11742161e128858d844b99d
Author: An
https://gcc.gnu.org/g:d8d5e2a8031e74f08f61ccdd727476f97940c5a6
commit r16-1917-gd8d5e2a8031e74f08f61ccdd727476f97940c5a6
Author: H.J. Lu
Date: Thu Jul 3 10:54:39 2025 +0800
x86-64: Add RDI clobber to 64-bit dynamic TLS patterns
*tls_global_dynamic_64_largepic, *tls_local_dynamic_6
https://gcc.gnu.org/g:7710d513a552f1fa1b7485ec6b318bafaa6d4cd7
commit r16-1914-g7710d513a552f1fa1b7485ec6b318bafaa6d4cd7
Author: H.J. Lu
Date: Tue Jul 1 17:17:06 2025 +0800
x86-64: Add RDI clobber to tls_global_dynamic_64 patterns
*tls_global_dynamic_64_ uses RDI as the __tls_get_
https://gcc.gnu.org/g:76671eb3142f9827691fcb08ca7938624221104e
commit r16-1840-g76671eb3142f9827691fcb08ca7938624221104e
Author: H.J. Lu
Date: Tue Jul 1 08:14:09 2025 +0800
Fix "void debug (const tree_node *ptr)"
Calling "debug (const tree_node *ptr)" does nothing. Change it to
https://gcc.gnu.org/g:9a602ce3f4c95648c0c48d3f26fc52f69d012505
commit r16-1771-g9a602ce3f4c95648c0c48d3f26fc52f69d012505
Author: H.J. Lu
Date: Sat Jun 28 09:39:41 2025 +0800
x86: Preserve frame pointer for no_callee_saved_registers attribute
Update functions with no_callee_saved_r
https://gcc.gnu.org/g:0cd06c1da7a706330045e54a7516de2601341bc7
commit r16-1766-g0cd06c1da7a706330045e54a7516de2601341bc7
Author: H.J. Lu
Date: Mon Jun 30 04:11:13 2025 +0800
shrink_wrap_separate_check_lea.c: Scan lea(l|q)
Scan "lea(l|q)", instead of "leaq", to support x32.
https://gcc.gnu.org/g:5e5de088f99319aa755ef2af3def30a4ccd5765a
commit r16-1762-g5e5de088f99319aa755ef2af3def30a4ccd5765a
Author: H.J. Lu
Date: Sat Jun 28 07:32:01 2025 +0800
Add "void debug (tree)"
Add "void debug (tree)" to support:
(gdb) call debug (expr)
https://gcc.gnu.org/g:64c55a99746ef8efa37937ee0fef29de4f081f25
commit r16-1725-g64c55a99746ef8efa37937ee0fef29de4f081f25
Author: H.J. Lu
Date: Thu Jun 26 10:05:30 2025 +0800
x86: Handle vector broadcast source
Use the inner scalar mode of vector broadcast source in:
(se
https://gcc.gnu.org/g:77473a27bae04da99d6979d43e7bd0a8106f4557
commit r16-1694-g77473a27bae04da99d6979d43e7bd0a8106f4557
Author: H.J. Lu
Date: Thu Jun 26 06:08:51 2025 +0800
x86: Also handle all 1s float vector constant
Since float vector constant
(const_vector:V4SF [(con
https://gcc.gnu.org/g:62a80185db84f20f3efb05c81598bffa95bcd63d
commit r16-1693-g62a80185db84f20f3efb05c81598bffa95bcd63d
Author: H.J. Lu
Date: Wed Jun 25 12:50:53 2025 +0800
x86: Handle REG_EH_REGION note in DEF_INSN
For tcpsock_test.go in libgo tests,
commit aba3b9d3a48a
https://gcc.gnu.org/g:9804b23198b39f85a7258be556c5e8aed44b9efc
commit r16-1692-g9804b23198b39f85a7258be556c5e8aed44b9efc
Author: H.J. Lu
Date: Sun Apr 13 11:38:24 2025 -0700
x86: Add preserve_none and update no_caller_saved_registers attributes
Add preserve_none attribute which is
https://gcc.gnu.org/g:b8b08a8514003280050003d6d56657cb1b71fb88
commit r16-1690-gb8b08a8514003280050003d6d56657cb1b71fb88
Author: H.J. Lu
Date: Sat May 10 16:57:58 2025 +0800
x86: Add debug dump for the remove_redundant_vector pass
Add debug dump for the remove_redundant_vector pas
https://gcc.gnu.org/g:7fd6cb3c8488465ae0529f543f5309584961503d
commit r16-1667-g7fd6cb3c8488465ae0529f543f5309584961503d
Author: H.J. Lu
Date: Wed Jun 25 07:40:31 2025 +0800
x86: Update -mtune=intel for Diamond Rapids/Clearwater Forest
-mtune=intel is used to generate a single bin
https://gcc.gnu.org/g:d073bb6cfc219d4b6c283a0b527ee88b42e640e0
commit r16-1643-gd073bb6cfc219d4b6c283a0b527ee88b42e640e0
Author: H.J. Lu
Date: Thu Mar 18 18:43:10 2021 -0700
x86: Update memcpy/memset inline strategies for -mtune=generic
Update memcpy and memset inline strategies f
https://gcc.gnu.org/g:aba3b9d3a48a0703fd565f7c5f0caf604f59970b
commit r16-1644-gaba3b9d3a48a0703fd565f7c5f0caf604f59970b
Author: H.J. Lu
Date: Fri May 9 07:17:07 2025 +0800
x86: Extend the remove_redundant_vector pass
Extend the remove_redundant_vector pass to handle vector broadc
https://gcc.gnu.org/g:919f073ae5f45e9cc328be8a914cd80b3a0bc12d
commit r16-1620-g919f073ae5f45e9cc328be8a914cd80b3a0bc12d
Author: H.J. Lu
Date: Fri Jun 20 16:07:18 2025 +0800
x86: Don't use vmovdqu16/vmovdqu8 with non-EVEX registers
Don't use vmovdqu16/vmovdqu8 with non-EVEX regist
https://gcc.gnu.org/g:f9bef66f690d8f1206086c30154af33347c80065
commit r16-1619-gf9bef66f690d8f1206086c30154af33347c80065
Author: H.J. Lu
Date: Mon Jun 23 10:55:49 2025 +0800
x86: Add PROCESSOR_XXX comments to processor_cost_table
Add a PROCESSOR_XXX comment to each entry in proces
https://gcc.gnu.org/g:050b1708ea532ea4840e97d85fad4ca63d4cd631
commit r16-1588-g050b1708ea532ea4840e97d85fad4ca63d4cd631
Author: H.J. Lu
Date: Thu Jun 19 05:03:48 2025 +0800
x86: Get the widest vector mode from MOVE_MAX
Since MOVE_MAX defines the maximum number of bytes that an in
https://gcc.gnu.org/g:4c80062d7b8c272e2e193b8074a8440dbb4fe588
commit r16-1575-g4c80062d7b8c272e2e193b8074a8440dbb4fe588
Author: H.J. Lu
Date: Sun May 25 07:40:29 2025 +0800
x86: Enable *mov_(and|or) only for -Oz
commit ef26c151c14a87177d46fd3d725e7f82e040e89f
Author: Roger Sa
https://gcc.gnu.org/g:11059b4a4e8d4a19e7b554817f7cf0f68e3d54bb
commit r16-1493-g11059b4a4e8d4a19e7b554817f7cf0f68e3d54bb
Author: H.J. Lu
Date: Sun Jun 8 14:23:09 2025 +0800
mcore: Don't use gen_rtx_MEM on __attribute__((dllimport))
On mcore-elf, mcore_mark_dllimport generated
https://gcc.gnu.org/g:f7df645956459c559f254d622090d4dd09159890
commit r16-1097-gf7df645956459c559f254d622090d4dd09159890
Author: H.J. Lu
Date: Wed Jun 4 08:48:40 2025 +0800
Use MEM_EXPR only if MEM_P is true
On s390x, for input:
(call_insn/u 7 6 11 2 (parallel [
https://gcc.gnu.org/g:e1390c2c45186e4843b927e77a102d39a599374a
commit r16-1092-ge1390c2c45186e4843b927e77a102d39a599374a
Author: H.J. Lu
Date: Tue Jun 3 05:56:37 2025 +0800
Always add REG_CALL_DECL note for CALL
Always add REG_CALL_DECL note for CALL so that get_call_fndecl works
https://gcc.gnu.org/g:4ab36e8e56280d774d4b5ef07b0838020ba20a6a
commit r16-1070-g4ab36e8e56280d774d4b5ef07b0838020ba20a6a
Author: H.J. Lu
Date: Tue Jun 3 17:17:57 2025 +0800
x86: Add g++.target/i386/pr103750.C
Add a test for PR target/103750 fixed by r16-170-ga670ebde399548.
https://gcc.gnu.org/g:2da641d01700907d600ff9027ecfc82500342428
commit r16-1041-g2da641d01700907d600ff9027ecfc82500342428
Author: H.J. Lu
Date: Sun Jun 1 09:29:48 2025 +0800
Move get_call_rtx_from to final.c
Move get_call_rtx_from to final.c and call call_from_call_insn.
https://gcc.gnu.org/g:9506c28a557bcea34af13478f05d2d9fc3727072
commit r16-535-g9506c28a557bcea34af13478f05d2d9fc3727072
Author: H.J. Lu
Date: Mon May 12 10:02:24 2025 +0800
x86: Remove df_insn_rescan after emit_insn_*
Since df_insn_rescan has been called by emit_insn_*, there is n
https://gcc.gnu.org/g:ba9d228a92057d3b839e7ea32b12c93fcfc5ff1e
commit r16-519-gba9d228a92057d3b839e7ea32b12c93fcfc5ff1e
Author: H.J. Lu
Date: Sun May 11 06:17:45 2025 +0800
x86: Change dest to src in replace_vector_const
Replace
rtx dest = SET_SRC (set);
with
https://gcc.gnu.org/g:b8c4b6aa8e0521770c6f9fd48dd13dd85e3a2fc9
commit r16-436-gb8c4b6aa8e0521770c6f9fd48dd13dd85e3a2fc9
Author: H.J. Lu
Date: Thu May 1 06:30:41 2025 +0800
x86: Insert extra move for mode size smaller than natural size
When generating a SUBREG from V16QI to V2HF, v
https://gcc.gnu.org/g:0f3a6b3972f6e6886297e59fcaf85f374859ca46
commit r16-275-g0f3a6b3972f6e6886297e59fcaf85f374859ca46
Author: H.J. Lu
Date: Tue Apr 29 09:44:29 2025 +0800
target.def: Remove TARGET_PROMOTE_FUNCTION_RETURN reference
Since TARGET_PROMOTE_FUNCTION_RETURN is no longe
https://gcc.gnu.org/g:d1cada7481420a23fbec525548ef5bdf64839a34
commit r16-271-gd1cada7481420a23fbec525548ef5bdf64839a34
Author: H.J. Lu
Date: Fri Nov 29 18:22:14 2024 +0800
x86: Add a pass to remove redundant all 0s/1s vector load
For all different modes of all 0s/1s vectors, we c
https://gcc.gnu.org/g:a0a64aa5da0af5ecb022675cdb9140ccfa098ce3
commit r16-270-ga0a64aa5da0af5ecb022675cdb9140ccfa098ce3
Author: H.J. Lu
Date: Tue Nov 12 09:03:31 2024 +0800
i386: Add ix86_expand_unsigned_small_int_cst_argument
When passing 0xff as an unsigned char function argumen
https://gcc.gnu.org/g:b9ea3b2ef98048f93b02fcd6ff51777bce1676c2
commit r16-194-gb9ea3b2ef98048f93b02fcd6ff51777bce1676c2
Author: H.J. Lu
Date: Tue Mar 14 11:41:51 2023 -0700
x86: Properly find the maximum stack slot alignment
Don't assume that stack slots can only be accessed by st
https://gcc.gnu.org/g:f9f81d5017adc5d860b24f67aeb89b4e79c7ebdb
commit r16-172-gf9f81d5017adc5d860b24f67aeb89b4e79c7ebdb
Author: H.J. Lu
Date: Sun Nov 10 16:41:10 2024 +0800
vect-simd-clone-1[6-8][cd].c: Expect in-branch clones for x86
Since the C frontend no longer promotes char a
https://gcc.gnu.org/g:a670ebde3995481225ec62b29686ec07a21e5c10
commit r16-170-ga670ebde3995481225ec62b29686ec07a21e5c10
Author: H.J. Lu
Date: Thu Nov 21 07:54:35 2024 +0800
Drop targetm.promote_prototypes from C, C++ and Ada frontends
Remove the targetm.calls.promote_prototypes ca
https://gcc.gnu.org/g:cdb239bd213524a43b38ad8fca8e7ed0b5fb41eb
commit r16-171-gcdb239bd213524a43b38ad8fca8e7ed0b5fb41eb
Author: H.J. Lu
Date: Sun Nov 10 11:27:14 2024 +0800
i386: Adjust apx-ndd.c for frontend promotion removal
Since the C frontend no longer promotes integer argume
https://gcc.gnu.org/g:f962f594e9006651379dafc9ef039be9654e6291
commit r16-174-gf962f594e9006651379dafc9ef039be9654e6291
Author: H.J. Lu
Date: Sun Nov 10 17:55:20 2024 +0800
ssa-fre-4.c: Enable for all targets and adjust scan match
Since the C frontend no longer promotes char argum
https://gcc.gnu.org/g:78db4753c9646a372512e6a951fced12f74de0bc
commit r16-169-g78db4753c9646a372512e6a951fced12f74de0bc
Author: H.J. Lu
Date: Thu Nov 21 08:11:06 2024 +0800
Honor TARGET_PROMOTE_PROTOTYPES during RTL expand
Promote integer arguments smaller than int if TARGET_PROMO
https://gcc.gnu.org/g:de8648def762e3b54200dd3cd5c6fb480b228579
commit r16-173-gde8648def762e3b54200dd3cd5c6fb480b228579
Author: H.J. Lu
Date: Sun Nov 10 16:50:46 2024 +0800
scev-cast.c: Enable for all targets and adjust scan matches
Since the C frontend no longer promotes char arg
https://gcc.gnu.org/g:a9fc1b9dec92842b3a978183388c1833918776fd
commit r16-44-ga9fc1b9dec92842b3a978183388c1833918776fd
Author: H.J. Lu
Date: Sun Apr 20 15:09:00 2025 +0800
x86: Add tests for PR target/117863
commit 546f28f83ceba74dc8bf84b0435c0159ffca971a
Author: Richard Sandi
https://gcc.gnu.org/g:8cc672d3d3a2f090d840fb2a8c344cf927715d6c
commit r14-11643-g8cc672d3d3a2f090d840fb2a8c344cf927715d6c
Author: H.J. Lu
Date: Mon Apr 14 15:49:26 2025 -0700
x86: Update gcc.target/i386/apx-interrupt-1.c
ix86_add_cfa_restore_note omits the REG_CFA_RESTORE REG note
https://gcc.gnu.org/g:a33e2808c8987dcd422c5156c47bcf672ddc7f9f
commit r14-11642-ga33e2808c8987dcd422c5156c47bcf672ddc7f9f
Author: H.J. Lu
Date: Sun Apr 13 12:20:42 2025 -0700
APX: Don't use red-zone with 32 GPRs and no caller-saved registers
Don't use red-zone when there are no ca
https://gcc.gnu.org/g:d275b3748a23aa4b6b821ae3bdf1751010923773
commit r14-11641-gd275b3748a23aa4b6b821ae3bdf1751010923773
Author: H.J. Lu
Date: Tue Aug 27 07:03:22 2024 -0700
Extend check-function-bodies to allow label and directives
As PR target/116174 shown, we may need to verif
https://gcc.gnu.org/g:5ed2fa4768f3d318b8ace5bd4a095596e06fad7b
commit r15-9503-g5ed2fa4768f3d318b8ace5bd4a095596e06fad7b
Author: H.J. Lu
Date: Mon Apr 14 15:49:26 2025 -0700
x86: Update gcc.target/i386/apx-interrupt-1.c
ix86_add_cfa_restore_note omits the REG_CFA_RESTORE REG note
https://gcc.gnu.org/g:0a074b8c7e79f9d9359d044f1499b0a9ce9d2801
commit r15-9431-g0a074b8c7e79f9d9359d044f1499b0a9ce9d2801
Author: H.J. Lu
Date: Sun Apr 13 12:20:42 2025 -0700
APX: Don't use red-zone with 32 GPRs and no caller-saved registers
Don't use red-zone when there are no cal
https://gcc.gnu.org/g:456f5ef81f0c6de630a60c26341082fffd48f241
commit r15-8240-g456f5ef81f0c6de630a60c26341082fffd48f241
Author: H.J. Lu
Date: Mon Mar 17 15:02:35 2025 -0700
gcc.dg/pr90838-2.c: Replace long with long long
Since gcc.dg/pr90838-2.c is only for 64-bit integer, replac
https://gcc.gnu.org/g:06440e726acfa9c9695a07dc524a832a53057ad6
commit r15-7957-g06440e726acfa9c9695a07dc524a832a53057ad6
Author: H.J. Lu
Date: Sun Mar 9 07:00:23 2025 -0700
i386: Verify that argument registers are spilled properly
While working on a local x86 patch, which passed t
https://gcc.gnu.org/g:b191e8bdecf881d11c1544c441e38f4c18392a15
commit r15-7895-gb191e8bdecf881d11c1544c441e38f4c18392a15
Author: Richard Sandiford
Date: Thu Mar 6 11:06:25 2025 +
ira: Add new hooks for callee-save vs spills [PR117477]
Following on from the discussion in:
https://gcc.gnu.org/g:075611b646e5554ae02b2622061ea1614bf16ead
commit r15-7745-g075611b646e5554ae02b2622061ea1614bf16ead
Author: H.J. Lu
Date: Wed Feb 26 05:57:13 2025 +0800
x86: Move TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P to i386.cc
Move the TARGET_SMALL_REGISTER_CLASSES_FOR_MO
https://gcc.gnu.org/g:bf0aa9dc8826b1d2a71e52754c117228134825b5
commit r15-7679-gbf0aa9dc8826b1d2a71e52754c117228134825b5
Author: H.J. Lu
Date: Mon Feb 24 05:44:40 2025 +0800
x86: Add tests for PR tree-optimization/82142
Verify that PR tree-optimization/82142 testcase is properly o
https://gcc.gnu.org/g:700f049b66fa1a71001a5ab383580605e1bbd4d6
commit r15-7666-g700f049b66fa1a71001a5ab383580605e1bbd4d6
Author: H.J. Lu
Date: Fri Feb 21 10:31:04 2025 +0800
Append a newline in debug_edge
Append a newline in debug_edge so that we get
(gdb) call debug_edge
https://gcc.gnu.org/g:83bc61c9fd6581d0a4c4ee16bdfdaeedcdd6ebcd
commit r15-7636-g83bc61c9fd6581d0a4c4ee16bdfdaeedcdd6ebcd
Author: H.J. Lu
Date: Wed Feb 19 19:48:07 2025 +0800
x86: Add a test for PR target/118936
Add a test for PR target/118936 which was fixed by reverting:
https://gcc.gnu.org/g:0312d11be3f666a6b71461dc8a09e7aac64853eb
commit r15-7634-g0312d11be3f666a6b71461dc8a09e7aac64853eb
Author: H.J. Lu
Date: Thu Feb 20 15:23:05 2025 +0800
Revert "i386: Simplify PARALLEL RTX scan in ix86_find_all_reg_use"
This reverts commit 565d4e755498ad2b5ed5
https://gcc.gnu.org/g:6921c93d205203b239bf36cecc2258d202419ac6
commit r15-7635-g6921c93d205203b239bf36cecc2258d202419ac6
Author: H.J. Lu
Date: Thu Feb 20 15:23:15 2025 +0800
Revert "x86: Properly find the maximum stack slot alignment"
This reverts commit 11902be7a57c0ccf03786aa025
https://gcc.gnu.org/g:11902be7a57c0ccf03786aa0255fffaf0f54dbf9
commit r15-7573-g11902be7a57c0ccf03786aa0255fffaf0f54dbf9
Author: H.J. Lu
Date: Tue Mar 14 11:41:51 2023 -0700
x86: Properly find the maximum stack slot alignment
Don't assume that stack slots can only be accessed by s
https://gcc.gnu.org/g:bd52571d713749f1a4cf0f58ca4922dbc42b5752
commit r12-10950-gbd52571d713749f1a4cf0f58ca4922dbc42b5752
Author: H.J. Lu
Date: Tue Feb 11 13:47:54 2025 +0800
x86: Correct ASM_OUTPUT_SYMBOL_REF
x is not a macro argument. It just happens to work as final.cc passes
https://gcc.gnu.org/g:0a1c9d03309ff1e507f7ea347fe8cc12bf669296
commit r13-9371-g0a1c9d03309ff1e507f7ea347fe8cc12bf669296
Author: H.J. Lu
Date: Tue Feb 11 13:47:54 2025 +0800
x86: Correct ASM_OUTPUT_SYMBOL_REF
x is not a macro argument. It just happens to work as final.cc passes
https://gcc.gnu.org/g:5f47dc6e9aa82e1c00ed030cb9469cd84df8691d
commit r14-11301-g5f47dc6e9aa82e1c00ed030cb9469cd84df8691d
Author: H.J. Lu
Date: Tue Feb 11 13:47:54 2025 +0800
x86: Correct ASM_OUTPUT_SYMBOL_REF
x is not a macro argument. It just happens to work as final.cc passes
https://gcc.gnu.org/g:7317fc0b03380a83ad03a5fc4fabef5f38c44c9d
commit r15-7469-g7317fc0b03380a83ad03a5fc4fabef5f38c44c9d
Author: H.J. Lu
Date: Tue Feb 11 13:47:54 2025 +0800
x86: Correct ASM_OUTPUT_SYMBOL_REF
x is not a macro argument. It just happens to work as final.cc passes
https://gcc.gnu.org/g:846837c2406ae7a52d9123b29c13e4b8b9d14224
commit r15-7436-g846837c2406ae7a52d9123b29c13e4b8b9d14224
Author: H.J. Lu
Date: Fri Feb 7 13:49:30 2025 +0800
x86: Verify that PUSH/POP can be skipped
For
int f(int);
int advance(int dz)
{
https://gcc.gnu.org/g:d3ff498c478acefce35de04402f99171b4f64a1a
commit r15-7400-gd3ff498c478acefce35de04402f99171b4f64a1a
Author: H.J. Lu
Date: Sun Feb 2 07:10:55 2025 +0800
ira: Add a target hook for callee-saved register cost scale
commit 3b9b8d6cfdf59337f4b7ce10ce92a98044b2657b
https://gcc.gnu.org/g:e8262c9041feddd7446840a9532cf458452f3587
commit r15-7321-ge8262c9041feddd7446840a9532cf458452f3587
Author: H.J. Lu
Date: Sun Feb 2 06:46:29 2025 +0800
x86: Add a test for PR rtl-optimization/111673
Add a test for the target independent bug, PR rtl-optimizatio
https://gcc.gnu.org/g:dceec9efbd19b50ff9e5268b9bc35d5c44b2f6e2
commit r15-7320-gdceec9efbd19b50ff9e5268b9bc35d5c44b2f6e2
Author: H.J. Lu
Date: Sun Feb 2 05:46:18 2025 +0800
x86: Change "if (TARGET_X32 ...)" back to "else if (TARGET_X32 ...)"
Update
commit dd6247cb8fc11a15
https://gcc.gnu.org/g:dd6247cb8fc11a15e23e949092f89d24ff329209
commit r15-7318-gdd6247cb8fc11a15e23e949092f89d24ff329209
Author: H.J. Lu
Date: Fri Jan 31 12:29:04 2025 +0800
x86: Handle TARGET_INDIRECT_BRANCH_REGISTER for -fno-plt
If TARGET_INDIRECT_BRANCH_REGISTER is true, indire
https://gcc.gnu.org/g:b38efaf36058b40aaf8659a9348815110242ced8
commit r15-7315-gb38efaf36058b40aaf8659a9348815110242ced8
Author: H.J. Lu
Date: Sat Feb 1 18:06:33 2025 +0800
x86: Add a -mstack-protector-guard=global test
Verify that -mstack-protector-guard=global works on x86. Def
https://gcc.gnu.org/g:5f34558100e8466aa70373e2f930bf1013192ba8
commit r15-7302-g5f34558100e8466aa70373e2f930bf1013192ba8
Author: H.J. Lu
Date: Fri Jan 31 18:28:23 2025 +0800
force-indirect-call-2.c: Allow indirect branch via GOT
r15-1619-g3b9b8d6cfdf593 changed the codegen from
https://gcc.gnu.org/g:14879ba89a4f9d2263472dca1423b584c1236586
commit r15-6728-g14879ba89a4f9d2263472dca1423b584c1236586
Author: H.J. Lu
Date: Wed Jan 8 20:50:04 2025 +0800
ree: Skip extension on fixed register
Skip extension on fixed register since we can't turn
(insn 27
https://gcc.gnu.org/g:e4dd0075aa998d522edd0da552d60a942eaae78a
commit r15-5858-ge4dd0075aa998d522edd0da552d60a942eaae78a
Author: H.J. Lu
Date: Mon Dec 2 13:10:46 2024 +0800
x86: Correct comments for pass_apx_nf_convert
Change pass_rpad to pass_apx_nf_convert in pass_apx_nf_convert
https://gcc.gnu.org/g:c61576d89eb0fead37be39fcf0764bb915ea201f
commit r15-5660-gc61576d89eb0fead37be39fcf0764bb915ea201f
Author: H.J. Lu
Date: Sun Oct 13 04:53:14 2024 +0800
sibcall: Check partial != 0 for BLKmode argument
The outgoing stack slot size may be different from the BLK
https://gcc.gnu.org/g:42a8005c636d5eb8acff55cb86de98dcaf5a29ff
commit r15-5562-g42a8005c636d5eb8acff55cb86de98dcaf5a29ff
Author: H.J. Lu
Date: Thu Nov 21 19:08:03 2024 +0800
apx-ndd-tls-1[ab].c: Add -std=gnu17
Since GCC 15 defaults to -std=gnu23, add -std=gnu17 to apx-ndd-tls-1[ab
https://gcc.gnu.org/g:859ce74dc25b9e77faa10144f981585bd3e00edc
commit r15-4992-g859ce74dc25b9e77faa10144f981585bd3e00edc
Author: H.J. Lu
Date: Wed Nov 6 16:14:38 2024 +0800
avx10_2-comibf-2.c: Require AVX10.2 support
Since avx10_2-comibf-2.c is a run test, require AVX10.2 support.
https://gcc.gnu.org/g:c4155653e6ffe05b032702e9de256893e0245284
commit r15-4971-gc4155653e6ffe05b032702e9de256893e0245284
Author: H.J. Lu
Date: Wed Nov 6 07:44:24 2024 +0800
gcc.target/i386/apx-ndd.c: Also scan (%edi)
Since x32 uses (%edi), instead of (%rdi), also scan (%edi).
https://gcc.gnu.org/g:d228a0729ff7d1f72f84bb910d765ead5706fed4
commit r15-4972-gd228a0729ff7d1f72f84bb910d765ead5706fed4
Author: H.J. Lu
Date: Wed Nov 6 08:14:04 2024 +0800
Intel MOVRS tests: Also scan (%e.x)
Since x32 uses (%reg32), instead of (%r.x), also scan (%e.x).
https://gcc.gnu.org/g:8ae4a838bc0f5796369d982330acacf7a8fa7eab
commit r15-4941-g8ae4a838bc0f5796369d982330acacf7a8fa7eab
Author: H.J. Lu
Date: Tue Nov 5 06:22:00 2024 +0800
simulate-thread tests: Silence gdb debuginfod warning
When gdb defaults to use debuginfod, gdb warns simulat
https://gcc.gnu.org/g:c1d91adb572ca0c5f5e788b070e97c4fe744505a
commit r15-4939-gc1d91adb572ca0c5f5e788b070e97c4fe744505a
Author: H.J. Lu
Date: Sun Oct 27 05:51:18 2024 +0800
guality tests: Silence gdb debuginfod warning
When gdb defaults to use debuginfod, gdb warns guality tests:
https://gcc.gnu.org/g:f1823d8037e355cd755087e695051d190ffe755e
commit r15-4711-gf1823d8037e355cd755087e695051d190ffe755e
Author: H.J. Lu
Date: Sat Oct 12 05:53:49 2024 +0800
gcc.target/i386/pr53533-[13].c: Adjust assembly scan
Before
1089d083117 Simplify (B * v + C) * D -
https://gcc.gnu.org/g:c1034d71a7f9ed446938b1c4ba7e7c95ba3a665f
commit r15-4289-gc1034d71a7f9ed446938b1c4ba7e7c95ba3a665f
Author: H.J. Lu
Date: Sat Oct 12 06:15:28 2024 +0800
gcc.target/i386/pr55583.c: Use long long for 64-bit integer
Since long is 32-bit for x32, use long long for
https://gcc.gnu.org/g:80d0e10847ec64799deb53061fb50876043116fe
commit r15-4288-g80d0e10847ec64799deb53061fb50876043116fe
Author: H.J. Lu
Date: Sat Oct 12 05:22:52 2024 +0800
gcc.target/i386/pr115749.c: Use word_mode integer
Use word_mode integer with func so that 64-bit integer is
https://gcc.gnu.org/g:a4ce8681929c597639ce382b2a0414e27c46725c
commit r15-4287-ga4ce8681929c597639ce382b2a0414e27c46725c
Author: H.J. Lu
Date: Sat Oct 12 05:04:33 2024 +0800
gcc.target/i386/invariant-ternlog-1.c: Also scan (%edx)
Since x32 uses (%edx), instead of (%rdx), also scan
https://gcc.gnu.org/g:c92477e00068811be31c18428904e0d585fa5236
commit r15-4275-gc92477e00068811be31c18428904e0d585fa5236
Author: H.J. Lu
Date: Thu Oct 10 17:22:36 2024 +0800
gcc.target/i386: Replace long with long long
Since long is 64-bit for x32, replace long with long long for
https://gcc.gnu.org/g:69f91fbd47722f84edaa7a20d972912181ef97fb
commit r15-4274-g69f91fbd47722f84edaa7a20d972912181ef97fb
Author: H.J. Lu
Date: Thu Oct 10 19:00:32 2024 +0800
g++.target/i386/pr105953.C: Skip for x32
Since -mabi=ms isn't supported for x32, skip g++.target/i386/pr105
https://gcc.gnu.org/g:3ba65a7f2d9ff85cd818a3115f71b2946f34a0ff
commit r15-4273-g3ba65a7f2d9ff85cd818a3115f71b2946f34a0ff
Author: H.J. Lu
Date: Thu Oct 10 17:29:27 2024 +0800
gcc.target/i386/pr115407.c: Only run for lp64
Since -mcmodel=large is valid only for lp64, run pr115407.c o
https://gcc.gnu.org/g:7a51946e00fa2fb2ffacdd7c8d0a80e056c1f7ff
commit r12-10742-g7a51946e00fa2fb2ffacdd7c8d0a80e056c1f7ff
Author: H.J. Lu
Date: Fri Oct 4 16:21:15 2024 +0800
x86: Disable stack protector for naked functions
Since naked functions should not enable stack protector, d
https://gcc.gnu.org/g:bd9f62324853686c65e1b4331a187102e1e526b0
commit r13-9085-gbd9f62324853686c65e1b4331a187102e1e526b0
Author: H.J. Lu
Date: Fri Oct 4 16:21:15 2024 +0800
x86: Disable stack protector for naked functions
Since naked functions should not enable stack protector, de
https://gcc.gnu.org/g:1032b72548c47a199e0407c69d6740d6c3341f43
commit r14-10746-g1032b72548c47a199e0407c69d6740d6c3341f43
Author: H.J. Lu
Date: Fri Oct 4 16:21:15 2024 +0800
x86: Disable stack protector for naked functions
Since naked functions should not enable stack protector, d
https://gcc.gnu.org/g:7d2845da112214f064e7b24531cc67e256b5177e
commit r15-4080-g7d2845da112214f064e7b24531cc67e256b5177e
Author: H.J. Lu
Date: Fri Oct 4 16:21:15 2024 +0800
x86: Disable stack protector for naked functions
Since naked functions should not enable stack protector, de
https://gcc.gnu.org/g:2e66eb7e7eae82bcd6675e79eabbdd6decfa9fe5
commit r12-10731-g2e66eb7e7eae82bcd6675e79eabbdd6decfa9fe5
Author: H.J. Lu
Date: Wed Sep 25 16:39:04 2024 +0800
x86: Don't use address override with segment regsiter
Address override only applies to the (reg32) part in
https://gcc.gnu.org/g:bf5d8d44f7a8f90a2ebfe3f28689bc3d86e185fb
commit r13-9060-gbf5d8d44f7a8f90a2ebfe3f28689bc3d86e185fb
Author: H.J. Lu
Date: Wed Sep 25 16:39:04 2024 +0800
x86: Don't use address override with segment regsiter
Address override only applies to the (reg32) part in
1 - 100 of 125 matches
Mail list logo