https://gcc.gnu.org/g:dceec9efbd19b50ff9e5268b9bc35d5c44b2f6e2
commit r15-7320-gdceec9efbd19b50ff9e5268b9bc35d5c44b2f6e2
Author: H.J. Lu <hjl.to...@gmail.com>
Date: Sun Feb 2 05:46:18 2025 +0800
x86: Change "if (TARGET_X32 ...)" back to "else if (TARGET_X32 ...)"
Update
commit dd6247cb8fc11a15e23e949092f89d24ff329209
Author: H.J. Lu <hjl.to...@gmail.com>
Date: Fri Jan 31 12:29:04 2025 +0800
x86: Handle TARGET_INDIRECT_BRANCH_REGISTER for -fno-plt
to change "if (TARGET_X32 ...)" back to "else if (TARGET_X32 ...)".
PR target/118713
* config/i386/i386-expand.cc (ix86_expand_call): Change "if
(TARGET_X32 ...)" back to "else if (TARGET_X32 ...)".
Signed-off-by: H.J. Lu <hjl.to...@gmail.com>
Diff:
---
gcc/config/i386/i386-expand.cc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index a43b0f0e8f0b..9590cd9a8c98 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -10225,7 +10225,7 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1,
fnaddr = gen_rtx_MEM (QImode, construct_plt_address (XEXP (fnaddr, 0)));
/* Since x32 GOT slot is 64 bit with zero upper 32 bits, indirect
branch via x32 GOT slot is OK. */
- if (TARGET_X32
+ else if (TARGET_X32
&& MEM_P (fnaddr)
&& GET_CODE (XEXP (fnaddr, 0)) == ZERO_EXTEND
&& GOT_memory_operand (XEXP (XEXP (fnaddr, 0), 0), Pmode)
