https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78733
wilco at gcc dot gnu.org changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78733
--- Comment #12 from wilco at gcc dot gnu.org ---
Author: wilco
Date: Fri Dec 9 14:26:07 2016
New Revision: 243486
URL: https://gcc.gnu.org/viewcvs?rev=243486&root=gcc&view=rev
Log:
Add the test this time...
PR targ
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78796
--- Comment #3 from wilco at gcc dot gnu.org ---
(In reply to Jakub Jelinek from comment #2)
> I can bootstrap/regtest this on aarch64-linux, but 6.3 rc1 is planned for
> tomorrow. Could the aarch64 maintainers review it before then (i
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78796
--- Comment #6 from wilco at gcc dot gnu.org ---
(In reply to James Greenhalgh from comment #4)
> This looks sensible, but why not also drop the:
>
> if (nopcrelative_literal_loads
>
> As was done in r237607?
>
> Wilc
: middle-end
Assignee: unassigned at gcc dot gnu.org
Reporter: wilco at gcc dot gnu.org
Target Milestone: ---
GCC currently doesn't optimize str(n)cmp of small constant strings (besides the
empty string). Such cases can be inlined to avoid the overhead of calling
s
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78809
--- Comment #2 from wilco at gcc dot gnu.org ---
(In reply to Richard Biener from comment #1)
> We may have dups of this. And we now have inlining for strcmp/memcmp when
> the
> result is only compared against zero.
I don't see
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77484
--- Comment #12 from wilco at gcc dot gnu.org ---
(In reply to wilco from comment #10)
> (In reply to Jan Hubicka from comment #9)
> > Created attachment 40217 [details]
> > predict
> >
> > Hi,
> > here is patch
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77484
--- Comment #19 from wilco at gcc dot gnu.org ---
> The commit in comment 14 has instroduced size and runtime regressions in the
> Spec2006 testsuite on s390x:
I get reproducible regressions on AArch64 as well with the latest patch
(change
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78041
--- Comment #18 from wilco at gcc dot gnu.org ---
Author: wilco
Date: Fri Jan 6 14:26:06 2017
New Revision: 244161
URL: https://gcc.gnu.org/viewcvs?rev=244161&root=gcc&view=rev
Log:
With -fpu=neon DI mode shifts are expanded after rel
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77484
--- Comment #27 from wilco at gcc dot gnu.org ---
(In reply to Jan Hubicka from comment #26)
> Hello, did the Gap scores on arm too? Both Itanium and PPC testers seems to
> show improved gap scores, so hope arm and the other ppc tester to
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79121
wilco at gcc dot gnu.org changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last reconfirmed
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77484
--- Comment #33 from wilco at gcc dot gnu.org ---
(In reply to Jan Hubicka from comment #32)
> Apparently fixed. The coremark is PR77445
Yes, my SPEC2006 results look good, no real change. Coremark is now up by 20%
or more, thanks for that :-)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77455
wilco at gcc dot gnu.org changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77455
--- Comment #3 from wilco at gcc dot gnu.org ---
Author: wilco
Date: Fri Jan 20 15:34:41 2017
New Revision: 244724
URL: https://gcc.gnu.org/viewcvs?rev=244724&root=gcc&view=rev
Log:
This patch simplifies the handling of EH return. We f
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77455
wilco at gcc dot gnu.org changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71399
wilco at gcc dot gnu.org changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78041
wilco at gcc dot gnu.org changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78041
--- Comment #19 from wilco at gcc dot gnu.org ---
Author: wilco
Date: Tue Jan 24 14:14:12 2017
New Revision: 244872
URL: https://gcc.gnu.org/viewcvs?rev=244872&root=gcc&view=rev
Log:
With -fpu=neon DI mode shifts are expanded after rel
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78439
wilco at gcc dot gnu.org changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79149
wilco at gcc dot gnu.org changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79149
--- Comment #14 from wilco at gcc dot gnu.org ---
(In reply to Arnd Bergmann from comment #13)
> (In reply to wilco from comment #12)
> > Does wp512 use 64-bit types? If so, this is likely PR77308.
>
> Yes, as seen in the attachme
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71399
--- Comment #19 from wilco at gcc dot gnu.org ---
(In reply to Jeffrey A. Law from comment #18)
> I've been able to reproduce this under arm-qemu.
>
> Start by bootstrapping and installing gcc-4.9.4. Then use that gcc-4.9.4 to
>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80283
wilco at gcc dot gnu.org changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80283
--- Comment #13 from wilco at gcc dot gnu.org ---
It looks the x64 issue is unrelated. It starts with a bad schedule which could
be improved by the scheduler but that is off by default, while the ARM version
starts with a good schedule which is
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80399
wilco at gcc dot gnu.org changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80131
wilco at gcc dot gnu.org changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78994
wilco at gcc dot gnu.org changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79712
wilco at gcc dot gnu.org changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81357
--- Comment #4 from Wilco ---
(In reply to Qing Zhao from comment #3)
> 1. the zero extension comes from the language standard naturally. for
> aarch64, due to the fact that the register W0 to X0 implicitly zero
> extension, the explicitly zero e
||2017-10-02
CC||wilco at gcc dot gnu.org
Assignee|unassigned at gcc dot gnu.org |wilco at gcc dot gnu.org
Ever confirmed|0 |1
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82396
--- Comment #2 from Wilco ---
I've got a simple patch that fixes the AArch64 bootstrap failure. This should
fix ARM as well.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81357
--- Comment #11 from Wilco ---
(In reply to Qing Zhao from comment #10)
> the following is my conclusion on this bug based on previous discussion and
> study, for this testing case:
>
> 1. due to the fact that "mov" and "uxtw" are the same in
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82396
--- Comment #5 from Wilco ---
(In reply to Steve Ellcey from comment #4)
> Has the patch been(In reply to Wilco from comment #2)
> > I've got a simple patch that fixes the AArch64 bootstrap failure. This
> > should fix ARM as well.
>
> Has this
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82396
--- Comment #7 from Wilco ---
Author: wilco
Date: Wed Oct 4 10:27:26 2017
New Revision: 253399
URL: https://gcc.gnu.org/viewcvs?rev=253399&root=gcc&view=rev
Log:
Fix PR82396: qsort comparator non-negative on sorted output
r253236 broke AArch64
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82407
Bug 82407 depends on bug 82396, which changed state.
Bug 82396 Summary: [8 Regression] qsort comparator non-negative on sorted
output: 4 in ready_sort_real in haifa scheduler
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82396
What
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82396
Wilco changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82396
--- Comment #9 from Wilco ---
Author: wilco
Date: Wed Oct 4 16:40:44 2017
New Revision: 253419
URL: https://gcc.gnu.org/viewcvs?rev=253419&root=gcc&view=rev
Log:
Revert r253399:
PR rtl-optimization/82396
* haifa-sched.c (autopr
: target
Assignee: unassigned at gcc dot gnu.org
Reporter: wilco at gcc dot gnu.org
Target Milestone: ---
The following logical simplifications are missing on targets with a bitclear
instruction:
(x | y) == x -> (y & ~x) == 0
(x & y) == y -> (y & ~x) == 0
S
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82396
--- Comment #12 from Wilco ---
(In reply to Qing Zhao from comment #11)
> I am seeing the exactly same issue on aarch64 today (10/5/2017) as comment
> 10.
It works if you apply my patch or replace qsort with (qsort) in
gcc/haifa-sched.c.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82396
--- Comment #13 from Wilco ---
Author: wilco
Date: Fri Oct 6 11:54:51 2017
New Revision: 253487
URL: https://gcc.gnu.org/viewcvs?rev=253487&root=gcc&view=rev
Log:
PR82396 workaround
r253236 broke AArch64 bootstrap. This is a temporary workaro
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68256
Wilco changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
--- Comment #7 from
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80295
Wilco changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
--- Comment #6 from
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80295
--- Comment #8 from Wilco ---
(In reply to Qing Zhao from comment #7)
> However, I am still not very sure about the current implementation of
> -mabi=ilp32 on aarch64
> for example:
>
> qinzhao@gcc116:~/Bugs/80295$ cat t1.c
> void f (void *b) {
||2017-10-12
CC||wilco at gcc dot gnu.org
Ever confirmed|0 |1
--- Comment #6 from Wilco ---
The question is whether the algorithm used in __divdc3 is accurate - it appears
to want to use FMA explictly, otherwise you&#
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59714
--- Comment #7 from Wilco ---
Btw this is also totally broken in libgcc2.c:
#define isnan(x)__builtin_expect ((x) != (x), 0)
#define isfinite(x) __builtin_expect (!isnan((x) - (x)), 1)
#define isinf(x)__builtin_expect (!isnan
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82442
--- Comment #1 from Wilco ---
Author: wilco
Date: Mon Oct 16 13:26:20 2017
New Revision: 253786
URL: https://gcc.gnu.org/viewcvs?rev=253786&root=gcc&view=rev
Log:
Fix PR82442
Recently the gcc.dg/vect/pr31699.c was modified to check for
vect_flo
||wilco at gcc dot gnu.org
Resolution|--- |FIXED
--- Comment #2 from Wilco ---
Fixed
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71026
--- Comment #7 from Wilco ---
Author: wilco
Date: Tue Oct 17 13:22:48 2017
New Revision: 253812
URL: https://gcc.gnu.org/viewcvs?rev=253812&root=gcc&view=rev
Log:
Factor out division by squares and remove division around comparisons (0/2)
Commi
||2017-10-24
CC||segher at gcc dot gnu.org,
||wilco at gcc dot gnu.org
Component|target |rtl-optimization
Summary|GCC generates bad code with |Combine: GCC
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82683
--- Comment #4 from Wilco ---
(In reply to Segher Boessenkool from comment #3)
> Ah. So we start with
>
> insn_cost 4 for18: r91:DI=r83:DI<<0x2
> REG_DEAD r83:DI
> insn_cost 4 for19: r78:DI=r76:DI+r91:DI
> REG_DEAD r91:DI
>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82683
--- Comment #6 from Wilco ---
(In reply to Segher Boessenkool from comment #5)
> Oh, it does show the intermediate results:
>
> Trying 18 -> 19:
> Successfully matched this instruction:
> (set (reg/f:DI 78 [ _7 ])
> (plus:DI (ashift:DI (reg:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82683
--- Comment #8 from Wilco ---
(In reply to Segher Boessenkool from comment #7)
> Yes, it requires to look back a bit (the info always is in this dump
> file though!)
>
> The alternative would be to dump even more info, grow the log files
> by a
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78809
--- Comment #14 from Wilco ---
(In reply to Qing Zhao from comment #11)
> (In reply to Wilco from comment #9)
>
> > str(n)cmp with a constant string can be changed into memcmp if the string
> > has a
> > known alignment or is an array of known
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60580
--- Comment #9 from Wilco ---
Author: wilco
Date: Tue Oct 24 16:58:02 2017
New Revision: 254052
URL: https://gcc.gnu.org/viewcvs?rev=254052&root=gcc&view=rev
Log:
PR60580: Fix frame pointer option magic
To fix PR60580 simplify the logic in aarc
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82396
--- Comment #14 from Wilco ---
Author: wilco
Date: Tue Oct 24 17:21:19 2017
New Revision: 254056
URL: https://gcc.gnu.org/viewcvs?rev=254056&root=gcc&view=rev
Log:
Cleanup autopref scheduling
r253236 broke AArch64 bootstrap. Earlier revision r2
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82407
Bug 82407 depends on bug 82396, which changed state.
Bug 82396 Summary: [8 Regression] qsort comparator non-negative on sorted
output: 4 in ready_sort_real in haifa scheduler
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82396
What
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82396
Wilco changed:
What|Removed |Added
Status|REOPENED|RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81096
--- Comment #7 from Wilco ---
Is this now fixed on PPC too? If so, it can be closed.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60580
--- Comment #10 from Wilco ---
Author: wilco
Date: Fri Nov 3 15:01:10 2017
New Revision: 254377
URL: https://gcc.gnu.org/viewcvs?rev=254377&root=gcc&view=rev
Log:
PR60580: Fix frame pointer option magic
To fix PR60580 simplify the logic in aar
||wilco at gcc dot gnu.org
Version|5.0 |4.8.0
Resolution|--- |FIXED
Target Milestone|--- |7.2
--- Comment #11 from Wilco ---
Fixed from 7.2 onwards - I've verified the failing cases now
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82786
--- Comment #1 from Wilco ---
Author: wilco
Date: Fri Nov 3 16:29:47 2017
New Revision: 254384
URL: https://gcc.gnu.org/viewcvs?rev=254384&root=gcc&view=rev
Log:
Fix PR82768
Forcing LR at the bottom of the frame caused a few test failures.
Sin
||wilco at gcc dot gnu.org
Resolution|--- |FIXED
--- Comment #2 from Wilco ---
Fixed
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82853
Wilco changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
--- Comment #9 from
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82853
--- Comment #12 from Wilco ---
(In reply to Marc Glisse from comment #11)
> (In reply to Wilco from comment #9)
> > It works for any C where (divisor*C) MOD 2^32 == 1 (or -1).
>
> For x%3==0, i.e. z==0 for x==3*y+z with 0<=y<5556 and 0<=z<3.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80131
--- Comment #7 from Wilco ---
Author: wilco
Date: Tue Nov 7 12:23:38 2017
New Revision: 254496
URL: https://gcc.gnu.org/viewcvs?rev=254496&root=gcc&view=rev
Log:
PR80131: Simplification of 1U << (31 - x)
Currently the code A << (B - C) is not
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80131
Wilco changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71026
--- Comment #8 from Wilco ---
Author: wilco
Date: Tue Nov 7 12:38:55 2017
New Revision: 254497
URL: https://gcc.gnu.org/viewcvs?rev=254497&root=gcc&view=rev
Log:
PR71026: Canonicalize negates in division
Canonicalize x / (- y) into (-x) / y.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71026
--- Comment #9 from Wilco ---
Author: wilco
Date: Thu Nov 16 11:54:49 2017
New Revision: 254816
URL: https://gcc.gnu.org/viewcvs?rev=254816&root=gcc&view=rev
Log:
Canonicalize constant multiplies in division
This patch implements some of the op
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71026
--- Comment #10 from Wilco ---
Author: wilco
Date: Fri Nov 24 16:03:13 2017
New Revision: 255141
URL: https://gcc.gnu.org/viewcvs?rev=255141&root=gcc&view=rev
Log:
Factor out division by squares
This patch implements the some of the division op
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82973
Wilco changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
--- Comment #4 from
||wilco at gcc dot gnu.org
Resolution|--- |DUPLICATE
--- Comment #2 from Wilco ---
Duplicate, same issue with movti not using literal pool when complex.
*** This bug has been marked as a duplicate of bug 82964 ***
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82964
Wilco changed:
What|Removed |Added
CC||marxin at gcc dot gnu.org
--- Comment #1 from Wi
||2017-12-05
CC||wilco at gcc dot gnu.org
Assignee|unassigned at gcc dot gnu.org |wilco at gcc dot gnu.org
Ever confirmed|0 |1
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81356
Wilco changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
--- Comment #9 from
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78041
wilco at gcc dot gnu.org changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78041
--- Comment #16 from wilco at gcc dot gnu.org ---
Author: wilco
Date: Tue Oct 25 10:25:28 2016
New Revision: 241508
URL: https://gcc.gnu.org/viewcvs?rev=241508&root=gcc&view=rev
Log:
With -fpu=neon DI mode shifts are expanded after rel
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78041
--- Comment #17 from wilco at gcc dot gnu.org ---
(In reply to Bernd Edlinger from comment #15)
> FYI: You could merge the two alternatives into one.
>
> =?r,?&r
> 0, r
> i, i
>
> is equivalent to
>
> =?&
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308
wilco at gcc dot gnu.org changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308
--- Comment #20 from wilco at gcc dot gnu.org ---
(In reply to Bernd Edlinger from comment #19)
> I think the problem with anddi iordi and xordi instructions is that
> they obscure the data flow between low and high half words.
> When
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308
--- Comment #22 from wilco at gcc dot gnu.org ---
(In reply to Bernd Edlinger from comment #21)
> (In reply to wilco from comment #20)
> > > Wilco, where have you seen the additional registers used with my
> > > previous pa
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308
--- Comment #25 from wilco at gcc dot gnu.org ---
(In reply to Bernd Edlinger from comment #24)
> (In reply to Bernd Edlinger from comment #23)
> > @@ -5020,7 +5020,7 @@
> > (define_insn_and_split "one_cmpldi2"
> &g
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308
--- Comment #27 from wilco at gcc dot gnu.org ---
(In reply to Bernd Edlinger from comment #26)
> (In reply to wilco from comment #25)
> >
> > Alternatives can be disabled, there are flags, eg:
> >
> > (set_a
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308
--- Comment #29 from wilco at gcc dot gnu.org ---
(In reply to Bernd Edlinger from comment #28)
> With my latest patch I bootstrapped a configuration with
> --with-arch=armv7-a --with-tune=cortex-a9 --with-fpu=vfpv3-d16
> --with-float=ha
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308
--- Comment #35 from wilco at gcc dot gnu.org ---
(In reply to Richard Earnshaw from comment #30)
> (In reply to wilco from comment #29)
> > Combine could help with
> > merging 2 loads/stores into a single instruction.
>
&
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308
--- Comment #36 from wilco at gcc dot gnu.org ---
(In reply to Bernd Edlinger from comment #34)
> (In reply to Richard Earnshaw from comment #33)
> > (In reply to Wilco from comment #32)
> > > (In reply to Bernd Edlinge
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308
--- Comment #41 from wilco at gcc dot gnu.org ---
(In reply to Bernd Edlinger from comment #40)
> BTW: I found something strange in this pattern in neon.md:
>
> (define_insn_and_split "orndi3_neon"
> [(s
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308
--- Comment #42 from wilco at gcc dot gnu.org ---
(In reply to Bernd Edlinger from comment #40)
> BTW: I found something strange in this pattern in neon.md:
>
> (define_insn_and_split "orndi3_neon"
> [(s
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308
--- Comment #44 from wilco at gcc dot gnu.org ---
(In reply to Bernd Edlinger from comment #38)
> Created attachment 39939 [details]
> proposed patch, v2
>
> Unlike the previous patch, thumb1 stack usage stays at 1588 bytes,
>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308
--- Comment #47 from wilco at gcc dot gnu.org ---
(In reply to Richard Earnshaw from comment #46)
> (In reply to wilco from comment #44)
> > (In reply to Bernd Edlinger from comment #38)
> > > Created attachment 39939 [detai
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308
--- Comment #51 from wilco at gcc dot gnu.org ---
(In reply to Bernd Edlinger from comment #49)
> (In reply to Bernd Edlinger from comment #48)
> > (In reply to wilco from comment #22)
> > >
> > > Anyway, there is
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61056
wilco at gcc dot gnu.org changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
CC
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308
--- Comment #55 from wilco at gcc dot gnu.org ---
(In reply to Bernd Edlinger from comment #39)
> Created attachment 39940 [details]
> proposed patch, v2
>
> last upload was accidentally truncated.
> uploaded the right patch.
R
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308
--- Comment #57 from wilco at gcc dot gnu.org ---
(In reply to Bernd Edlinger from comment #56)
> (In reply to wilco from comment #55)
> > (In reply to Bernd Edlinger from comment #39)
> > > Created attachment 39940 [details]
&g
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308
--- Comment #59 from wilco at gcc dot gnu.org ---
(In reply to Bernd Edlinger from comment #58)
> (In reply to wilco from comment #57)
> > (In reply to Bernd Edlinger from comment #56)
> > > Agreed, I can split the patch.
> &
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78453
wilco at gcc dot gnu.org changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98891
--- Comment #3 from Wilco ---
Older GCCs only ever did this for vorn, not for other operations like
add/sub/and/orr/eor, so current behaviour is now fully consistent, and I don't
consider it a bug.
One could argue these intrinsics should always
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98891
--- Comment #4 from Wilco ---
(In reply to Jakub Jelinek from comment #1)
> Reduced testcase:
> extern unsigned long long a, b, c;
>
> void
> foo (void)
> {
> a = b | ~c;
> }
>
> Seems this is the usual dilemma between split double-word opera
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99758
--- Comment #2 from Wilco ---
(In reply to Alex Coplan from comment #1)
> Confirmed. Started with r7-1850-ge4bbb037670323fbc578b6bc68cfb5252f1bf0cc:
>
> commit e4bbb037670323fbc578b6bc68cfb5252f1bf0cc
> Author: Wilco Dijkstra
> Date: Wed Jul
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98891
Wilco changed:
What|Removed |Added
Resolution|--- |WONTFIX
Status|NEW
||wilco at gcc dot gnu.org
Last reconfirmed||2021-01-11
Status|UNCONFIRMED |NEW
--- Comment #3 from Wilco ---
I fixed this in GCC10:
https://gcc.gnu.org/git/?p=gcc.git&a=commit;h=7d3b27ff12610fde9d6c4b56abc70c6ee9b6b3db
So this
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