https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308
--- Comment #41 from wilco at gcc dot gnu.org ---
(In reply to Bernd Edlinger from comment #40)
> BTW: I found something strange in this pattern in neon.md:
>
> (define_insn_and_split "orndi3_neon"
> [(set (match_operand:DI 0 "s_register_operand" "=w,?&r,?&r,?&r")
> (ior:DI (not:DI (match_operand:DI 2 "s_register_operand" "w,0,0,r"))
> (match_operand:DI 1 "s_register_operand" "w,r,r,0")))]
> "TARGET_NEON"
> "@
> vorn\t%P0, %P1, %P2
> #
> #
> #"
> "reload_completed &&
> (TARGET_NEON && !(IS_VFP_REGNUM (REGNO (operands[0]))))"
> [(set (match_dup 0) (ior:SI (not:SI (match_dup 2)) (match_dup 1)))
> (set (match_dup 3) (ior:SI (not:SI (match_dup 4)) (match_dup 5)))]
> "
> {
> if (TARGET_THUMB2)
> {
> operands[3] = gen_highpart (SImode, operands[0]);
> operands[0] = gen_lowpart (SImode, operands[0]);
> operands[4] = gen_highpart (SImode, operands[2]);
> operands[2] = gen_lowpart (SImode, operands[2]);
> operands[5] = gen_highpart (SImode, operands[1]);
> operands[1] = gen_lowpart (SImode, operands[1]);
> }
> else
> {
> emit_insn (gen_one_cmpldi2 (operands[0], operands[2]));
> emit_insn (gen_iordi3 (operands[0], operands[1], operands[0]));
> DONE;
> }
> }"
> [(set_attr "type" "neon_logic,multiple,multiple,multiple")
> (set_attr "length" "*,16,8,8")
> (set_attr "arch" "any,a,t2,t2")]
> )
>
>
> I think in alternative#4 we have operands[0] == operands[1]
> and operands[2] != operands[0]
>
> and then gen_one_cmpldi2 (operands[0], operands[2])
> will overwrite the operand[1] before it is used in
> gen_iordi3 (operands[0], operands[1], operands[0]) ??
ARM only uses the 2nd alternative (set_attr "arch" "any,a,t2,t2"), so this is
correct. There is no need to support this pattern for ARM as ARM doesn't have
ORN, and we expand early the whole pattern becomes redundant.
