https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85669
--- Comment #48 from Wilco ---
(In reply to Douglas Mencken from comment #44)
> I got assembly of pr78468.c from various versions of GCC
>
> • 7.3 produces absolutely the same as patched 8.2
> • 6.4 produces slightly different assembly with stmw
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85669
--- Comment #51 from Wilco ---
(In reply to Segher Boessenkool from comment #49)
> (In reply to Douglas Mencken from comment #46)
> > Yeah, PowerPC doesn’t have addressing via PC, thus it requires to do tricks
> > like that
>
> No, we don't have
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85669
--- Comment #52 from Wilco ---
(In reply to Segher Boessenkool from comment #50)
> The generic code rounded up the allocation size twice, and that isn't needed.
>
> The problem has been solved for other targets before; a patch for Darwin is
> at
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85669
--- Comment #56 from Wilco ---
(In reply to Douglas Mencken from comment #55)
> (In reply to Wilco from comment #52)
> > (In reply to Segher Boessenkool from comment #50)
> > > The generic code rounded up the allocation size twice, and that isn't
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87763
Wilco changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
--- Comment #3 from
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87763
--- Comment #5 from Wilco ---
(In reply to Segher Boessenkool from comment #4)
> (In reply to Wilco from comment #3)
> > IRA costing doesn't consider the possibility of a simple move being
> > removeable.
>
> Not always, yeah (only if you have m
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87763
--- Comment #7 from Wilco ---
(In reply to Richard Earnshaw from comment #6)
> (In reply to Wilco from comment #5)
> > (In reply to Segher Boessenkool from comment #4)
> > > (In reply to Wilco from comment #3)
> > > > IRA costing doesn't consider
||wilco at gcc dot gnu.org
Resolution|FIXED |---
--- Comment #10 from Wilco ---
This isn't fixed since GCC now emits for the example (-mabi=ilp32 -O2
-fno-math-errno -ftrapping-math -fno-fp-int-builtin-inexact):
f:
frintx d0, d0
fcvtz
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71026
--- Comment #11 from Wilco ---
Author: wilco
Date: Wed Nov 14 12:45:29 2018
New Revision: 266142
URL: https://gcc.gnu.org/viewcvs?rev=266142&root=gcc&view=rev
Log:
Simplify floating point comparisons
This patch implements some of the optimizati
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71026
--- Comment #12 from Wilco ---
It looks the only case left to do is f5:
x * C <= 0.0 -> x <= 0.0 if C >= 1.0
x * C <= 0.0 -> x < FLT_MIN/C if C < 1.0
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79041
Wilco changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84114
--- Comment #11 from Wilco ---
(In reply to Martin Liška from comment #10)
> Steve, Wilco: Can the bug be marked as resolved?
No, the issue has not been fixed (a workaround was added on AArch64).
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81800
--- Comment #12 from Wilco ---
(In reply to Martin Liška from comment #11)
> Wilco: Can the bug be marked as resolved?
See https://gcc.gnu.org/ml/gcc-patches/2018-11/msg01238.html.
|NEW
Last reconfirmed||2018-11-29
CC||wilco at gcc dot gnu.org
Component|rtl-optimization|middle-end
Summary|Longjmp expansion incorrect |Longjmp expansion incorrect
|on
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64242
Wilco changed:
What|Removed |Added
Assignee|unassigned at gcc dot gnu.org |wilco at gcc dot gnu.org
--- Comment #4
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64242
--- Comment #14 from Wilco ---
(In reply to Jakub Jelinek from comment #13)
> I wonder about following, on i686-linux it FAILs with older trunk and
> succeeds with current trunk. Without the (useless) stack realignment the
> right value of stack
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64242
--- Comment #16 from Wilco ---
(In reply to Christophe Lyon from comment #9)
> Created attachment 45138 [details]
> QEMU traces for --with-cpu=cortex-m3 / QEMU --cpu cortex-m3
Thanks, I can reproduce this now. It fails due to sched1 scheduling t
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64242
--- Comment #18 from Wilco ---
(In reply to Jeffrey A. Law from comment #17)
> Or just emit a blockage insn to avoid the undesirable code motion.
I tried that already, it doesn't affect the forward substitution - I guess it
simply assumes it is
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69619
--- Comment #6 from wilco at gcc dot gnu.org ---
Author: wilco
Date: Thu Feb 4 18:23:35 2016
New Revision: 233145
URL: https://gcc.gnu.org/viewcvs?rev=233145&root=gcc&view=rev
Log:
This patch fixes an exponential issue in ccmp.c. When
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70140
--- Comment #7 from Wilco ---
(In reply to Martin Liška from comment #6)
> Created attachment 41772 [details]
> Patch candidate
>
> I'm going to prepare some test-cases for that. Does it look good?
Yes, it now inlines small constant sizes. Howe
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70140
--- Comment #9 from Wilco ---
(In reply to Martin Liška from comment #8)
> (In reply to Wilco from comment #7)
> > (In reply to Martin Liška from comment #6)
> > > Created attachment 41772 [details]
> > > Patch candidate
> > >
> > > I'm going to
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46932
Wilco changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
--- Comment #3 from
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81434
Wilco changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
--- Comment #4 from
||2017-07-20
Ever confirmed|0 |1
--- Comment #6 from Wilco ---
(In reply to jim.wilson from comment #5)
> On Wed, Jul 19, 2017 at 4:25 AM, wilco at gcc dot gnu.org
> wrote:
> > To more accurately schedule fusion pairs wouldn't we ne
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46932
--- Comment #4 from Wilco ---
Patch: https://gcc.gnu.org/ml/gcc-patches/2017-07/msg01245.html
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81434
--- Comment #8 from Wilco ---
(In reply to jim.wilson from comment #7)
> On Thu, Jul 20, 2017 at 4:20 AM, wilco at gcc dot gnu.org
> wrote:
> > Do you think it might be feasible to update resource usage of a schedule
> > grou
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70140
--- Comment #11 from Wilco ---
(In reply to Martin Liška from comment #10)
> > >
> > > Yep, I've noticed. It's strange for me why it's not working. I've just
> > > asked
> > > at GCC ML: https://gcc.gnu.org/ml/gcc/2017-07/msg00144.html
> >
> >
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81303
--- Comment #8 from Wilco ---
(In reply to Richard Biener from comment #7)
Unfortunately these commits have had no effect on AArch64...
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79041
--- Comment #7 from Wilco ---
Author: wilco
Date: Mon Jul 24 18:06:37 2017
New Revision: 250478
URL: https://gcc.gnu.org/viewcvs?rev=250478&root=gcc&view=rev
Log:
Fix PR79041
As described in PR79041, -mcmodel=large -mpc-relative-literal-loads
m
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79041
--- Comment #8 from Wilco ---
Author: wilco
Date: Tue Jul 25 12:08:59 2017
New Revision: 250514
URL: https://gcc.gnu.org/viewcvs?rev=250514&root=gcc&view=rev
Log:
Fix PR79041
As described in PR79041, -mcmodel=large -mpc-relative-literal-loads
m
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79041
Wilco changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
--- Comment #9 from
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46932
--- Comment #5 from Wilco ---
Author: wilco
Date: Wed Jul 26 10:49:17 2017
New Revision: 250564
URL: https://gcc.gnu.org/viewcvs?rev=250564&root=gcc&view=rev
Log:
Fix PR46932: Block auto increment on frame pointer
Block auto increment on frame
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79041
--- Comment #10 from Wilco ---
Author: wilco
Date: Wed Jul 26 11:55:03 2017
New Revision: 250567
URL: https://gcc.gnu.org/viewcvs?rev=250567&root=gcc&view=rev
Log:
Disable pr79041-2.c with -mabi=ilp32.
gcc/testsuite/
PR target/79041
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79041
--- Comment #11 from Wilco ---
Author: wilco
Date: Wed Jul 26 11:57:57 2017
New Revision: 250569
URL: https://gcc.gnu.org/viewcvs?rev=250569&root=gcc&view=rev
Log:
Disable pr79041-2.c with -mabi=ilp32.
gcc/testsuite/
PR target/79041
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46932
Wilco changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
||2017-07-28
CC||wilco at gcc dot gnu.org
Resolution|DUPLICATE |---
Ever confirmed|0 |1
--- Comment #13 from Wilco ---
(In reply to Icenowy Zheng from comment #12)
> (In reply to Wi
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46932
--- Comment #8 from Wilco ---
Author: wilco
Date: Mon Aug 7 13:56:02 2017
New Revision: 250918
URL: https://gcc.gnu.org/viewcvs?rev=250918&root=gcc&view=rev
Log:
Fix unresolved in gcc.dg/pr46932.c
Build only if pre-increment is supported. Giv
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80283
--- Comment #17 from Wilco ---
(In reply to shatz from comment #16)
> I still think that effect of tree-ter is accidental and relatively
> unimportant.
> Very similar problems with SIMD register allocation could easily happen
> without tree-ter,
||2017-08-10
CC||wilco at gcc dot gnu.org
Ever confirmed|0 |1
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46932
--- Comment #9 from Wilco ---
Author: wilco
Date: Mon Aug 14 11:18:50 2017
New Revision: 251087
URL: https://gcc.gnu.org/viewcvs?rev=251087&root=gcc&view=rev
Log:
Add check_effective_target_autoincdec.
Add check_effective_target_autoincdec that
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81643
--- Comment #8 from Wilco ---
Author: wilco
Date: Mon Aug 14 16:18:37 2017
New Revision: 251094
URL: https://gcc.gnu.org/viewcvs?rev=251094&root=gcc&view=rev
Log:
[AArch64] Fix longbranch test
Fix longbranch test so it still generates long tbz
||wilco at gcc dot gnu.org
Resolution|--- |FIXED
--- Comment #9 from Wilco ---
Fixed in r251094.
||wilco at gcc dot gnu.org
Resolution|--- |FIXED
--- Comment #8 from Wilco ---
Fixed
||2017-08-16
CC||wilco at gcc dot gnu.org
Ever confirmed|0 |1
--- Comment #4 from Wilco ---
Confirmed. It works fine for me with ttest_CFLAGS = -pthread -funwind-tables so
the issue is that it doesn't als
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78468
--- Comment #42 from Wilco ---
(In reply to Eric Botcazou from comment #41)
> > If you cannot guarantee the alignment of the pointers to STACK_BOUNDARY then
> > STACK_BOUNDARY is incorrect.
>
> No, it is correct as per the definition:
>
> -- M
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78468
--- Comment #43 from Wilco ---
Author: wilco
Date: Wed Sep 6 16:34:54 2017
New Revision: 251811
URL: https://gcc.gnu.org/viewcvs?rev=251811&root=gcc&view=rev
Log:
PR78468 - add alloca alignment test
Add an alignment test to check that aligned
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82004
Wilco changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
--- Comment #10 from
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66462
Wilco changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
--- Comment #10 from
||2017-09-14
Assignee|unassigned at gcc dot gnu.org |wilco at gcc dot gnu.org
Ever confirmed|0 |1
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71026
Wilco changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
--- Comment #6 from
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81647
Wilco changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
--- Comment #6 from
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81647
Wilco changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last reconfirmed|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71951
--- Comment #14 from Wilco ---
Author: wilco
Date: Thu Sep 21 12:08:12 2017
New Revision: 253061
URL: https://gcc.gnu.org/viewcvs?rev=253061&root=gcc&view=rev
Log:
PR71951: Fix unwinding with -fomit-frame-pointer
As described in PR71951, if lib
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71951
--- Comment #15 from Wilco ---
Author: wilco
Date: Thu Sep 21 12:16:31 2017
New Revision: 253063
URL: https://gcc.gnu.org/viewcvs?rev=253063&root=gcc&view=rev
Log:
PR71951: Fix unwinding with -fomit-frame-pointer
As described in PR71951, if lib
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71951
--- Comment #16 from Wilco ---
Author: wilco
Date: Thu Sep 21 12:21:18 2017
New Revision: 253064
URL: https://gcc.gnu.org/viewcvs?rev=253064&root=gcc&view=rev
Log:
PR71951: Fix unwinding with -fomit-frame-pointer
As described in PR71951, if lib
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71951
Wilco changed:
What|Removed |Added
Status|REOPENED|RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79041
--- Comment #13 from Wilco ---
(In reply to Andrew Pinski from comment #12)
> This test also fails with -fpic.
It doesn't run in the testsuite with -fpic, so is it a problem?
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80266
--- Comment #4 from Wilco ---
(In reply to Qing Zhao from comment #3)
> This is a very similar bug as PR80295.
> I have had a fix for 80295 already. hopefully that fix should fix this bug
> too.
>
> since I cannot build gnat on the available mac
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79665
wilco at gcc dot gnu.org changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70773
wilco at gcc dot gnu.org changed:
What|Removed |Added
Status|NEW |WAITING
CC
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70773
--- Comment #14 from wilco at gcc dot gnu.org ---
(In reply to PeteVine from comment #11)
> I've just retested gcc7 on both ARM platforms.
>
> AArch64 gets a 3% improvement now, while ARMv7 reproduces the issue, just as
> befo
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70773
--- Comment #17 from wilco at gcc dot gnu.org ---
(In reply to PeteVine from comment #16)
> Also, I'd like to repeat the fact using -mcpu=cortex-a7 fixes the issue (no
> library calls present).
Cortex-A7 has hardware division so it d
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80530
wilco at gcc dot gnu.org changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79665
--- Comment #16 from wilco at gcc dot gnu.org ---
(In reply to wilco from comment #14)
> (In reply to PeteVine from comment #13)
> > Still, the 5% regression must have happened very recently. The fast gcc was
> > built on 201702
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79964
--- Comment #3 from wilco at gcc dot gnu.org ---
(In reply to PeteVine from comment #2)
> I can confirm the first part of the issue gets fixed with this patch:
>
> https://gcc.gnu.org/ml/gcc-patches/2017-04/msg01415.html
There are a
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79665
--- Comment #17 from wilco at gcc dot gnu.org ---
(In reply to wilco from comment #16)
> (In reply to wilco from comment #14)
> > (In reply to PeteVine from comment #13)
> > > Still, the 5% regression must have happened very
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80671
--- Comment #2 from wilco at gcc dot gnu.org ---
Author: wilco
Date: Wed May 10 11:01:26 2017
New Revision: 247831
URL: https://gcc.gnu.org/viewcvs?rev=247831&root=gcc&view=rev
Log:
Move an use-after-free access before the delete.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80754
wilco at gcc dot gnu.org changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last reconfirmed
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79062
Wilco changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
--- Comment #6 from
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80754
--- Comment #3 from Wilco ---
Patch here https://gcc.gnu.org/ml/gcc-patches/2017-05/msg01364.html
||2017-05-23
CC||wilco at gcc dot gnu.org
Ever confirmed|0 |1
--- Comment #1 from Wilco ---
(In reply to Gergö Barany from comment #0)
> Created attachment 41407 [details]
> Input C file for triggering t
||wilco at gcc dot gnu.org
Known to work||6.3.1
Resolution|--- |FIXED
Known to fail||4.8.2, 5.4.1
--- Comment #3 from Wilco ---
(In reply to Mans Rullgard from comment #0)
> Crea
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80754
--- Comment #5 from Wilco ---
Author: wilco
Date: Wed May 24 17:06:55 2017
New Revision: 248424
URL: https://gcc.gnu.org/viewcvs?rev=248424&root=gcc&view=rev
Log:
When lra-remat rematerializes an instruction with a clobber, it checks
that the cl
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80671
--- Comment #3 from Wilco ---
Author: wilco
Date: Thu May 25 15:10:01 2017
New Revision: 248461
URL: https://gcc.gnu.org/viewcvs?rev=248461&root=gcc&view=rev
Log:
Move an use-after-free access before the delete.
Backport from mainline
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80754
--- Comment #6 from Wilco ---
Author: wilco
Date: Thu May 25 15:12:49 2017
New Revision: 248463
URL: https://gcc.gnu.org/viewcvs?rev=248463&root=gcc&view=rev
Log:
When lra-remat rematerializes an instruction with a clobber, it checks
that the cl
||wilco at gcc dot gnu.org
Resolution|--- |FIXED
--- Comment #4 from Wilco ---
Fixed in trunk and GCC7.2.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80754
Wilco changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
Priority: P3
Component: fortran
Assignee: unassigned at gcc dot gnu.org
Reporter: wilco at gcc dot gnu.org
Target Milestone: ---
As reported in https://gcc.gnu.org/ml/gcc-patches/2017-05/msg01995.html all
bootstraps fail:
configure: error: conditional "HAVE_A
||wilco at gcc dot gnu.org
Resolution|--- |FIXED
Target Milestone|--- |8.0
--- Comment #2 from Wilco ---
Fixed on trunk.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79665
--- Comment #19 from Wilco ---
Author: wilco
Date: Wed Jun 28 14:13:02 2017
New Revision: 249740
URL: https://gcc.gnu.org/viewcvs?rev=249740&root=gcc&view=rev
Log:
Improve Cortex-A53 shift bypass
The aarch_forward_to_shift_is_not_shifted_reg by
||2017-07-05
CC||wilco at gcc dot gnu.org
Ever confirmed|0 |1
--- Comment #1 from Wilco ---
Confirmed. This is the same issue as:
https://gcc.gnu.org/ml/gcc-patches/2017-06/msg02422.html
Ada somehow generates SImode
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80266
--- Comment #2 from Wilco ---
Fixing aarch64_classify_address means we now reject incorrect addresses,
however GCC midend generates a lot of 32-bit pointers which are not correctly
changed into addresses, resulting in even more assertions. So the
||2017-07-07
CC||wilco at gcc dot gnu.org
Assignee|unassigned at gcc dot gnu.org |wilco at gcc dot gnu.org
Ever confirmed|0 |1
--- Comment #1 from Wilco ---
This is fixed by improving
||wilco at gcc dot gnu.org
Resolution|--- |FIXED
--- Comment #7 from Wilco ---
Confirmed fixed on trunk.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70119
Wilco changed:
What|Removed |Added
Target Milestone|--- |8.0
||2017-07-12
CC||wilco at gcc dot gnu.org
Ever confirmed|0 |1
--- Comment #3 from Wilco ---
Confirmed, on AArch64 bwaves is ~20% slower in SPEC2006 and ~30% slower in
SPEC2017. There are twice as many spills (outside
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70140
Wilco changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
--- Comment #3 from
Priority: P3
Component: middle-end
Assignee: unassigned at gcc dot gnu.org
Reporter: wilco at gcc dot gnu.org
Target Milestone: ---
Many compilers optimize small dynamic allocations into static allocation. This
is more efficient as it allows multiple small dynamic
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81445
--- Comment #2 from Wilco ---
(In reply to Marc Glisse from comment #1)
> Note that we already do it for VLA (aka BUILT_IN_ALLOCA_WITH_ALIGN) in CCP.
I don't see it happen for the simplest case in current trunk:
void t(int *);
void vla(void)
{
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81445
--- Comment #3 from Wilco ---
There is also something buggy with the way alloca aligns, it always allocates
16 bytes too much...
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81445
--- Comment #5 from Wilco ---
(In reply to Marc Glisse from comment #4)
> (In reply to Wilco from comment #2)
> > I don't see it happen for the simplest case in current trunk:
>
> 400 bytes is too large, try again with something smaller. (I'm wi
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78255
wilco at gcc dot gnu.org changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78255
--- Comment #7 from wilco at gcc dot gnu.org ---
(In reply to ktkachov from comment #6)
> (In reply to wilco from comment #5)
> > (In reply to avieira from comment #4)
> > > OK so after some extra debugging and digging I found t
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77484
wilco at gcc dot gnu.org changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77484
--- Comment #7 from wilco at gcc dot gnu.org ---
(In reply to Jan Hubicka from comment #6)
> Created attachment 40216 [details]
> predict
>
> Aha, indirect calls should probably be treated separately as their use cases
> are
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78255
--- Comment #10 from wilco at gcc dot gnu.org ---
(In reply to Richard Earnshaw from comment #8)
> Hmm, why is this even being considered on ARM?
>
> arm.h:#define NO_FUNCTION_CSE 1
>
> doc/tm.texi
> @defmac NO_FUNCTION_CSE
&
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77484
--- Comment #10 from wilco at gcc dot gnu.org ---
(In reply to Jan Hubicka from comment #9)
> Created attachment 40217 [details]
> predict
>
> Hi,
> here is patch adding the polymorphic case, too.
>
> Honza
Looks good -
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78733
wilco at gcc dot gnu.org changed:
What|Removed |Added
CC||wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78733
--- Comment #9 from wilco at gcc dot gnu.org ---
Patch posted: https://gcc.gnu.org/ml/gcc-patches/2016-12/msg00653.html
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78733
--- Comment #10 from wilco at gcc dot gnu.org ---
Author: wilco
Date: Thu Dec 8 19:18:33 2016
New Revision: 243456
URL: https://gcc.gnu.org/viewcvs?rev=243456&root=gcc&view=rev
Log:
This patch fixes an issue in aarch64_classify_address.
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