https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78733
--- Comment #10 from wilco at gcc dot gnu.org --- Author: wilco Date: Thu Dec 8 19:18:33 2016 New Revision: 243456 URL: https://gcc.gnu.org/viewcvs?rev=243456&root=gcc&view=rev Log: This patch fixes an issue in aarch64_classify_address. TImode and TFmode can either use a 64-bit LDP/STP or 128-bit LDR/STR. The addressing mode must be carefully modelled as the intersection of both. This is done for the immediate offsets, however load_store_pair_p must be set as well to avoid LDP with a PC-relative address if aarch64_pcrelative_literal_loads is true. gcc/ PR target/78733 * config/aarch64/aarch64.c (aarch64_classify_address): Set load_store_pair_p for TImode and TFmode. testsuite/ * gcc.target/aarch64/pr78733.c: New test. Modified: trunk/gcc/ChangeLog trunk/gcc/config/aarch64/aarch64.c trunk/gcc/testsuite/ChangeLog
