[Bug c/99316] ICE: in final_scan_insn_1, at final.c:3073 (error: could not split insn)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99316 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED CC

[Bug target/96357] [10/11 Regression] could not split insn UNSPEC_COND_FSUB with AArch64 SVE

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96357 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||andrew.goodbody at linaro do

[Bug middle-end/93235] [AArch64] ICE with __fp16 in a struct

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93235 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot gnu.org

[Bug target/99195] Optimise away vec_concat of 64-bit AdvancedSIMD operations with zeroes in aarch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99195 --- Comment #1 from ktkachov at gcc dot gnu.org --- Using a define_subst like: (define_subst "add_vec_concat_subst" [(set (match_operand:VDMOV 0 "" "") (match_operand:VDMOV 1 "" ""))] "!BYTES_BIG_ENDIAN" [(set (match_operand: 0 "regi

[Bug target/99312] __ARM_ARCH is not implemented correctly when compiled with -march=armv8.1-a

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99312 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot gnu.org

[Bug target/99437] [11 Regression] Error: immediate value out of range 1 to 8 at operand 3 -- `shrn v1.8b,v1.8h,15'

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99437 ktkachov at gcc dot gnu.org changed: What|Removed |Added Priority|P3 |P1 Assignee|unass

[Bug middle-end/99520] New: Failure to detect bswap pattern

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99520 Bug ID: 99520 Summary: Failure to detect bswap pattern Product: gcc Version: unknown Status: UNCONFIRMED Keywords: missed-optimization Severity: normal Priority

[Bug middle-end/99520] Failure to detect bswap pattern

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99520 --- Comment #4 from ktkachov at gcc dot gnu.org --- (In reply to Jakub Jelinek from comment #3) > Consider e.g. > unsigned foo (unsigned x) > { > return (x<<24) + ((x<<8)&0xff) + ((x>>8)&0xff00) + (x>>24) + > (((x&0xff00)<<16)>>8); > } > as

[Bug middle-end/99520] Failure to detect bswap pattern

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99520 --- Comment #6 from ktkachov at gcc dot gnu.org --- FWIW the version in the initial comment is what appears in 525.x264_r in SPEC2017

[Bug target/99540] [10/11 Regression] ICE: Segmentation fault in aarch64_add_offset

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99540 ktkachov at gcc dot gnu.org changed: What|Removed |Added Target Milestone|--- |10.3 Known to work|

[Bug rtl-optimization/99560] aarch64: ICE (segfault) in LRA with SVE intrinsics

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99560 ktkachov at gcc dot gnu.org changed: What|Removed |Added Component|target |rtl-optimization Last rec

[Bug target/99593] [11 Regression] arm Neon ICE when compiling firefox (skia) since r11-6708

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99593 ktkachov at gcc dot gnu.org changed: What|Removed |Added Summary|[11 Regression] arm MVE ICE |[11 Regression] arm Neon

[Bug ipa/96825] [11 Regression] Commit r11-2645 degrades CPU2017 548.exchange2_r by 35%

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96825 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot gnu.org

[Bug target/99593] [11 Regression] arm Neon ICE when compiling firefox (skia) since r11-6708

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99593 --- Comment #8 from ktkachov at gcc dot gnu.org --- (In reply to Christophe Lyon from comment #7) > Created attachment 50412 [details] > proposed testcase > > Here is a proposal for a testcase derived from the initial description: > - added relev

[Bug target/99593] [11 Regression] arm Neon ICE when compiling firefox (skia) since r11-6708

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99593 --- Comment #10 from ktkachov at gcc dot gnu.org --- (In reply to Jakub Jelinek from comment #9) > Comment on attachment 50412 [details] > proposed testcase > > Any reason not to replace > __simd128_int32_t with int32x4_t , > __simd128_float32_t

[Bug target/96582] aarch64:ICE during GIMPLE pass: veclower

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96582 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot gnu.org

[Bug target/99766] New: ICE: unable to generate reloads with SVE code

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99766 Bug ID: 99766 Summary: ICE: unable to generate reloads with SVE code Product: gcc Version: 11.0 Status: UNCONFIRMED Keywords: ice-on-valid-code Severity: normal

[Bug target/99766] [11 Regression] ICE: unable to generate reloads with SVE code

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99766 ktkachov at gcc dot gnu.org changed: What|Removed |Added Target Milestone|--- |11.0 Priority|P3

[Bug target/99807] ICE in vect_slp_analyze_node_operations_1, at tree-vect-slp.c:3727

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99807 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot gnu.org,

[Bug target/99813] [11 Regression] SVE: Invalid assembly at -O3 (multiplier out of range in incb instruction)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99813 ktkachov at gcc dot gnu.org changed: What|Removed |Added Known to work||10.2.1 Summary|S

[Bug target/99766] [11 Regression] ICE: unable to generate reloads with SVE code since r11-7807-gbe70bb5e

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99766 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|NEW |RESOLVED Resolution

[Bug target/99808] [8/9/10/11 Regression] ICE in as_a, at machmode.h:365

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99808 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|ASSIGNED|RESOLVED CC

[Bug target/99037] Invalid representation of vector zero in aarch64-simd.md

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99037 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||asolokha at gmx dot com ---

[Bug target/99822] [11 Regression] Assembler messages: Error: integer register expected in the extended/shifted operand register at operand 3 -- `adds x1,xzr,#2'

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99822 ktkachov at gcc dot gnu.org changed: What|Removed |Added Known to work||10.2.1 Known to fail|

[Bug target/99822] [11 Regression] Assembler messages: Error: integer register expected in the extended/shifted operand register at operand 3 -- `adds x1,xzr,#2'

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99822 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|NEW |ASSIGNED Assignee

[Bug target/99822] [11 Regression] Assembler messages: Error: integer register expected in the extended/shifted operand register at operand 3 -- `adds x1,xzr,#2'

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99822 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution

[Bug target/99820] aarch64: ICE (segfault) in aarch64_analyze_loop_vinfo with -moverride=tune=use_new_vector_costs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99820 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot gnu.org

[Bug tree-optimization/96974] [10/11 Regression] ICE in vect_get_vector_types_for_stmt compiling for SVE

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96974 --- Comment #13 from ktkachov at gcc dot gnu.org --- Fixed now?

[Bug target/97349] Incorrect types for some AArch64 Neon vdupq_n_<...> intrinsics

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97349 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|NEW |RESOLVED Resolution

[Bug target/97349] Incorrect types for some AArch64 Neon vdupq_n_<...> intrinsics

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97349 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|RESOLVED|ASSIGNED Resolution

[Bug target/97349] Incorrect types for some AArch64 Neon vdupq_n_<...> intrinsics

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97349 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution

[Bug tree-optimization/97405] New: ICE in get_or_alloc_expr_for in code hoisting with SVE intrinsics

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97405 Bug ID: 97405 Summary: ICE in get_or_alloc_expr_for in code hoisting with SVE intrinsics Product: gcc Version: unknown Status: UNCONFIRMED Keywords: ice-on-vali

[Bug tree-optimization/97405] ICE in get_or_alloc_expr_for in code hoisting with SVE intrinsics

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97405 ktkachov at gcc dot gnu.org changed: What|Removed |Added Target Milestone|--- |10.2 Known to fail|

[Bug target/97442] New: Wrong represenation of AArch64 saba in RTL

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97442 Bug ID: 97442 Summary: Wrong represenation of AArch64 saba in RTL Product: gcc Version: unknown Status: UNCONFIRMED Keywords: wrong-code Severity: normal Priori

[Bug target/97534] [10/11 Regression] ICE in decompose, at rtl.h:2280 (arm-linux-gnueabihf)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97534 ktkachov at gcc dot gnu.org changed: What|Removed |Added Last reconfirmed||2020-10-23 Stat

[Bug target/97528] [10/11 Regression] ICE in decompose_automod_address, at rtlanal.c:6298 (arm-linux-gnueabihf)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97528 ktkachov at gcc dot gnu.org changed: What|Removed |Added Ever confirmed|0 |1 Last reconfirmed|

[Bug target/97546] [11 Regression][SVE] ICE with -fenable-tree-bswap

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97546 ktkachov at gcc dot gnu.org changed: What|Removed |Added Priority|P3 |P1 CC|

[Bug target/97546] [11 Regression][SVE] ICE with -fenable-tree-bswap

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97546 --- Comment #2 from ktkachov at gcc dot gnu.org --- Likely find_bswap_or_nop just needs to bail out if !cst_and_fits_in_hwi (TYPE_SIZE_UNIT (gimple_expr_type (stmt)))

[Bug tree-optimization/97546] [11 Regression][SVE] ICE with -fenable-tree-bswap

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97546 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|NEW |ASSIGNED Assignee

[Bug tree-optimization/97546] [11 Regression][SVE] ICE with -fenable-tree-bswap

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97546 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution

[Bug target/70210] -march=native and -mcpu=native do not detect ARM cortex-a53 in 32 bit mode on Linux

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70210 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot gnu.org

[Bug target/70210] -march=native and -mcpu=native do not detect ARM cortex-a53 in 32 bit mode on Linux

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70210 --- Comment #6 from ktkachov at gcc dot gnu.org --- (In reply to Viktor Engelmann from comment #5) > Hmmm the problem isn't related to docker - I get the same problem when I run > gcc on the raspberry directly with -mcpu=armv7l as autoconf does in

[Bug tree-optimization/97904] New: ICE with AArch64 SVE intrinsics

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97904 Bug ID: 97904 Summary: ICE with AArch64 SVE intrinsics Product: gcc Version: unknown Status: UNCONFIRMED Keywords: ice-on-valid-code Severity: normal Priority:

[Bug tree-optimization/97904] ICE with AArch64 SVE intrinsics

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97904 ktkachov at gcc dot gnu.org changed: What|Removed |Added Known to fail||10.2.1, 11.0 Target Miles

[Bug tree-optimization/97929] [11 Regression] ICE: in exact_div, at poly-int.h:2219 (vect_get_num_vectors)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97929 ktkachov at gcc dot gnu.org changed: What|Removed |Added Ever confirmed|0 |1 Status|UNCONF

[Bug c/97969] [9/10/11 Regression][ARM/Thumb] Certain combo of codegen options leads to compilation infinite loop with growing memory use

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97969 ktkachov at gcc dot gnu.org changed: What|Removed |Added Target||arm Status|UNCO

[Bug tree-optimization/97984] New: [10/11 Regression] Worse code for -O3 than -O2 on aarch64 vector multiply-add

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97984 Bug ID: 97984 Summary: [10/11 Regression] Worse code for -O3 than -O2 on aarch64 vector multiply-add Product: gcc Version: unknown Status: UNCONFIRMED Keywords:

[Bug target/97969] [9/10/11 Regression][ARM/Thumb] Certain combo of codegen options leads to compilation infinite loop with growing memory use

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97969 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||vmakarov at gcc dot gnu.org

[Bug target/97969] [9/10/11 Regression][ARM/Thumb] Certain combo of codegen options leads to compilation infinite loop with growing memory use

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97969 --- Comment #6 from ktkachov at gcc dot gnu.org --- Bisection shows it started with g:8d2d39587d941a40f25ea0144cceb677df115040

[Bug target/97969] [9/10/11 Regression][ARM/Thumb] Certain combo of codegen options leads to compilation infinite loop with growing memory use

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97969 --- Comment #8 from ktkachov at gcc dot gnu.org --- (In reply to Haoxin Tu from comment #7) > (In reply to Paul Sokolovsky from comment #0) > > Hi, Paul. May I ask how to reduce compile-time-hog/memory-hog test cases > using CReduce? > I know CRe

[Bug target/98177] [11 Regression] SVE: ICE in expand_direct_optab_fn, at internal-fn.c:3368

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98177 ktkachov at gcc dot gnu.org changed: What|Removed |Added Last reconfirmed||2020-12-07 Ever confirm

[Bug c/98199] [11 Regression] ICE: Aborted (stack smashing detected)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98199 ktkachov at gcc dot gnu.org changed: What|Removed |Added Last reconfirmed||2020-12-08 Stat

[Bug target/98259] [11 Regression] error: 'void verify_insn_chain()' causes a section type conflict with 'void init_rtl_bb_info(basic_block)'

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98259 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot gnu.org

[Bug tree-optimization/98279] ICE in apply_scale with --param=hot-bb-frequency-fraction >= 2^31

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98279 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot gnu.org

[Bug c++/98322] optimizes to false instead true

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98322 ktkachov at gcc dot gnu.org changed: What|Removed |Added Resolution|--- |INVALID CC|

[Bug tree-optimization/98350] New: Reassociation breaks FMA chains

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98350 Bug ID: 98350 Summary: Reassociation breaks FMA chains Product: gcc Version: unknown Status: UNCONFIRMED Keywords: missed-optimization Severity: normal Priority

[Bug target/96313] [AArch64] vqmovun* return types should be unsigned

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96313 ktkachov at gcc dot gnu.org changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |ktkachov at gcc dot

[Bug target/97150] [AArch64] 2nd parameter of unsigned Neon scalar shift intrinsics should be signed

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97150 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Ever confirmed

[Bug target/97323] [10/11 Regression] ICE 'verify_type' failed on arm-linux-gnueabihf

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97323 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |NEW CC|kyry

[Bug target/97150] [AArch64] 2nd parameter of unsigned Neon scalar shift intrinsics should be signed

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97150 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution

[Bug target/96313] [AArch64] vqmovun* return types should be unsigned

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96313 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution

[Bug target/97349] Incorrect types for some Arm Neon vdupq_n_<...> intrinsics

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97349 ktkachov at gcc dot gnu.org changed: What|Removed |Added Last reconfirmed||2020-10-09 Targ

[Bug c++/98448] New: [11 Regression] bootstrap-O3 comparison fails due to libcody

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98448 Bug ID: 98448 Summary: [11 Regression] bootstrap-O3 comparison fails due to libcody Product: gcc Version: unknown Status: UNCONFIRMED Keywords: build

[Bug target/98453] New: aarch64: Missed opportunity for STP for vec_duplicate

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98453 Bug ID: 98453 Summary: aarch64: Missed opportunity for STP for vec_duplicate Product: gcc Version: unknown Status: UNCONFIRMED Keywords: missed-optimization Severity: nor

[Bug target/98477] New: aarch64: Unnecessary GPR -> FPR moves for conditional select

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98477 Bug ID: 98477 Summary: aarch64: Unnecessary GPR -> FPR moves for conditional select Product: gcc Version: unknown Status: UNCONFIRMED Keywords: missed-optimizat

[Bug target/98477] aarch64: Unnecessary GPR -> FPR moves for conditional select

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98477 --- Comment #1 from ktkachov at gcc dot gnu.org --- Or a =r,r,r alternative to the FCSEL pattern instead...

[Bug c++/98448] [11 Regression] bootstrap-O3 comparison fails due to libcody

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98448 --- Comment #2 from ktkachov at gcc dot gnu.org --- Indeed, I see it passing with today's trunk. Nathan, if you can't reproduce it feel free to close this.

[Bug tree-optimization/96974] [10/11 Regression] ICE in vect_get_vector_types_for_stmt compiling for SVE

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96974 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |NEW Priority|P3

[Bug target/98532] New: Use load/store pairs for 2-element vector in memory permutes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98532 Bug ID: 98532 Summary: Use load/store pairs for 2-element vector in memory permutes Product: gcc Version: unknown Status: UNCONFIRMED Keywords: missed-optimizat

[Bug tree-optimization/98535] New: [11 Regression] ICE in operands_scanner::get_expr_operands(tree_node**, int) building 538.imagick_r

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98535 Bug ID: 98535 Summary: [11 Regression] ICE in operands_scanner::get_expr_operands(tree_node**, int) building 538.imagick_r Product: gcc Version: unknown

[Bug tree-optimization/98535] [11 Regression] ICE in operands_scanner::get_expr_operands(tree_node**, int) building 538.imagick_r

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98535 ktkachov at gcc dot gnu.org changed: What|Removed |Added Target Milestone|--- |11.0 Priority|P3

[Bug tree-optimization/98535] [11 Regression] ICE in operands_scanner::get_expr_operands(tree_node**, int) building 538.imagick_r

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98535 --- Comment #1 from ktkachov at gcc dot gnu.org --- This backtrace started with my commit 64432b680eab0bddbe9a4ad4798457cf6a14ad60 but before this it still ICEd with: foo.c: In function 'i': foo.c:12:1: error: type mismatch in 'vec_perm_expr' 1

[Bug tree-optimization/98535] [11 Regression] ICE in operands_scanner::get_expr_operands(tree_node**, int) building 538.imagick_r

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98535 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||rsandifo at gcc dot gnu.org

[Bug tree-optimization/98581] New: unexpected reassociation for umin/umax ?

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98581 Bug ID: 98581 Summary: unexpected reassociation for umin/umax ? Product: gcc Version: unknown Status: UNCONFIRMED Keywords: missed-optimization Severity: normal

[Bug target/98636] [ARM] ICE on passing incompatible options for fp16 - global_options’ are modified in local context

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98636 --- Comment #8 from ktkachov at gcc dot gnu.org --- (In reply to prathamesh3492 from comment #7) > I think the error is correct. > CCing Kyrill -- could you please confirm if the error is valid for > above case ? > Thanks! Yes, -mfp16-format=alte

[Bug c++/98641] New: Feature request: implement pointer alignment builtins

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98641 Bug ID: 98641 Summary: Feature request: implement pointer alignment builtins Product: gcc Version: unknown Status: UNCONFIRMED Severity: normal Priority: P3 Comp

[Bug c++/98641] Feature request: implement pointer alignment builtins

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98641 --- Comment #1 from ktkachov at gcc dot gnu.org --- The component is marked as C++, but it would be good to have these in C as well.

[Bug target/98657] [11 Regression] SVE: ICE (unrecognizable insn) with shift at -O3 -msve-vector-bits=256

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98657 ktkachov at gcc dot gnu.org changed: What|Removed |Added Ever confirmed|0 |1 Priority|P3

[Bug target/98681] [8/9/10/11 Regression] aarch64: Invalid ubfiz instruction rejected by assembler

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98681 ktkachov at gcc dot gnu.org changed: What|Removed |Added Ever confirmed|0 |1 Status|UNCONF

[Bug tree-optimization/98268] [10 Regression] ICE: verify_gimple failed with LTO and SVE

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98268 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |NEW Priority|P3

[Bug tree-optimization/98268] [10/11 Regression] ICE: verify_gimple failed with LTO and SVE

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98268 ktkachov at gcc dot gnu.org changed: What|Removed |Added Summary|[10 Regression] ICE:|[10/11 Regression] ICE:

[Bug tree-optimization/98726] [10/11 Regression] SVE: tree check: expected integer_cst, have poly_int_cst in to_wide, at tree.h:5984

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98726 ktkachov at gcc dot gnu.org changed: What|Removed |Added Known to work||9.3.1 Status|UN

[Bug tree-optimization/98766] [10/11 Regression] SVE: ICE in tree_to_shwi with -O3 --param=avoid-fma-max-bits

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98766 ktkachov at gcc dot gnu.org changed: What|Removed |Added Known to fail||10.2.1 Summary|S

[Bug c/97172] [11 Regression] ICE: tree code ‘ssa_name’ is not supported in LTO streams since r11-3303-g6450f07388f9fe57

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97172 ktkachov at gcc dot gnu.org changed: What|Removed |Added Last reconfirmed|2020-09-23 00:00:00 |2021-1-22 C

[Bug rtl-optimization/98791] [11 Regression] ICE in paradoxical_subreg_p (in ira) with SVE, LTO

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98791 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot gnu.org

[Bug target/98792] New: Fail to use SHRN instructions for narrowing shift on aarch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98792 Bug ID: 98792 Summary: Fail to use SHRN instructions for narrowing shift on aarch64 Product: gcc Version: unknown Status: UNCONFIRMED Keywords: missed-optimizat

[Bug tree-optimization/98766] [10/11 Regression] SVE: ICE in tree_to_shwi with -O3 --param=avoid-fma-max-bits

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98766 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|NEW |ASSIGNED --- Comment #3 fro

[Bug tree-optimization/98766] [10 Regression] SVE: ICE in tree_to_shwi with -O3 --param=avoid-fma-max-bits

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98766 ktkachov at gcc dot gnu.org changed: What|Removed |Added Summary|[10/11 Regression] SVE: ICE |[10 Regression] SVE: ICE in

[Bug target/98849] [11 Regression] ICE in expand_shift_1, at expmed.c:2658 since g:7432f255b70811dafaf325d9403

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98849 --- Comment #5 from ktkachov at gcc dot gnu.org --- Looks like after the refactoring to introduce MVE shifts (which doesn't ICE) we need to make sure the optab is still disabled for iwmmxt?

[Bug tree-optimization/98766] [10 Regression] SVE: ICE in tree_to_shwi with -O3 --param=avoid-fma-max-bits

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98766 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution

[Bug target/98867] New: Failure to use SRI instruction for shift-right-and-insert vector operations

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98867 Bug ID: 98867 Summary: Failure to use SRI instruction for shift-right-and-insert vector operations Product: gcc Version: unknown Status: UNCONFIRMED Keywords: m

[Bug target/92665] [AArch64] low lanes select not optimized out for vmlal intrinsics

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92665 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot gnu.org

[Bug target/95265] aarch64: suboptimal code generation for common neon intrinsic sequence involving shrn and mull

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95265 Bug 95265 depends on bug 92665, which changed state. Bug 92665 Summary: [AArch64] low lanes select not optimized out for vmlal intrinsics https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92665 What|Removed |Added -

[Bug target/98877] [AArch64] Inefficient code generated for tbl NEON intrinsics

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98877 ktkachov at gcc dot gnu.org changed: What|Removed |Added Ever confirmed|0 |1 CC|

[Bug target/91753] Bad register allocation of multi-register types

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91753 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot gnu.org

[Bug target/97528] [9/10 Regression] ICE in decompose_automod_address, at rtlanal.c:6298 (arm-linux-gnueabihf)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97528 --- Comment #8 from ktkachov at gcc dot gnu.org --- If the patch tests cleanly we should apply it to GCC 9 and 8 too (if applicable)

[Bug target/98917] SVE: wrong code with -O -ftree-vectorize -msve-vector-bits=128 --param=aarch64-autovec-preference=2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98917 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot gnu.org

[Bug target/98931] [11 Regression] arm: Assembly fails with "branch out of range or not a multiple of 2"

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98931 ktkachov at gcc dot gnu.org changed: What|Removed |Added Summary|arm: Assembly fails with|[11 Regression] arm:

[Bug tree-optimization/98949] gcc-9.3 aarch64 -ftree-vectorize generates wrong code

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98949 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot gnu.org

[Bug middle-end/98974] [11 Regression] ICE in vectorizable_condition after STMT_VINFO_VEC_STMTS

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98974 ktkachov at gcc dot gnu.org changed: What|Removed |Added Last reconfirmed||2021-02-05 Known to fa

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