https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99766
Bug ID: 99766
Summary: ICE: unable to generate reloads with SVE code
Product: gcc
Version: 11.0
Status: UNCONFIRMED
Keywords: ice-on-valid-code
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: ktkachov at gcc dot gnu.org
Target Milestone: ---
Target: aarch64
#include <arm_sve.h>
#include <vector>
typedef float b __attribute__((__mode__(HF)));
typedef struct {
b c;
b d;
} e;
int f;
e *g;
void l(int s) {
std::vector<e> m(s);
for (; f;) {
auto a = &g[0];
for (int i;; ++i) {
int n = i;
auto o = &a[n];
auto p = &m[i];
float16_t q;
for (int k; k < s;)
for (int j; j < i; ++j) {
auto r = o;
for (k = 0; k < s; ++k)
p[k].c = r[k].c * r[k].d;
}
for (int k; k < s; ++k) {
p[k].c *= q;
p[k].d *= q;
}
}
}
}
With -std=c++17 -O3 -march=armv8.5-a+sve2 ICEs with:
ice.c: In function 'void l(int)':
ice.c:31:1: error: unable to generate reloads for:
31 | }
| ^
(insn 312 308 326 39 (set (subreg:VNx4SI (reg:VNx8HF 105 [ _17 ]) 0)
(unspec:VNx4SI [
(subreg:VNx4BI (reg:VNx16BI 365) 0)
(vec_duplicate:VNx4SI (mem/c:SI (plus:DI (reg/f:DI 64 sfp)
(const_int 272 [0x110])) [12 S4 A128]))
(const_vector:VNx4SI [
(const_int 0 [0])
])
] UNSPEC_SEL)) 4825 {sve_ld1rvnx4si}
(nil))
during RTL pass: reload
This seems to be very recent. A trunk from 23 March doesn't ICE
