[Bug target/94591] [8/9/10/11 Regression] Assembler messages: Error: operand mismatch -- `rev64 v0.2d,v0.2d' (or `rev32 v0.2s,v0.2s')

2020-05-19 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94591 Alex Coplan changed: What|Removed |Added CC||acoplan at gcc dot gnu.org

[Bug target/94591] [8/9/10/11 Regression] Assembler messages: Error: operand mismatch -- `rev64 v0.2d,v0.2d' (or `rev32 v0.2s,v0.2s')

2020-05-20 Thread acoplan at gcc dot gnu.org
|ASSIGNED Assignee|unassigned at gcc dot gnu.org |acoplan at gcc dot gnu.org --- Comment #5 from Alex Coplan --- Re-opening to track backporting progress.

[Bug target/94591] [8/9/10/11 Regression] Assembler messages: Error: operand mismatch -- `rev64 v0.2d,v0.2d' (or `rev32 v0.2s,v0.2s')

2020-05-29 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94591 Alex Coplan changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/95526] New: aarch64: Wrong code accessing complex number from varargs

2020-06-04 Thread acoplan at gcc dot gnu.org
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- Commit eb72dc663e9070b281be83a80f6f838a3a878822 introduces a wrong code bug on AArch64. This causes the test case gcc/testsuite/gcc.dg/complex

[Bug target/95526] [11 Regression] aarch64: Wrong code accessing complex number from varargs

2020-06-04 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95526 --- Comment #3 from Alex Coplan --- I'm happy to test the fix.

[Bug target/95526] [11 Regression] aarch64: Wrong code accessing complex number from varargs

2020-06-04 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95526 --- Comment #4 from Alex Coplan --- Ok, bootstrap and test looks good. Cleaned up a bunch of recent testsuite failures: +PASS: gcc.dg/compat/scalar-by-value-3 c_compat_x_tst.o-c_compat_y_tst.o execute +PASS: gcc.dg/compat/scalar-by-value-4 c_com

[Bug target/95526] [11 Regression] aarch64: Wrong code accessing complex number from varargs

2020-06-04 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95526 Alex Coplan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/95055] [11 Regression] gcc.dg/compat/scalar-by-value-3 fails on aarch64 after r11-165-geb72dc663e9070b281be83a80f6f838a3a878822

2020-06-05 Thread acoplan at gcc dot gnu.org
|--- |FIXED CC||acoplan at gcc dot gnu.org --- Comment #1 from Alex Coplan --- Hi Christophe, see PR95526: this should be fixed by ab56390384cd5168b548ff07e6f0c9c4d41420fb.

[Bug target/95526] [11 Regression] aarch64: Wrong code accessing complex number from varargs

2020-06-05 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95526 Alex Coplan changed: What|Removed |Added CC||clyon at gcc dot gnu.org --- Comment #8 fr

[Bug target/95055] [11 Regression] gcc.dg/compat/scalar-by-value-3 fails on aarch64 after r11-165-geb72dc663e9070b281be83a80f6f838a3a878822

2020-06-05 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95055 Alex Coplan changed: What|Removed |Added Resolution|FIXED |DUPLICATE --- Comment #2 from Alex Coplan

[Bug tree-optimization/95056] [11 Regression] slp-perm-9.c fails on aarch64 after gbc484e250990393e887f7239157cc85ce6fadcce

2020-06-09 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95056 Alex Coplan changed: What|Removed |Added Last reconfirmed||2020-06-09 Status|UNCONFIRMED

[Bug target/95650] New: aarch64: Missed optimization storing addition of two shorts

2020-06-12 Thread acoplan at gcc dot gnu.org
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- With the following C code: void foo(unsigned short a, unsigned short b, unsigned short *ptr) { *ptr = a + b; } AArch64 GCC at -O2

[Bug target/95650] aarch64: Missed optimization storing addition of two shorts

2020-06-12 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95650 --- Comment #3 from Alex Coplan --- I think clang's optimisation is sound here. C says that we add two shorts as int and then truncate to short (i.e. reduce mod 16). The question is whether the top bits being set (which the ABI allows) can infl

[Bug target/95676] [armhf] g++ mis-compiles code at -O1 or above

2020-06-23 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95676 Alex Coplan changed: What|Removed |Added Status|WAITING |RESOLVED Resolution|---

[Bug middle-end/96044] New: GCC hangs in tight loop resolving __builtin_jn using MPFR

2020-07-03 Thread acoplan at gcc dot gnu.org
Priority: P3 Component: middle-end Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- On the following code: void f(void) { __builtin_jn(7,7); } GCC since 4.3 hangs in a tight loop inside MPFR code trying to

[Bug middle-end/96044] GCC hangs in tight loop resolving __builtin_jn using MPFR

2020-07-03 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96044 --- Comment #3 from Alex Coplan --- Ah, it appears I just wasn't being patient enough. It seems you can make the constant folding take longer (arbitrarily long?) by adding another digit to the arguments. This code: void f(void) { __builtin_jn

[Bug middle-end/96044] GCC hangs in tight loop resolving __builtin_jn using MPFR

2020-07-03 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96044 --- Comment #4 from Alex Coplan --- I left the updated version running for ~1 hour and it didn't finish compiling.

[Bug jit/95498] unhandled conversion

2020-07-13 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95498 --- Comment #5 from Alex Coplan --- Created attachment 48867 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=48867&action=edit Minimal reproducer I've done some exhaustive testing of which combinations of casts are allowed. It seems that an

[Bug jit/69435] Truncated lines in jit.log

2020-07-20 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69435 Alex Coplan changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug rtl-optimization/96796] [9 Regression] aarch64: ICE during RTL pass: reload

2020-08-26 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96796 --- Comment #3 from Alex Coplan --- Adding -fcommon, I can reproduce this ICE on trunk. The default changed in GCC 10 (as of 6271dd984d7f920d4fb17ad37af6a1f8e6b796dc).

[Bug rtl-optimization/96796] [9/10/11 Regression] aarch64: ICE during RTL pass: reload

2020-08-26 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96796 --- Comment #5 from Alex Coplan --- Started with this change: https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=8eaff6ef97836100801f7b40dc03f77fbebe03ac

[Bug rtl-optimization/96998] GCC ICEs in on building AArch64 Linux kernel after basepoints/gcc-11-2903-g6b3034eaba83

2020-09-09 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96998 --- Comment #2 from Alex Coplan --- I'll take a look, thanks.

[Bug rtl-optimization/96998] GCC ICEs in on building AArch64 Linux kernel after basepoints/gcc-11-2903-g6b3034eaba83

2020-09-09 Thread acoplan at gcc dot gnu.org
|1 Assignee|unassigned at gcc dot gnu.org |acoplan at gcc dot gnu.org Status|UNCONFIRMED |ASSIGNED --- Comment #3 from Alex Coplan --- Confirmed. GCC trunk ICEs on AArch64 when compiling kernel/cgroup/cgroup.c. Seems to happen when

[Bug rtl-optimization/96998] GCC ICEs in on building AArch64 Linux kernel after basepoints/gcc-11-2903-g6b3034eaba83

2020-09-09 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96998 --- Comment #4 from Alex Coplan --- Ok, the following reduced testcase ICEs at -O2: int h(void); struct c d; struct c { int e[1]; }; void f(void) { int g; for (;; g = h()) { int *i = &d.e[g]; asm("" : "=Q"(*i)); } }

[Bug rtl-optimization/96998] GCC ICEs in on building AArch64 Linux kernel after basepoints/gcc-11-2903-g6b3034eaba83

2020-09-09 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96998 --- Comment #5 from Alex Coplan --- This just looks like a missing pattern which we've started noticing since the new canonicalisation was introduced. I imagine reinstating the *add__multp2 pattern and rewriting it to use shifts instead will fix

[Bug target/96998] GCC ICEs in on building AArch64 Linux kernel after basepoints/gcc-11-2903-g6b3034eaba83

2020-09-10 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96998 --- Comment #6 from Alex Coplan --- I have a patch, just testing it now.

[Bug rtl-optimization/96475] direct threaded interpreter with computed gotos generates suboptimal dispatch loop

2020-09-10 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96475 --- Comment #15 from Alex Coplan --- > there are similar ICEs while running the GCC testsuite for aarch64-elf Confirmed, seeing these ICEs when running the testsuite on aarch64-none-linux-gnu.

[Bug target/96998] GCC ICEs in on building AArch64 Linux kernel after basepoints/gcc-11-2903-g6b3034eaba83

2020-09-10 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96998 --- Comment #7 from Alex Coplan --- Patch up for review: https://gcc.gnu.org/pipermail/gcc-patches/2020-September/553605.html

[Bug tree-optimization/97079] New: [11 Regression] aarch64, SVE: ICE in SLP recognizer since r11-3148-g8d3767c30240c901a493d82d9d20f306b2f0152d

2020-09-16 Thread acoplan at gcc dot gnu.org
Status: UNCONFIRMED Severity: normal Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- Since r11-3148-g8d3767c30240c901a493d82d9d20f306b2f0152d

[Bug tree-optimization/97079] [11 Regression] aarch64, SVE: ICE in SLP recognizer since r11-3148-g8d3767c30240c901a493d82d9d20f306b2f0152d

2020-09-17 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97079 --- Comment #2 from Alex Coplan --- Ah, yes, the ICE re-appears immediately prior to r11-3095-g47ddf4c7b1d4471cb9534f27844ab5e4279c2168, so the bug was temporarily hidden on trunk. I'll do another bisect, thanks.

[Bug tree-optimization/97079] [11 Regression] aarch64, SVE: ICE in SLP recognizer since r11-3148-g8d3767c30240c901a493d82d9d20f306b2f0152d

2020-09-17 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97079 --- Comment #3 from Alex Coplan --- It seems this was introduced with r11-2817-gcdb2e365fc0dba2ee052827e5ca65234ca82d605: commit cdb2e365fc0dba2ee052827e5ca65234ca82d605 Author: Martin Liska Date: Fri Jul 31 09:53:39 2020 SLP: support en

[Bug tree-optimization/97085] New: [11 Regression] aarch64, SVE: ICE in gimple_expand_vec_cond_expr since r11-2610-ga1ee6d507b

2020-09-17 Thread acoplan at gcc dot gnu.org
Severity: normal Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- For the following testcase: int a, b, c, d; short e, g; unsigned short f; void h() { for (; d

[Bug rtl-optimization/97092] New: [10/11 Regression] aarch64, SVE: ICE in ira-color.c since r10-4752-g2d56600c

2020-09-17 Thread acoplan at gcc dot gnu.org
: normal Priority: P3 Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- For the following testcase: void g(void); long a; signed char b(int c, int d) { return c + d; } void e(void

[Bug tree-optimization/97104] New: [11 Regression] aarch64, SVE: ICE in vect_get_loop_mask since r11-3070-g783dc66f9cc

2020-09-18 Thread acoplan at gcc dot gnu.org
Severity: normal Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- For the following testcase: int a, b, c, d; short e; void f() { unsigned g; for (; d; d++) { g

[Bug tree-optimization/97104] [11 Regression] aarch64, SVE: ICE in vect_get_loop_mask since r11-3070-g783dc66f9cc

2020-09-18 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97104 Alex Coplan changed: What|Removed |Added Keywords||ice-on-valid-code Target|

[Bug tree-optimization/97135] New: [11 Regression] Wrong code at -Os since r11-408-g84935c98221

2020-09-21 Thread acoplan at gcc dot gnu.org
Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- For the following testcase: long c; long *d = &c; int a, e, f; int main(void) { for (; f <= 5; f++) { e = 0; f

[Bug target/97141] New: [10/11 Regression] aarch64, SVE: ICE in decompose, at rtl.h (during expand) since r10-4676-g9c437a108a

2020-09-21 Thread acoplan at gcc dot gnu.org
: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- For the following testcase: int a; short b, c; short d(short e, short f) { return e + f; } void

[Bug target/97144] New: [10/11 Regression] SVE: ICE (could not split insn) in final_scan_insn_1 since r10-2553-g0fdc30bcf56

2020-09-21 Thread acoplan at gcc dot gnu.org
Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- For the following testcase: int a, b = 5, c = 3; char d; char e[1]; int f[] = {0, 0, 1}; short g

[Bug target/97161] New: [8/9/10/11 Regression] aarch64: Wrong code at -O2/-O3 since r8-4308-g13494fcb3

2020-09-22 Thread acoplan at gcc dot gnu.org
: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- For the following C program: __attribute__ ((noinline)) void f(char *p, char x) { if (x != 1) __builtin_abort

[Bug target/97161] [8/9/10/11 Regression] aarch64: Wrong code at -O2/-O3 since r8-4308-g13494fcb3

2020-09-22 Thread acoplan at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97161 --- Comment #2 from Alex Coplan --- Ah, apologies for the noise - thanks for clarifying.

[Bug target/99381] New: SVE: ICE with ACLE intrinsics when missing -march=armv8.2-a+sve

2021-03-04 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- For the following C testcase: #include _Bool a; int main() { a = svaddv(svptrue_b8(), svdup_s8(0)); } we ICE while printing a

[Bug target/99381] SVE: ICE with ACLE intrinsics when missing -march=armv8.2-a+sve

2021-03-04 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99381 --- Comment #2 from Alex Coplan --- Fixed on trunk. Needs backporting to GCC 10.

[Bug target/99381] SVE: ICE with ACLE intrinsics when missing -march=armv8.2-a+sve

2021-03-04 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99381 Alex Coplan changed: What|Removed |Added Ever confirmed|0 |1 Last reconfirmed|

[Bug target/99216] ICE in aarch64_sve::function_expander::expand() with LTO

2021-03-04 Thread acoplan at gcc dot gnu.org via Gcc-bugs
gcc dot gnu.org |acoplan at gcc dot gnu.org --- Comment #3 from Alex Coplan --- I'll take a look

[Bug target/99216] ICE in aarch64_sve::function_expander::expand() with LTO

2021-03-05 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99216 --- Comment #4 from Alex Coplan --- Right, the problem appears to be to do with the way that overloaded functions are implemented for the ACLE. Specifically the m_direct_overloads flag in aarch64_sve::function_builder. If this flag is set, we reg

[Bug target/99216] ICE in aarch64_sve::function_expander::expand() with LTO

2021-03-05 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99216 --- Comment #6 from Alex Coplan --- Ok, I'll have a go, thanks.

[Bug rtl-optimization/99469] New: ICE: qsort checking failed with selective scheduling on aarch64

2021-03-08 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ cat test.c typedef struct { int a[3]; } s; s ss[1][5][8]; int g(); void h(s); int foo(char

[Bug rtl-optimization/99469] ICE: qsort checking failed with selective scheduling on aarch64

2021-03-08 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99469 --- Comment #1 from Alex Coplan --- FWIW this is easy to reproduce with either csmith or yarpgen, so should be straightforward to procure a new testcase if the above goes latent.

[Bug tree-optimization/97104] [11 Regression] aarch64, SVE: ICE in vect_get_loop_mask since r11-3070-g783dc66f9cc

2021-03-09 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97104 --- Comment #5 from Alex Coplan --- I have a bisect in progress.

[Bug tree-optimization/97104] [11 Regression] aarch64, SVE: ICE in vect_get_loop_mask since r11-3070-g783dc66f9cc

2021-03-09 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97104 Alex Coplan changed: What|Removed |Added Resolution|--- |FIXED Status|NEW

[Bug tree-optimization/99523] New: Declarations for variable names missing in GIMPLE dump

2021-03-10 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- For the following testcase: int f(__builtin_va_list *ap) { return __builtin_va_arg(*ap, int); } on AArch64 at -O2 with -fdump-tree-optimized=-, we get

[Bug tree-optimization/99523] Declarations for variable names missing in GIMPLE dump

2021-03-11 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99523 --- Comment #5 from Alex Coplan --- Thanks for the fix!

[Bug target/99381] SVE: ICE with ACLE intrinsics when missing -march=armv8.2-a+sve

2021-03-11 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99381 Alex Coplan changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug rtl-optimization/99554] New: SVE: ICE (segfault) in recog.c:extract_asm_operands during expand

2021-03-11 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ cat test.cc int a[21][256]; void b() { for (long c; c; ++c) for (long d = 0; d < 16;

[Bug rtl-optimization/99554] [10/11 Regression] SVE: ICE (segfault) in recog.c:extract_asm_operands during expand

2021-03-11 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99554 Alex Coplan changed: What|Removed |Added Summary|SVE: ICE (segfault) in |[10/11 Regression] SVE: ICE

[Bug rtl-optimization/99554] [10/11 Regression] SVE: ICE (segfault) in recog.c:extract_asm_operands during expand

2021-03-11 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99554 Alex Coplan changed: What|Removed |Added Known to fail||10.2.1 Known to work|

[Bug target/99540] [10/11 Regression] ICE: Segmentation fault in aarch64_add_offset

2021-03-11 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99540 Alex Coplan changed: What|Removed |Added CC||acoplan at gcc dot gnu.org --- Comment #2

[Bug target/99560] New: aarch64: ICE (segfault) in LRA with SVE intrinsics

2021-03-12 Thread acoplan at gcc dot gnu.org via Gcc-bugs
: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- For the following testcase on AArch64: #include int foo(int x, int y); void bar(int f, int g, int h, int i, int *j, int k[3][8][7]) { while (1) { int p = i ? foo

[Bug target/99560] aarch64: ICE (segfault) in LRA with SVE intrinsics

2021-03-12 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99560 Alex Coplan changed: What|Removed |Added Target Milestone|--- |10.3 Keywords|

[Bug target/97252] [10/11 Regression] arm: ICE compiling pure-code/pr94538-2.c with MVE since r10-7293-g3eff57aa

2021-03-15 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97252 Alex Coplan changed: What|Removed |Added Last reconfirmed||2021-03-15 Known to fail|

[Bug target/99596] [11 Regression] arm: internal error in single_pred_edge

2021-03-15 Thread acoplan at gcc dot gnu.org via Gcc-bugs
||arm CC||acoplan at gcc dot gnu.org, ||rsandifo at gcc dot gnu.org Keywords||ice-on-valid-code Status|UNCONFIRMED |NEW Ever

[Bug target/97252] [10/11 Regression] arm: ICE compiling pure-code/pr94538-2.c with MVE since r10-7293-g3eff57aa

2021-03-16 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97252 --- Comment #2 from Alex Coplan --- > Unless I'm missing something, I don't think "Uxi" is a valid constraint. > Perhaps the "Ux" constraint was intended instead? D'oh, this is of course the union of the Ux (MVE-specific) constraint and the "i"

[Bug target/97252] [10/11 Regression] arm: ICE compiling pure-code/pr94538-2.c with MVE since r10-7293-g3eff57aa

2021-03-16 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97252 --- Comment #3 from Alex Coplan --- FWIW, for the related testcase (which we also ICE on): typedef int __attribute((vector_size(16))) V; V v; void f() { v = (V){4095}; } clang pushes the constant out to the constant pool: $ clang -target arm i

[Bug target/97252] [10/11 Regression] arm: ICE compiling pure-code/pr94538-2.c with MVE since r10-7293-g3eff57aa

2021-03-17 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97252 Alex Coplan changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |acoplan at gcc dot gnu.org

[Bug target/99647] New: arm: GCC generates invalid MVE vmov instruction

2021-03-18 Thread acoplan at gcc dot gnu.org via Gcc-bugs
: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- We generate invalid assembly for the following testcase: $ cat test.c typedef int __attribute((vector_size(16))) V; V f(void) { return (V){ (int)f, (int)f, (int)f, (int

[Bug target/99647] arm: GCC generates invalid MVE vmov instruction

2021-03-18 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99647 --- Comment #1 from Alex Coplan --- Also fails for GCC 10. Not sure if this counts as a regression since MVE only went in with GCC 10.

[Bug rtl-optimization/99554] [10/11 Regression] SVE: ICE (segfault) in recog.c:extract_asm_operands during expand

2021-03-19 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99554 Alex Coplan changed: What|Removed |Added Resolution|--- |DUPLICATE Status|NEW

[Bug target/99540] [10/11 Regression] ICE: Segmentation fault in aarch64_add_offset

2021-03-19 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99540 --- Comment #3 from Alex Coplan --- *** Bug 99554 has been marked as a duplicate of this bug. ***

[Bug target/97252] [10 Regression] arm: ICE compiling pure-code/pr94538-2.c with MVE since r10-7293-g3eff57aa

2021-03-22 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97252 Alex Coplan changed: What|Removed |Added Summary|[10/11 Regression] arm: ICE |[10 Regression] arm: ICE

[Bug target/99723] New: arm: ICE in build_function_type during selftests

2021-03-23 Thread acoplan at gcc dot gnu.org via Gcc-bugs
: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- If I configure a cross arm GCC with: --enable-languages=c,c++ --disable-bootstrap --target=arm-linux-gnueabihf --with-arch=armv8-a --with-float=hard and run `make all

[Bug target/99723] arm: ICE in build_function_type during selftests

2021-03-23 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99723 Alex Coplan changed: What|Removed |Added Target|aarch64 |arm --- Comment #1 from Alex Coplan --- @

[Bug target/99725] New: arm: ICE in dwarf2out_frame_debug_adjust_cfa with -mcmse

2021-03-23 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ cat test.c typedef int __attribute__((cmse_nonsecure_call)) (*t)(); t f; void g() { f(); } $ arm-eabi-gcc -c test.c

[Bug target/99727] New: [11 Regression] MVE: ICE (segfault) in arm_print_operand at -O3

2021-03-23 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ cat test.c char a[7][25][15][14]; void b() { for (int c;; ++c) for (int d = 0; d < 25; ++d) for (

[Bug target/99727] [11 Regression] MVE: ICE (segfault) in arm_print_operand at -O3

2021-03-23 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99727 Alex Coplan changed: What|Removed |Added Known to fail||11.0 Known to work|

[Bug target/99727] [11 Regression] MVE: ICE (segfault) in arm_print_operand at -O3 since r11-6616-g25bef689

2021-03-23 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99727 Alex Coplan changed: What|Removed |Added CC||clyon at gcc dot gnu.org Summar

[Bug target/99748] New: MVE: Wrong code at -O0 with float to integer conversion

2021-03-24 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- GCC miscompiles the following testcase: int main() { float a = 1.0f; return (int)a != 1; } with -march=armv8.1-m.main+mve -mfloat-abi=hard

[Bug target/99748] MVE: Wrong code at -O0 with float to integer conversion

2021-03-24 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99748 --- Comment #1 from Alex Coplan --- I should have mentioned, I found this because a number of the execution tests are failing when testing with --with-arch=armv8.1-m.main+mve --with-float=hard.

[Bug target/99748] MVE: Wrong code at -O0 with float to integer conversion

2021-03-24 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99748 --- Comment #2 from Alex Coplan --- GCC 10 also has the issue, so not a regression.

[Bug target/99727] [11 Regression] MVE: ICE (segfault) in arm_print_operand at -O3 since r11-6616-g25bef689

2021-03-24 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99727 --- Comment #5 from Alex Coplan --- Thanks for the quick fix :)

[Bug target/99766] [11 Regression] ICE: unable to generate reloads with SVE code

2021-03-25 Thread acoplan at gcc dot gnu.org via Gcc-bugs
|1 Status|UNCONFIRMED |NEW CC||acoplan at gcc dot gnu.org --- Comment #1 from Alex Coplan --- Confirmed. Here is a testcase without the includes: typedef float a __attribute__((__mode__(HF))); typedef

[Bug target/99766] [11 Regression] ICE: unable to generate reloads with SVE code

2021-03-25 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99766 --- Comment #2 from Alex Coplan --- The above ICEs with just -O3 -march=armv8.2-a+sve.

[Bug target/99766] [11 Regression] ICE: unable to generate reloads with SVE code since r11-7807-gbe70bb5e

2021-03-25 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99766 Alex Coplan changed: What|Removed |Added Summary|[11 Regression] ICE: unable |[11 Regression] ICE: unable

[Bug c/99768] New: [11 Regression] Bogus -Wuninitialized diagnostic with type punning

2021-03-25 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: c Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- For the following code (which has a strict aliasing violation): float foo(unsigned v) { unsigned tmp = v; float *f = (float

[Bug target/99758] ICE in setup_preferred_alternate_classes_for_new_pseudos, at ira.c:2772

2021-03-25 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99758 Alex Coplan changed: What|Removed |Added CC||acoplan at gcc dot gnu.org

[Bug target/96582] aarch64:ICE during GIMPLE pass: veclower

2021-03-25 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96582 Alex Coplan changed: What|Removed |Added CC||acoplan at gcc dot gnu.org --- Comment #5

[Bug target/99773] ARM v8.1-m MVE interaction with -mfloat-abi not clear

2021-03-25 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99773 Alex Coplan changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/99766] [11 Regression] ICE: unable to generate reloads with SVE code since r11-7807-gbe70bb5e

2021-03-26 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99766 --- Comment #7 from Alex Coplan --- Here is a testcase with SVE intrinsics that ICEs in the same way at -Os: $ cat test.cc #include char a; void c(unsigned &, const unsigned &); void d(char, bool, short, int, int, char e, int, short f, unsigned

[Bug target/99792] New: MVE: Assemble failure with "branch out of range" at -O3

2021-03-26 Thread acoplan at gcc dot gnu.org via Gcc-bugs
ty: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ cat test.c short a[2][19][6][844]; char b[2][19][40]; long long c[2][722]; void d() { for (int e; e < 2;

[Bug target/99813] New: SVE: Invalid assembly at -O3 (multiplier out of range in incb instruction)

2021-03-29 Thread acoplan at gcc dot gnu.org via Gcc-bugs
: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ cat test.cc long a, b; bool c[2][14][2][16], f[2][14][2][16]; bool d; char e[2][4][2][6]; void g

[Bug target/99216] ICE in aarch64_sve::function_expander::expand() with LTO

2021-03-29 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99216 --- Comment #8 from Alex Coplan --- Fixed on trunk. Needs backporting to GCC 10 together with bump to lto-streamer.h:LTO_minor_version.

[Bug target/97252] arm: ICE compiling pure-code/pr94538-2.c with MVE since r10-7293-g3eff57aa

2021-03-29 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97252 Alex Coplan changed: What|Removed |Added Resolution|--- |FIXED Summary|[10 Regression] a

[Bug target/99820] New: aarch64: ICE (segfault) in aarch64_analyze_loop_vinfo with -moverride=tune=use_new_vector_costs

2021-03-29 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ cat test.c extern short a[]; void f() { for (int i = 0; i < 100; i++)

[Bug target/99820] aarch64: ICE (segfault) in aarch64_analyze_loop_vinfo with -moverride=tune=use_new_vector_costs

2021-03-29 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99820 Alex Coplan changed: What|Removed |Added Known to fail||11.0 Target Milestone|---

[Bug target/99829] New: MVE: ICE in lra_assign at -O3

2021-03-30 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ arm-eabi-gcc -c -xc++ gcc/testsuite/c-c++-common/torture/vshuf-v16qi.c -march=armv8.1-m.main+mve -mfloat-abi=hard -mtune=cortex-m7 -O3 during RTL pass: reload In file

[Bug rtl-optimization/99830] [11 Regression] ICE: in lra_eliminate_regs_1, at lra-eliminations.c:659 with -O2 -fno-expensive-optimizations -fno-split-wide-types -g

2021-03-30 Thread acoplan at gcc dot gnu.org via Gcc-bugs
||acoplan at gcc dot gnu.org Status|UNCONFIRMED |NEW Ever confirmed|0 |1 --- Comment #1 from Alex Coplan --- Confirmed. Started with r11-5185-gd0d8b5d83614d8f0d0e40c0520d4f40ffa01f8d9 so must be latent. I'll see if

[Bug target/97701] [10 Regression] aarch64: ICE in extract_constrain_insn since r10-4447-g095f78c6

2021-03-31 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97701 --- Comment #15 from Alex Coplan --- So fixed everywhere?

[Bug rtl-optimization/98601] [8/9/10/11 Regression] aarch64: ICE in rtx_addr_can_trap_p_1, at rtlanal.c:467

2021-03-31 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98601 Alex Coplan changed: What|Removed |Added Summary|aarch64: ICE in |[8/9/10/11 Regression] |

[Bug rtl-optimization/98601] [8/9/10/11 Regression] aarch64: ICE in rtx_addr_can_trap_p_1, at rtlanal.c:467

2021-03-31 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98601 Alex Coplan changed: What|Removed |Added Target Milestone|--- |11.0

[Bug rtl-optimization/98601] [8/9/10/11 Regression] aarch64: ICE in rtx_addr_can_trap_p_1, at rtlanal.c:467

2021-03-31 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98601 Alex Coplan changed: What|Removed |Added Status|UNCONFIRMED |NEW Ever confirmed|0

[Bug target/99792] MVE: Assemble failure with "branch out of range" at -O3

2021-03-31 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99792 --- Comment #2 from Alex Coplan --- Ok, I'd guess it just exposes a latent backend / rtl-optimization issue then

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