[Bug target/34903] -Os code size regression

2008-01-22 Thread dje at gcc dot gnu dot org
--- Comment #9 from dje at gcc dot gnu dot org 2008-01-22 15:59 --- GCC does not use the load and store multiple instructions because the source file declares r29 a global variable: register volatile gd_t *gd asm ("r29"); The bug fix mentioned above inhibits GCC from using lmw/stmw if

[Bug target/34903] -Os code size regression

2008-01-22 Thread sposelenov at emcraft dot com
--- Comment #8 from sposelenov at emcraft dot com 2008-01-22 10:55 --- (In reply to comment #7) > First, please stop changing the categorization of this bug. > Sorry. > The patch which changed this behavior is > > http://gcc.gnu.org/ml/gcc-patches/2005-06/msg00276.html > Thanks. >

[Bug target/34903] -Os code size regression

2008-01-21 Thread dje at gcc dot gnu dot org
--- Comment #7 from dje at gcc dot gnu dot org 2008-01-21 16:37 --- First, please stop changing the categorization of this bug. The patch which changed this behavior is http://gcc.gnu.org/ml/gcc-patches/2005-06/msg00276.html -- dje at gcc dot gnu dot org changed: What

[Bug target/34903] -Os code size regression

2008-01-21 Thread dje at gcc dot gnu dot org
--- Comment #5 from dje at gcc dot gnu dot org 2008-01-21 15:54 --- The "regression" is due to a wrong-code bug fix. To reduce the code size, the prologue and epilogue need to emit lwm/stwm for two ranges of registers, which does not correspond to a standard PowerPC ABI. -- dje at g