https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101076
--- Comment #4 from Coco Wang ---
(In reply to Andrew Pinski from comment #3)
> This sounds like a rsicv backend issue really ...
I think the key is the subreg, the reason why x86_64 and aarch64 have no
problems is that subreg does not appear i
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101076
--- Comment #2 from Coco Wang ---
(In reply to Andrew Pinski from comment #1)
> What target is this for?
> For both x86_64 and aarch64 we have both shifts in SI mode so we don't end
> up with problem.
> We get the following RTL for aarch64 (befo
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101076
Bug ID: 101076
Summary: RTL Combine pass won't generate sign_extnd RTX in some
senario
Product: gcc
Version: 12.0
Status: UNCONFIRMED
Severity: normal
