[Bug rtl-optimization/101076] RTL Combine pass won't generate sign_extnd RTX in some senario

[wf831130 at sina dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101076

--- Comment #4 from Coco Wang <wf831130 at sina dot com> ---
(In reply to Andrew Pinski from comment #3)
> This sounds like a rsicv backend issue really ...

I think the key is the subreg, the reason why x86_64 and aarch64 have no
problems is that subreg does not appear in RTL.

The code of this part is not right
if (!OBJECT_P (lhs)
          && ! (GET_CODE (lhs) == SUBREG
                && (OBJECT_P (SUBREG_REG (lhs))))
          && CONST_INT_P (rhs)
          && INTVAL (rhs) >= 0
          && INTVAL (rhs) < HOST_BITS_PER_WIDE_INT
          && INTVAL (rhs) < mode_width
          && (new_rtx = extract_left_shift (mode, lhs, INTVAL (rhs))) != 0)
        new_rtx = make_extraction (mode, make_compound_operation (new_rtx,
                                                                  next_code),
                                   0, NULL_RTX, mode_width - INTVAL (rhs),
                                   code == LSHIFTRT, 0, in_code == COMPARE);