This is the beta release of binutils 2.15.94.0.2.2 for Linux, which is
based on binutils 2004 1220 in CVS on sources.redhat.com plus various
changes. It is purely for Linux.
Please report any bugs related to binutils 2.15.94.0.2.2 to [EMAIL PROTECTED]
and
http://www.sourceware.org/bugzilla/
If
Mainline has
const char version_string[] = "4.0.0 20050225 (experimental)";
Shouldn't it be 5.0 or 4.1?
H.J.
Mikael,
I haven't really tried m68k and I can't say I know anything about it but
it will only be affected by this issue I am seeing if it generates
instructions of the form:
(set (reg:BI ...)
(:BI (reg:SI ...) (const_int ...)))
If you have something like this then as soon as you expand t
On 08/05/13 14:54, Andreas Schwab wrote:
I'm getting "1 != ((2 >= 2 ? -1 : 0)" with 4.7.3.
Andreas.
As I expected. That doesn't sound good but I am unsure on what to do
about it. I will investigate the case further tomorrow.
I expect m68k to also fail the vector-compare-1.c gcc test, is t
On 08/05/13 21:29, Andreas Schwab wrote:
"Paulo J. Matos" writes:
As I expected. That doesn't sound good
In which way is it not good?
Andreas.
Shouldn't we expect ires to be -1 (STORE_FLAG_VALUE) and therefore the
condition of the if be false if everything is
On 08/05/13 23:10, Andreas Schwab wrote:
"Paulo J. Matos" writes:
Shouldn't we expect ires to be -1 (STORE_FLAG_VALUE)
??? Boolean expressions in C evaluate to 0/1.
Andreas.
Agreed, I worked till too late yesterday, I am sorry.
Further to this matter, can you explai
On 27/06/2013 16:02, Mikael Pettersson wrote:
Paulo Matos writes:
That explains why GCC removes the condition but the main issue of the memset
recursion still stands.
Known problem. See GCC PR56888.
Thanks for the reference Mikael, that's exactly it.
--
Paulo Matos
Jakub et al,
Steffen has developed a nice fix [1] for GOMP_CPU_AFFINITY failing with
>1024 cores.
What steps are needed to get this into GCC 4.8.2?
Thanks,
Daniel
[1] http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57298
--
Daniel J Blueman
Principal Software Engineer, Numascale
On 10/10/13 20:52, David Malcolm wrote:
I've added detailed information on the project to the wiki as:
http://gcc.gnu.org/wiki/JIT
and added a link to that page to the front page's "Current Projects"
section.
For reasons unknown to me, check-parallel-jit has to be issues inside
build/jit/
On 17/01/14 17:36, Eric Botcazou wrote:
I am not implying that this is a GCC bug, unless you think
WORD_REGISTER_OPERATIONS should have avoided the creation of such
paradoxical subreg.
No, that's precisely the contrary, WORD_REGISTER_OPERATIONS tends to create
paradoxical subregs.
I might th
Hello,
Do we care if trunk doesn't compile successfully with
--enable-werror-always?
Do we want to fix things like:
../../../../gcc-trunk/fixincludes/server.c: In function ‘server_setup’:
../../../../gcc-trunk/fixincludes/server.c:195:10: error: ignoring
return value of ‘getcwd’, declared wit
On 18/01/14 20:11, pins...@gmail.com wrote:
On Jan 18, 2014, at 12:04 PM, "Paulo J. Matos" wrote:
On 17/01/14 17:36, Eric Botcazou wrote:
I am not implying that this is a GCC bug, unless you think
WORD_REISTER_OPERATIONS should have avoided the creation of such
paradoxical su
On 06/03/14 15:15, Vladimir Makarov wrote:
On 03/06/2014 08:55 AM, Paulo Matos wrote:
Hi,
Upon noticing ira-hoist-pressure in `gcc --help=optimizers` and not
ira-loop-pressure,
I am wondering why the latter is not marked as an Optimization in common.opt:
fira-loop-pressure
Common Report Var(f
On 06/03/14 21:03, Vladimir Makarov wrote:
On 03/06/2014 03:14 PM, Paulo J. Matos wrote:
Still, would you accept a patch to mark this flag as an optimization?
I think we should.
Submitted to gcc-patches for approval.
--
PMatos
I request that Bug 53001 (
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53001) be mentioned in the
http://gcc.gnu.org/gcc-4.9/changes.html
This change adds a flag -Wfloat-conversion to C-family gcc.
Possible text for the changes page:
The -Wfloat-conversion option has been added for the C and C++
Hi,
I just noticed something strange with my iorqi3 rule.
I have the following:
(define_insn "iorqi3"
[(set (match_operand:QI 0 "register_operand" "=c")
(ior:QI (match_operand:QI 1 "register_operand" "%0")
(match_operand:QI 2 "general_operand" "cwmi")))
(clobber (reg
On Fri, 10 Feb 2012 16:57:48 +, Paulo J. Matos wrote:
> However, duplicating the instructions and inverting operand order seems
> to defeat the purpose of '%'. So, what's the catch? Or is it a genuine
> bug?
I just understood my miss understanding above. '%&#
On Fri, 10 Feb 2012 11:00:43 -0800, Richard Henderson wrote:
> On 02/10/2012 08:57 AM, Paulo J. Matos wrote:
>> However, there's a failure to combine looking like: (parallel [
>> (set (reg:QI 1 AL)
>> (ior:QI (mem/c/i:QI (re
gt; void test_func(int n)
> {
> int i;
> static int j;
> static int pos, direction, direction_pre;
>
> pos = 0;
> direction = 1;
>
> for ( i = 0; i < n; i++ )
> {
> direction_
On Tue, 2012-02-28 at 11:21 +0100, Richard Guenther wrote:
> On Tue, Feb 28, 2012 at 9:33 AM, Jiangning Liu wrote:
> >
> >
> >> -Original Message-
> >> From: Jiangning Liu
> >> Sent: Tuesday, February 28, 2012 4:07 PM
> >> To: Jiangning
On Tue, 2012-02-28 at 11:03 -0600, William J. Schmidt wrote:
> I think this is probably a problem with how cprop_into_successor_phis
> works. It only propagates into immediate successors of a block. In
> this case copies are propagated from bb12 into phis in bb13 and bb14 (of
> whi
On Tue, 2012-02-28 at 11:52 -0600, William J. Schmidt wrote:
> On Tue, 2012-02-28 at 11:03 -0600, William J. Schmidt wrote:
>
> > I think this is probably a problem with how cprop_into_successor_phis
> > works. It only propagates into immediate successors of a block. In
&g
Hi,
I have builtin __function_size(foobar) that is applied to functions.
This should be folded to a symbol foobar@size.
The problem comes when I mark in the fold_builtin function in my backend
that DECL_PRESERVE(foobar) = 1;
The reason I need to do this is so that foobar is not removed if we
h
On Mon, 19 Mar 2012 22:49:39 -0700, Ian Lance Taylor wrote:
>
> I'm not sure what you are folding the builtin to, but perhaps you could
> retain a reference to the function.
>
I am folding the function call __function_size(foobar) to a new symbol
foobar@size. The reference to function foobar d
On 20/03/12 10:30, Jakub Jelinek wrote:
>
Like any other builtin expander? There are many dozens of examples in
builtins.c. It is called with the tree argument, so you verify it, complain
if the argument is not the one you are expecting, and just expand it as the
symbol instead of expanding the
I notice that on ftp://ftp.gnu.org/pub/pub/gnu/gcc/gcc-4.7.0/
there's no gcc-core tarball. Is this still going to show up or will it
not be released anymore?
On 22/03/12 09:49, Richard Guenther wrote:
Status
==
The GCC 4.7.0 release will be announced soon. The branch is open for
regres
I notice that on ftp://ftp.gnu.org/pub/pub/gnu/gcc/gcc-4.7.0/
there's no gcc-core tarball. Is this still going to show up or will it
not be released anymore?
On 22/03/12 09:49, Richard Guenther wrote:
Status
==
The GCC 4.7.0 release will be announced soon. The branch is open for
regres
On 22/03/12 13:58, Jakub Jelinek wrote:
On Thu, Mar 22, 2012 at 01:36:58PM +, Paulo J. Matos wrote:
I notice that on ftp://ftp.gnu.org/pub/pub/gnu/gcc/gcc-4.7.0/
there's no gcc-core tarball. Is this still going to show up or will
it not be released anymore?
They won't be provid
Hello,
I am trying to find exactly what happened to IRA_COVER_CLASSES in gcc47.
From what I have seen it seems that it was simply removed. Does the
register allocator now automatically computes the cover classes?
Cheers,
--
PMatos
Vladimir,
Thanks for for the explanation.
Cheers,
Paulo Matos
On 23/03/12 16:08, Vladimir Makarov wrote:
On 03/23/2012 11:04 AM, Paulo J. Matos wrote:
Hello,
I am trying to find exactly what happened to IRA_COVER_CLASSES in
gcc47. From what I have seen it seems that it was simply removed
Hello,
I am porting my backend to GCC47 and during libgcc configuration I get:
configure:4511: checking whether to use setjmp/longjmp exceptions
configure:: /home/pm18/p4ws/pm18_binutils/bc/main/result/linux/
intermediate/FirmwareGcc47Package/./gcc/xgcc -B/home/pm18/p4ws/
pm18_binutils/bc/main/res
Hi,
I am porting my backend to GCC47 and have been jumping through some
hurdles. libgcc is trying to compile unwind*.c files which I can't
remember being there for GCC46. I deduce this files have to do with
exception support GCC47 seems to want to make exceptions mandatory even
though my backe
On Mon, 26 Mar 2012 11:10:11 -0700, Ian Lance Taylor wrote:
>
>> *** Configuration xap-local-xap not supported
>
> You will have to find out where that last error message is coming from.
> It's not happening because of errors in configure tests. It's most
> likely coming from libgcc/config.host
On 30/03/12 05:11, Ian Lance Taylor wrote:
"Paulo J. Matos" writes:
I am porting my backend to GCC47 and have been jumping through some
hurdles. libgcc is trying to compile unwind*.c files which I can't
remember being there for GCC46.
They were there. In 4.6 they
On 03/04/12 15:04, Ian Lance Taylor wrote:
> "Paulo J. Matos" writes:
>
>
> Hmmm, you're right, I didn't notice those. You said that on your system
> QImode is 16 bits. These modes are being used to efficiently load
> 16-bit, 32-bit, and 64-bit values, in
Hi,
I am facing a problem with the GCC47 register allocation and my
movmemqi. GCC46 dealt very well with the problem but GCC47 keeps
throwing at me register spill failures.
My backend has very few registers. 3 chip registers in total (class
CHIP_REGS), one of them (XL) is used for memory ref
On 27/04/12 09:21, Richard Guenther wrote:
This differs from what GCC47 does and seems to work better.
I would like help on how to best handle this situation under GCC47.
Not provide movmem which looks like open-coded and not in any way
"optimized"?
Thanks Richard, however I don't understan
On 27/04/12 11:49, Richard Guenther wrote:
It feels to me that GCC46 version is better:
* no branch to subroutine memcpy;
* less stack usage (argument to enterl);
So, using our block copy (bc2) instruction is an optimisation, don't you
think?
Yes, it inlines it. You may want to look at s390 w
On 27/04/12 11:49, Richard Guenther wrote:
Yes, it inlines it. You may want to look at s390 which I believe has
a similar block-copy operation.
Richard.
I looked at s390 and even though the block copy instruction seems
similar ours is much more restrictive since it expects values in
speci
Peter,
We have a working backend for an Harvard Architecture chip where
function pointer and data pointers have necessarily different sizes. We
couldn't do this without changing GCC itself in strategic places and
adding some extra support in our backend. We haven't used address spaces
or any
On 30/04/12 13:01, Peter Bigot wrote:
I would like to see the technical details, if your code is released somewhere.
Hi Peter,
Sorry for the delay.
The code is not released, however I can send you a patch against GCC
4.6.3 sources (our GCC 4.7.0 port is not yet stable) of our changes and
wi
Hi,
I was just trying to understand exactly what constraint modifiers + and
= mean. I have read the manual but I am uncertain about their meaning in
the context of the following rule (without any modifiers):
Expand generates:
(define_insn_and_split "movmem_long"
[(set (match_operand:QI 2 "
On 04/05/12 14:44, Ian Lance Taylor wrote:
I agree that there is something wrong here. I agree that as written
the constraints for operands 0, 1, and 2 should have a '+'.
That said, a '+' constraint is most useful for a pattern that expands
into multiple instructions. I think this would be bet
On 04/05/12 19:48, Ian Lance Taylor wrote:
The i386 rep_movqi insn is an example:
(define_insn "*rep_movqi"
[(set (match_operand:P 2 "register_operand" "=c") (const_int 0))
(set (match_operand:P 0 "register_operand" "=D")
(plus:P (match_operand:P 3 "register_operand" "0")
On 08/05/12 21:57, Jan Hubicka wrote:
In expanded form it is
(set (reg5) (const 10))
(parallel [(set (reg2) (const 0))
(set (reg0) (plus (reg3) (reg5)))
(set (reg1) (plus (reg4) (reg5)))
(set (mem (reg3)) (mem (reg4)))])
(set (reg0) (plus (reg0) (cons
On 09/05/12 11:53, paul_kon...@dell.com wrote:
He was showing the RTL expansion of the example he gave:
Ah, right. I interpreted it as if it was what the movmem expanded to.
--
PMatos
Hi,
While debugging an issue related to my movmem rule, I noticed that
fwprop seems to be doing some really strange.
The problem occurs when setting the argument to the block copy
instruction. The full C code is:
int **
t25 (int *d, int **s)
{
memcpy (d, *s, 16);
return s;
}
Before fwpr
Forget about this question. Doesn't make sense at all.
I wonder if the thing I drank during lunch was really water...
On 09/05/12 14:40, Paulo J. Matos wrote:
Hi,
While debugging an issue related to my movmem rule, I noticed that
fwprop seems to be doing some really strange.
The pr
Greetings,
I've been debugging a Fedora 17 build problem on ppc64-redhat-linux, and
ran into an issue with bitsizetype. I have a patch that fixes the
problem, but I'm not yet convinced it's the right fix. I'm hoping
someone here can help me sort it out.
The problem occurs when compiling some Ja
On Wed, 2012-05-09 at 13:47 -0700, Andrew Pinski wrote:
> On Wed, May 9, 2012 at 1:36 PM, William J. Schmidt
> wrote:
> > Greetings,
> >
> > I've been debugging a Fedora 17 build problem on ppc64-redhat-linux, and
> > ran into an issue with bitsizetype. I have
I'm investigating another build failure for Fedora 17 (based on 4.7).
The failing compile from the build log is as follows:
/bin/sh ./libtool --tag=CC
--mode=compile
/builddir/build/BUILD/gcc-4.7.0-20120504/obj-ppc64-redhat-linux/./gcc/xgcc
-B/builddir/build/BUILD/gcc-4.7.0-20120504/obj-ppc64-r
Hi,
MULTILIB_OPTIONS containing options defined in DRIVER_SELF_SPEC seemed
to be fine in GCC46 but fail in GCC47.
For example, I have:
xap.h:
#define DRIVER_SELF_SPECS \
"%{help:-v} %"%{mno-args-span-regs-and-mem:-mno-split-args}
%"%{mno-inline-block-copy-mod
Hi Alberto,
As far as I understand it you want to know if a statement was expanded
from a preprocessor macro, right?
This isn't possible. The preprocessor is a separate thing altogether and
I doubt any preprocessing information remains for the compiler proper to
deal with.
Cheers,
Paulo M
,
Manuel.
On 14 May 2012 10:49, Paulo J. Matos wrote:
Hi Alberto,
As far as I understand it you want to know if a statement was expanded from
a preprocessor macro, right?
This isn't possible. The preprocessor is a separate thing altogether and I
doubt any preprocessing information remain
Hi,
I am looking at a missed optimization and I think this is something that
could be added to compare-elim, if it's not already done somewhere else.
I have a double word comparison to zero, so in C it's:
int le(long a) { return a <= 0; }
My expand uses the following transformation (in my cur
On Thu, 17 May 2012 09:08:26 -0700, Richard Henderson wrote:
> My question is, why are you generating compares in two different modes
> early, before compare-elim runs? If you hadn't done that, your
> redundant compare would already be eliminated.
>
Good question. I tried to follow the example s
On 17/05/12 17:08, Richard Henderson wrote:
My question is, why are you generating compares in two different
modes early, before compare-elim runs? If you hadn't done that,
your redundant compare would already be eliminated.
I just looked at the rx code and it seems to be doing something sim
On 21/05/12 15:21, Christian Bruel wrote:
Options not explicitly described in the compiler before their use in a
spec rules are now rejected. So you probably need to describe it into
your target optimization file, (something like xap.opt).
OK, thanks for letting me know about this.
Cheers,
Hi,
I found a problem with my port where IRA generates a spill error. After
looking at the logs I get this kind of output for the best class for the
pseudo regs:
Pass 0 for finding pseudo/allocno costs
a2 (r30,l0) best NO_REGS, allocno NO_REGS
a3 (r29,l0) best NO_REGS, allocno NO_REG
I forgot to mention this is in 4.7.0.
4.6.3 happily assigns the right classes to the registers. I wonder if
there's any new macro in 4.7 that I haven't defined...
On 14/06/12 13:47, Paulo J. Matos wrote:
Hi,
I found a problem with my port where IRA generates a spill error. After
The output is still the same but the spill is fixed in 4.7.1.
On 14/06/12 13:47, Paulo J. Matos wrote:
Hi,
I found a problem with my port where IRA generates a spill error. After
looking at the logs I get this kind of output for the best class for the
pseudo regs:
Pass 0 for finding pseudo
Hello,
As far as I know 4.3 and 4.4 are no longer maintained and 4.3.6 and
4.4.7 were the last of their respective lines however if someone is kind
enough to look at the following, I would be extremely grateful. I found
a bug in 4.3.6 and 4.4.7 fixed in 4.5.0 but I am having a hard time
pinpo
On 12/07/12 12:19, Richard Guenther wrote:
Look into the tree dumps and look where the ={v} disappears. That
will point to the pass that breaks it and eventually help track down the
fixing patch.
Thanks for the tip Richard. Tracked it down to PHI prop pass in
tree-ssa-phiprop.c, not yet wha
On Sat, 2012-07-14 at 01:00 +0200, Steven Bosscher wrote:
> Andreas Enge wrote:
> >
> > powerpc-ibm-aix5.3.0.0, s390-linux-gnu,
>
> Perhaps Bill Schmidt can help here?
>
Unfortunately not, at least not directly. David Bernstein and Andreas
Krebbel, respectively, might be able to point you to t
Hi,
My target has 16bit chars.
What I am seeing is that in a memset call, the call is not inlined by
GCC whenever fill value is bigger than host char.
This seems to be due to the code (GCC 4.6.5) in target_char_cast
(builtins.c), called from expand_builtin_memset_args:
static int
target_cha
On 26/07/12 13:27, Richard Guenther wrote:
Why would the fill value in a memset call be required to fit in a host char?
Obviously because of the implementation detail of its caller.
Richard.
Richard, I am sorry if I was not more clear. I understand that this is
required because the caller
On 26/07/12 15:04, Joseph S. Myers wrote:
On Thu, 26 Jul 2012, Paulo J. Matos wrote:
My target has 16bit chars.
As I explained before, support for such targets is extremely limited and
bitrotten (this applies whether it is BITS_PER_UNIT, CHAR_TYPE_SIZE or
both that are not 8) and a large
Hello,
Could someone please send me the copyright assignment forms for single
contributions and for all future contributions?
Cheers,
--
PMatos
loyer disclaimer, if an employer or school
owns work created by the developer. "
Cheers,
Paulo
--
Patrick
On 08/02/2012 09:14 AM, Paulo J. Matos wrote:
Hello,
Could someone please send me the copyright assignment forms for single
contributions and for all future contribution
Hi,
Can someone please clarify some policies with GCC contribution. If I
have a patch with a GCC enhancement, do I need to obtain a bug report
for it and then submit the patch or I can submit a patch to the patch
mailing list without opening a bug report?
Cheers,
--
PMatos
On 09/08/12 17:54, Aaron Gray wrote:
Hi,
I have developed several patches for GCC and am wondering as a purely
open source non commercial developer whether there are any issues
regarding getting patches into GCC. Do I need to sign an agreement at
all ?
If you want the copyright assignment for
On 24/10/12 17:30, Joseph S. Myers wrote:
On Wed, 24 Oct 2012, Paulo Matos wrote:
Conversions of target macros to hooks are generally of interest.
I don't think we want a stream-of-consciousness sequence of messages about
successive aspects of the issue.
I apologize if my messages became a nu
On 22/12/12 10:13, Alexandre Oliva wrote:
On Dec 20, 2012, "Paulo Matos" wrote:
This doesn't look sensible to me (but I might be overlooking a reason why we
want to do so) in the context of cselib_record_sets, however, I think
cselib_record_sets should instead have the patch applied:
- for_e
bash-3.00$ gcc-4.2.2/config.guess
powerpc-ibm-aix5.2.0.0
bash-3.00$ /raid/tbogart/gcc422/bin/gcc -v
Using built-in specs.
Target: powerpc-ibm-aix5.2.0.0
Configured with: /raid/tbogart/src/gcc-4.2.2/configure --with-gmp=/usr/local --w
ith-mpfr=/usr/local --disable-nls --enable-languages=c,c++,fort
Greetings.
I attempted to build the 4.3-20080501 snapshot targeting
m68k--netbsdelf last night on my sparc:
[EMAIL PROTECTED]: uname -a
SunOS rox.fddx.com 5.10 Generic_120011-14 sun4u sparc SUNW,Ultra-60
I configured thusly:
CC=gcc64 ../gcc-4.3-20080501/configure \
--prefix=/nbsd/coldfir
This is the beta release of binutils 2.17.50.0.16 for Linux, which is
based on binutils 2007 0511 in CVS on sourceware.org plus various
changes. It is purely for Linux.
All relevant patches in patches have been applied to the source tree.
You can take a look at patches/README to see what have been
The testsuite result, including both 32bit and 64bit, of gcc 4.3
revision 124987 on Linux/x86-64:
http://gcc.gnu.org/ml/gcc-testresults/2007-05/msg01148.html
is the best in months. Thanks to everyone who makes it happen.
H.J.
On Fri, May 25, 2007 at 07:10:23AM -0700, Ian Lance Taylor wrote:
> I just noticed a problem with our use of GMP and MPFR. If you
> carefully install the appropriate versions of GMP and MPFR on one
> machine in the normal way, and build gcc on that machine,
> cc1/cc1plus/etc. wind up dynamically l
On Sun, May 27, 2007 at 06:52:30PM +0100, Rafael Espindola wrote:
> On 5/27/07, Razya Ladelsky <[EMAIL PROTECTED]> wrote:
> >Hi,
> >
> >Getting failure during bootstrap for libjava on powerpc linux:
> >
> >configure: error: `CXX' has changed since the previous run:
> >configure: former value: /h
The predictive commoning patch:
http://gcc.gnu.org/ml/gcc-patches/2007-05/msg01061.html
miscompiles 482.sphinx3 in SPEC CPU 2006 with -O2 -ffast-math on
Linux/x86-64. Zdenek, do you have any ideas?
BTW, we are working on a small testcase.
H.J.
On Fri, Jun 01, 2007 at 09:37:54AM -0700, H. J. Lu wrote:
> The predictive commoning patch:
>
> http://gcc.gnu.org/ml/gcc-patches/2007-05/msg01061.html
>
> miscompiles 482.sphinx3 in SPEC CPU 2006 with -O2 -ffast-math on
> Linux/x86-64. Zdenek, do you have any ideas?
>
On Fri, Jun 01, 2007 at 09:55:53AM -0700, Andrew Pinski wrote:
>
> Because the patch had other effects like adding a DCE after Copyprop
> in the loop optimizer section.
>
Disable DCE after Copyprop in the loop optimizer section fixes my
problem. Any idea why?
Thanks.
H.J.
On Fri, Jun 01, 2007 at 10:30:52PM +0200, Zdenek Dvorak wrote:
> Hello,
>
> > > Because the patch had other effects like adding a DCE after Copyprop
> > > in the loop optimizer section.
> > >
> >
> > Disable DCE after Copyprop in the loop optimizer section fixes my
> > problem. Any idea why?
>
When was decimal floating point added to gcc? I couldn't find it
in any gcc changes.html. Shouldn't it be mentioned somewhere?
H.J.
On Sat, Jun 02, 2007 at 08:17:40PM -0500, Peter Bergner wrote:
> On Sat, 2007-06-02 at 07:35 -0700, H. J. Lu wrote:
> > When was decimal floating point added to gcc? I couldn't find it
> > in any gcc changes.html. Shouldn't it be mentioned somewhere?
>
> I think the
This patch
http://gcc.gnu.org/ml/gcc-patches/2007-06/msg00151.html
breaks libjava. One problem is it modifies
libjava/classpath/m4/acinclude.m4
without ChangeLog entry. I believe this one
- if test "x${GCJ}" = x && test "x${JIKES}" = x && test
"x${user_specified_javac}" != xkjc && test "x${u
On Mon, Jun 04, 2007 at 01:23:16PM -0700, Janis Johnson wrote:
> On Sun, Jun 03, 2007 at 02:41:57PM +0200, Gerald Pfeifer wrote:
> > On Sun, 3 Jun 2007, Ben Elliston wrote:
> > >> Are they mentioned in any gcc changes.html?
> > > No, they're not. They probably should be.
> >
> > Do you think we c
On Thu, Jun 07, 2007 at 08:40:14AM +1000, Ben Elliston wrote:
> On Wed, 2007-06-06 at 16:46 +0200, Gerald Pfeifer wrote:
>
> > In that case it's probably not that good of a idea to promote it (unless
> > the maintainers are in favor, of course ;-).
>
> I'm happy to leave things as they are for no
On Thu, Jun 07, 2007 at 10:33:26PM -0700, Mark Mitchell wrote:
> I am aware of three remaining projects which are or might be appropriate
> for Stage 1:
>
> In the interests of moving forwards, I therefore plan to close this
> exceptionally long Stage 1 as of next Friday, June 15th. The projects
On Fri, Jun 08, 2007 at 06:07:14AM -0700, H. J. Lu wrote:
> On Thu, Jun 07, 2007 at 10:33:26PM -0700, Mark Mitchell wrote:
> > I am aware of three remaining projects which are or might be appropriate
> > for Stage 1:
> >
> > In the interests of moving forwards, I t
We are ready to submit a patch for Intel BID library. We have 3 small
patches and a 2.4MB bz2 tar file for Intel BID library itself. I can
1. Send a 2.4MB bz2 tar file to gcc-patches.
2. Create a bid branch in svn.
3. Put it on kernel.org.
Which one is preferred?
With Intel BID library, we got 2
On Thu, Jun 14, 2007 at 10:13:49AM -0700, Janis Johnson wrote:
> On Thu, 2007-06-14 at 06:30 -0700, H. J. Lu wrote:
>
> > With Intel BID library, we got 2 failures in unmodified DFP tests,
> > fe-convert-1.c and fe-convert-2.c, due to different exceptions
> > in Intel BID
On Fri, Jun 15, 2007 at 06:21:53PM -0700, Ian Lance Taylor wrote:
>
> This is hardly a new thought, but I believe that for the i386 gcc is
> handicapped by reload. No matter how smart we are before reload, it
> just take one poor decision by reload in an inner loop and we've lost
> all the gains.
On Fri, Jun 15, 2007 at 03:39:49PM -0700, Mark Mitchell wrote:
> in the relatively near future. I am also considering the Intel BID
> patches for 4.3, as those have arrived just under the wire. I would
> appreciate comments from relevant maintainers about those patches.
>
Who are those relevant
On Fri, Jun 15, 2007 at 07:17:22PM -0700, Andrew Pinski wrote:
> On 6/15/07, H. J. Lu <[EMAIL PROTECTED]> wrote:
> >
> >Why don't we turn on vectorizer at -O3 or even -O2, depending on
> >ISA? I added -ftree-vectorize to BOOT_CFLAGS on x86-64. According to
> >
On Fri, Jun 15, 2007 at 11:33:52PM -0400, Vladimir N. Makarov wrote:
> H. J. Lu wrote:
>
> >On Fri, Jun 15, 2007 at 06:21:53PM -0700, Ian Lance Taylor wrote:
> >
> >
> >>This is hardly a new thought, but I believe that for the i386 gcc is
> >>handicap
On Sat, Jun 16, 2007 at 05:22:25PM +0200, Uros Bizjak wrote:
> Hello!
>
> >BTW, an x86 DFP configure bug was reported 3 months ago. But it still
> >hasn't benen fixed. I opened a DFP bug report:
> >
> >http://gcc.gnu.org/bugzilla/show_bug.cgi?id=32351
> >
> >with a patch. I hope it will be fixed
On Sat, Jun 16, 2007 at 06:54:46PM +0300, Dorit Nuzman wrote:
> > There are quite a few known simple cases which vectorizer fails to
> > vectorize.
>
> by "known" you mean there are open missed-optimization PRs for them? (if
>
Yes, that is what I meant.
H.J.
On Sat, Jun 16, 2007 at 04:31:14PM -0700, Mark Mitchell wrote:
> H. J. Lu wrote:
>
> > Who are those relevant maintainers? Since Intel BID patches only
> > affects DFP intrinsics, which is only supported on Linux/PPC,
> > Linux/ia32 and Linux/x86-64 while Linux/PPC uses D
On Sun, Jun 17, 2007 at 09:06:36PM +, Joseph S. Myers wrote:
> On Sun, 17 Jun 2007, Uros Bizjak wrote:
>
> > I was trying to load a full 128 bit constant into __float128 variable, but
> > with "L" suffix, I was able to load only XFmode constant. Is there a special
> > suffix for __float128 ava
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