Hello Jim,
- Am 29. Mai 2018 um 20:27 schrieb Jim Wilson j...@sifive.com:
> On 05/28/2018 06:32 AM, Sebastian Huber wrote:
>> I guess, that the resolution of the weak reference to the undefined
>> symbol __deregister_frame_info somehow sets __deregister_frame_info to
>>
ourse define your own
set of multilibs.
I am not a hardware developer, but I heard that the C extension is not
easy to implement in out of order machines. For example:
https://www2.eecs.berkeley.edu/Pubs/TechRpts/2017/EECS-2017-157.html
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On 31/05/18 11:08, Palmer Dabbelt wrote:
On Tue, 29 May 2018 11:02:58 PDT (-0700), Jim Wilson wrote:
On 05/26/2018 06:04 AM, Sebastian Huber wrote:
Why is the default multilib and a variant identical?
This is supposed to be a single multilib, with two names. We use
MULTILIB_REUSE to map the
On 01/06/18 10:23, Michael Clark wrote:
On 1/06/2018, at 6:16 PM, Sebastian Huber
wrote:
On 29/05/18 20:02, Jim Wilson wrote:
Most variants include the C extension. Would it be possible to add -march=rv32g
and -march=rv64g variants?
The expectation is that most implementations will
`__gnat_raise_nodefer_with_msg' follow
I cannot find it in the GCC sources:
grep -ri raise_nodefer_with_msg
gcc/ada/gcc-interface/trans.c: (get_identifier
("__gnat_raise_nodefer_with_msg"), NULL_TREE, ftype,
Who is supposed to provide an implementation of
__gnat_raise_node
g/svn/gcc/trunk@247301
138bc75d-0d04-0410-961f-82ee72b054a4
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tions : constant Boolean := True;
ZCX_By_Default: constant Boolean := False;
in system-rtems.ads.
Thanks, this worked.
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E
specific?
Have a nice day!
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Diese Nachricht ist
On 04/06/2011 05:08 PM, Richard Earnshaw wrote:
>
> On Tue, 2011-04-05 at 15:34 +0200, Sebastian Huber wrote:
[...]
>> The EABI makes the VFP floating point architecture mandatory and enables us
>> to
>> use hardware floating point support in the future. RTEMS has cur
be
clear now how to fix the problem.
Have a nice day!
Sebastian
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clear although this PR is open since 2008.
In total this makes the GCC for the older ARM7TDMI-S and ARM926EJ-S (they are
still in production) cores pretty dangerous.
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es.
4. Identify the current author of each of these lines.
5. Fix the whitespace and commit the changes on behalf of the current line
author.
This does not affect blame. It does not make merging more difficult. Existing
patches may be affected by this.
Have a nice day!
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the version 4.3.3 due
to invalid line number informations. I am unsure if the above warnings and
errors are connected to this.
Have a nice day!
Sebastian Huber
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Hi,
the problem below is still present in GCC version 4.4.0 20090407 (exact this
snapshot with no additional patches). The objdump is from Binutils version
2.19.
Sebastian Huber wrote:
> Hi,
>
> I use GCC cross compilers from the RTEMS project. They differ only in nuances
> from
Hi,
someone told me that generated files should be not included in patches. It
would be nice if this is mentioned at
http://gcc.gnu.org/contribute.html
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me a hint what needs to be added so that this object
is created? The object is placed in a linker set.
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used by frontends.
Thanks, this worked.
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e abort here optionally? Can this be defined for
example by a target configuration header like gcc/config/rtems.h?
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On 22/07/2021 14:15, Richard Biener wrote:
On Wed, Jul 21, 2021 at 2:45 PM Sebastian Huber
wrote:
Hello,
while testing this patch
https://www.google.com/search?client=firefox-b-e&q=gcc+enable_runtime_checking
I noticed that __gcov_info_to_gcda() uses abort(). This is due to (from
tsyst
n a
multi-threaded program I guess.
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On 09/08/2021 08:51, Sebastian Huber wrote:
Hello,
I would like to use gcov for a multi-threaded program running on an SMP
machine using a 32-bit SPARC/LEON3 target. This target supports
HAVE_atomic_compare_and_swapsi but not HAVE_atomic_compare_and_swapdi.
Unfortunately we have:
/* Return
On 09/08/2021 12:22, Richard Biener wrote:
On Mon, Aug 9, 2021 at 8:52 AM Sebastian Huber
wrote:
Hello,
I would like to use gcov for a multi-threaded program running on an SMP
machine using a 32-bit SPARC/LEON3 target. This target supports
HAVE_atomic_compare_and_swapsi but not
n, arg);
else
dump_unsigned (0, dump_fn, arg);
}
But I guess using 32bit counters on sparc-rtems might be the way to
go ...
Yes, you somehow just have to make sure that your test programs don't
overflow the counters.
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n define.
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E > 32
typedef gcov_type __INT64_TYPE__;
typedef gcov_type_unsigned __UINT64_TYPE__;
#else
typedef gcov_type __INT32_TYPE__;
typedef gcov_type_unsigned __UINT32_TYPE__;
#endif
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pho
On 10/08/2021 09:59, Richard Biener wrote:
On Tue, Aug 10, 2021 at 8:07 AM Sebastian Huber
wrote:
On 09/08/2021 14:13, Richard Biener wrote:
But I guess using 32bit counters on sparc-rtems might be the way to
go ...
Yes, you somehow just have to make sure that your test programs don
On 12/08/2021 16:08, Martin Liška wrote:
On 7/21/21 2:44 PM, Sebastian Huber wrote:
Hello,
while testing this patch
https://www.google.com/search?client=firefox-b-e&q=gcc+enable_runtime_checking
I noticed that __gcov_info_to_gcda() uses abort(). This is due to
(from tsystem.h):
#i
On 12/08/2021 16:29, Martin Liška wrote:
On 8/12/21 4:12 PM, Sebastian Huber wrote:
On 12/08/2021 16:08, Martin Liška wrote:
On 7/21/21 2:44 PM, Sebastian Huber wrote:
Hello,
while testing this patch
https://www.google.com/search?client=firefox-b-e&q=gcc+enable_runtime_checking
On 16/08/2021 14:33, Martin Liška wrote:
On 8/12/21 4:31 PM, Sebastian Huber wrote:
This would be suitable for me, however, I am not sure if you want such
a customization feature just for a niche operating system.
I don't see a reason why not.
Please send a patch.
Ok, good. I will t
On 16/08/2021 18:50, Jason Merrill wrote:
On Mon, Aug 16, 2021 at 9:51 AM Sebastian Huber
wrote:
On 16/08/2021 14:33, Martin Liška wrote:
On 8/12/21 4:31 PM, Sebastian Huber wrote:
This would be suitable for me, however, I am not sure if you want such
a customization feature just for a
ess of the value of the size argument.
I would not give an advice on using the nonnull attribute here. This
attribute could have pretty dangerous effects in the function definition
(removal of null pointer checks).
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ct?
Kind regards,
Sebastian
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t -o
/tmp/sh/b-rtems/arm/realview_pbx_a9_qemu/testsuites/ada/ada_nsecs.exe
/opt/rtems/7/lib/gcc/arm-rtems7/12.0.1/thumb/armv7-a+simd/hard/adainclude/s-secsta.ads:288:9:
sorry, unimplemented: Thumb-1 'hard-float' VFP ABI
The s-secsta.ads seems to be from the right multilib directory
(
d
code. I tried to reproduce it with a simple division by zero test case,
but this didn't work:
unsigned f(unsigned i)
{
return i / 0;
}
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On 21/06/2022 15:24, Jakub Jelinek wrote:
On Tue, Jun 21, 2022 at 03:13:19PM +0200, Sebastian Huber wrote:
Hello,
I noticed that several division related routines provided by libgcc such as
__divdi3, __moddi3 and __umoddi3 have references to _Unwind_Resume for the
sparc-rtems target. For
)
Init(TLS_MODEL_GLOBAL_DYNAMIC)
-ftls-model=[global-dynamic|local-dynamic|initial-exec|local-exec] Set
the default thread-local storage code generation model.
Would it be possible to customize the default value for RTEMS?
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On 20/07/2022 10:43, Sebastian Huber wrote:
Hello,
RTEMS applications are usually fully statically linked together with the
operating system. So, we can use the -ftls-model=local-exec TLS model.
The default value for this option is defined in common.opt:
ftls-model=
Common Joined
On 20/07/2022 13:41, Alexander Monakov wrote:
On Wed, 20 Jul 2022, Sebastian Huber wrote:
How does Ada get its default TLS model?
You shouldn't need to do anything special, GCC automatically selects
initial-exec or local-exec for non-PIC (including PIE).
I am not sure, for this test pr
On 20.07.22 15:01, Alexander Monakov wrote:
On Wed, 20 Jul 2022, Sebastian Huber wrote:
On 20/07/2022 13:41, Alexander Monakov wrote:
On Wed, 20 Jul 2022, Sebastian Huber wrote:
How does Ada get its default TLS model?
You shouldn't need to do anything special, GCC automatically se
):
#define CC1_SPEC "%{G*}"
For each target you would have to check if you have to provide some
extra times for CC1_SPEC through copy and paste.
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re available.
3. Else use a library call (libatomic).
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Yes, but this approach would also work on big-endian architectures. You
just have to use other addresses. I guess the compiler knows for which
endianess it generates code.
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ph
On 05.11.22 12:18, Richard Biener wrote:
On Fri, Nov 4, 2022 at 9:28 AM Sebastian Huber
wrote:
Hello,
even recent 32-bit architectures such as RISC-V do not support 64-bit
atomic operations. Using -fprofile-update=atomic for the 32-bit RISC-V
RV32GC ISA yields:
warning: target does not
going edge and then redirect edges to form a half-diamond.
move_sese_in_condition has most of that CFG manipulation (but
it performs sth different)
Thanks, I will probably able to do this with a bit trial and error.
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to:
li a4,1
amoadd.w a5,a4,0(a0)
addia5,a5,1
seqza5,a5
addia4,a0,4
amoadd.w zero,a5,0(a4)
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fa
On 05/12/2022 08:44, Richard Biener wrote:
On Mon, Dec 5, 2022 at 8:26 AM Sebastian Huber
wrote:
On 08/11/2022 11:25, Richard Biener wrote:
It would be great to have a code example for the construction of the "if
(f()) f();".
I think for the function above we ne
e/EB/sebastian_h/src/gcc/gcc/passes.cc:2145
Please submit a full bug report, with preprocessed source (by using
-freport-bug).
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.
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On 07.12.22 10:09, Richard Biener wrote:
On Wed, Dec 7, 2022 at 9:51 AM Sebastian Huber
wrote:
On 06.12.22 17:08, Richard Biener wrote:
Likely. I'd use the gimple_build () API from gimple-fold.h which
builds the expression(s) to a gimple_seq creating necessary temporaries
on-the-fl
On 04.11.22 09:27, Sebastian Huber wrote:
Hello,
even recent 32-bit architectures such as RISC-V do not support 64-bit
atomic operations. Using -fprofile-update=atomic for the 32-bit RISC-V
RV32GC ISA yields:
warning: target does not support atomic profile update, single mode is
fault implementation of libatomic.
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on is actually
needed) and compile that locally in the libatomic build dir. That
shouldn't need changes to libgcc or libstdc++, should it?
Yes, this would also work. I can probably duplicate the gthr
configure/Makefile stuff from libstdc++ for this.
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desired calling convention, and also to
optimize them for our purposes. */
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ould it be possible to add
a NULL pointer protection page?
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On 14.05.24 08:03, Sebastian Huber wrote:
Hello,
the ZynqMP APU RAM start addresses are far away from 0x0:
Sorry, I selected the wrong mailing list.
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phone:
On 28.04.22 10:16, Sebastian Huber wrote:
Hello,
I test currently the Ada support for RTEMS in GCC 12. We have a -mthumb
-march=armv7-a+simd -mfloat-abi=hard multilib for which the Ada RTS is
built like this:
make[4]: Entering directory
'/tmp/sh/b-gcc-arm-rtems6/arm-rtems6/thumb/ar
On 24.06.24 16:06, Sebastian Huber wrote:
On 28.04.22 10:16, Sebastian Huber wrote:
Hello,
I test currently the Ada support for RTEMS in GCC 12. We have a
-mthumb -march=armv7-a+simd -mfloat-abi=hard multilib for which the
Ada RTS is built like this:
make[4]: Entering directory
'/tmp
On 25.06.24 14:53, Sebastian Huber wrote:
On 24.06.24 16:06, Sebastian Huber wrote:
On 28.04.22 10:16, Sebastian Huber wrote:
Hello,
I test currently the Ada support for RTEMS in GCC 12. We have a
-mthumb -march=armv7-a+simd -mfloat-abi=hard multilib for which the
Ada RTS is built like this
r+blub -mfloat-abi=hard -marm -mlibarch=armv7-a+simd
-march=armv7-a+simd END ...
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keep a
back-end up to date. How much work would it be roughly to bring the PowerPC SPE
port from GCC 8 to the current version? Is this in the range of person weeks,
months, years?
Kind regard, Sebastian
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- Am 16. Sep 2024 um 15:02 schrieb David Edelsohn dje@gmail.com:
> On Sun, Sep 15, 2024 at 7:29 PM Sebastian Huber <
> sebastian.hu...@embedded-brains.de> wrote:
>
>> Hello,
>>
>> the PowerPC SPE port was obsoleted in GCC 8. It was moved from the general
- Am 16. Sep 2024 um 15:24 schrieb David Edelsohn dje@gmail.com:
> On Mon, Sep 16, 2024 at 9:15 AM Sebastian Huber <
> sebastian.hu...@embedded-brains.de> wrote:
>
>> - Am 16. Sep 2024 um 15:02 schrieb David Edelsohn dje@gmail.com:
>>
>>
ort?
Thanks for any feedback you can provide!
A patch was proposed to implement the VLE support in GCC, but this patch lacks
approval and the last status I know can be found here:
http://gcc.gnu.org/ml/gcc-patches/2012-10/msg01924.html
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se the
automake generated bits. Basically the i686 version of the library won't start
building until the x86_64 version has completed due to Makefile lameness.
Building multilibs in parallel would be nice boost for cross-compiler builds.
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Address : Do
strlen(buf));
*(ptr++) = '\n';
This will lead to:
*** EXIT code 1
*** EXIT code 0
Is this a reasonable approach?
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Hello,
you can also use a cross compiler and run the tests on a simulator or remote
target.
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PGP
mpiler provided define to determine how the context
switch support in an operating system should look like.
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multi-lib.
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Diese Nachricht ist keine geschäftliche
R profile
and therefore only 16 regs.
Thanks for this information. I was not aware that no existing Cortex-R variant
has a D32 VFP unit.
Is the converse true for Cortex-A variants or are there Cortex-A cores with
VFP-D16 and VFP-D32 units?
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+= -fno-inline
This -fno-inline seems to be there since at least 2011. Is this bug still
present in GCC?
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unk or the latest release).
What requirements must a target fulfill to get on this list?
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PGP :
ir)/../$(target_subdir)/newlib/targ-include'
fi
AC_SUBST(inhibit_libc)
Unfortunately this doesn't work, since the "stmp-int-hdrs" Makefile
target is built before the includes are copied to the
'$(objdir)/../$(target_subdir)/newlib/targ-include' directory :-(
Do
()
+{
+ int i, v, &u = v;
+ #pragma omp simd reduction (foo:u)
+for (i = 0; i < 1024; i++)
+ u = i;
+ return u;
+}
+
+int
+bar ()
+{
+ int i, v, &u = v;
+ #pragma omp simd reduction (foo:u) safelen(1)
+ for (i = 0; i < 1024; i++)
+ u = i;
+ return u;
+}
cc.gnu.org/ml/gcc-testresults/2014-02/msg00200.html
On the other hand this test seems to pass on armv7l-unknown-linux-gnueabihf:
http://gcc.gnu.org/ml/gcc-testresults/2014-02/msg00280.html
Does anyone know what is wrong here?
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s a major headache for me since some libraries assume that sizeof(any
enum) > 1, e.g. the standard XDR library. Is the only possible way to disable
short enums to set the ABI to ARM_ABI_AAPCS_LINUX? Which side effects does
this have?
Have a nice day!
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On 02/14/2012 04:05 PM, Ian Lance Taylor wrote:
Sebastian Huber writes:
the default ARM EABI configuration uses short enums by default (from
"gcc/config/arm/arm.c":
/* AAPCS based ABIs use short enums by default. */
static bool
arm_default_short_enums (void)
{
return TARGET_A
On 02/15/2012 07:07 AM, Ralf Corsepius wrote:
On 02/14/2012 06:51 PM, Ian Lance Taylor wrote:
Sebastian Huber writes:
On 02/14/2012 04:05 PM, Ian Lance Taylor wrote:
Sebastian Huber writes:
[...]
I would recommend that RTEMS change to the ARM EABI if possible. That
is the current standard
makes also problems (some
files of libc are compilied with -fshort-enums). All in all its probably
better to fix the XDR library and other things (the assumption that an enum is
an int is quite common).
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Sebastian Huber, embedded brains GmbH
Address : Obere Lagerstr. 30, D-82178 Puchheim, Ger
_sync_synchronize' follow
Who is supposed to provide this function?
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Sebastian Huber, embedded brains GmbH
Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone : +49 89 18 90 80 79-6
Fax : +49 89 18 90 80 79-9
E-Mail : sebastian.hu...@embedded-brains.de
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r procedures are required for other architectures.
Have a nice day!
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Sebastian Huber, embedded brains GmbH
Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone : +49 89 18 90 80 79-6
Fax : +49 89 18 90 80 79-9
E-Mail : sebastian.hu...@embedded-brains.de
PGP : Public key
Hello Diego,
what is with targets that only use cross compilers like RTEMS? I think there
is no need for a bootstrap?
--
Sebastian Huber, embedded brains GmbH
Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone : +49 89 18 90 80 79-6
Fax : +49 89 18 90 80 79-9
E-Mail
ine option
'-pthread'
The -pthread option is not necessary in RTEMS for the pthread API. I don't
think that a special case in the test suite is desirable, thus we should add a
dummy -pthread option to the RTEMS target configurations. Is this possible?
In which file do I have to look
m*-*-symbianelf*" combinations with "arm_eabi"?
--
Sebastian Huber, embedded brains GmbH
Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone : +49 89 18 90 80 79-6
Fax : +49 89 18 90 80 79-9
E-Mail : sebastian.hu...@embedded-brains.de
PGP : Public ke
ting
Bugzilla report then yes, you should file a bug report. This list is
not for reporting bugs.
Maybe this is related to
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55058
--
Sebastian Huber, embedded brains GmbH
Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone : +49 89 18 90
n AIX machine. On which platform should I test to show that
changes like this
http://gcc.gnu.org/ml/gcc-patches/2012-10/msg02931.html
cause no harm?
--
Sebastian Huber, embedded brains GmbH
Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone : +49 89 18 90 80 79-6
Fax : +49 89
On 11/06/2012 03:32 PM, David Edelsohn wrote:
On Tue, Nov 6, 2012 at 3:30 AM, Sebastian Huber
wrote:
[...]
and I don't have an AIX machine. On which platform should I test to show
that changes like this
http://gcc.gnu.org/ml/gcc-patches/2012-10/msg02931.html
cause no harm?
I am not
/msg00544.html
or should I focus on GCC 4.9 for this regression (this patch is available since
October 2012)?
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Sebastian Huber, embedded brains GmbH
Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail : sebastian.hu...@embedded
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