Re: LSDA unwind information is off by one (in __gcc_personality_v0)

2016-10-20 Thread Eric Botcazou
, although _Unwind_GetIPInfo itself has been defined. Then that's the bug, the C++ and Ada personality rountines call it. -- Eric Botcazou

Re: Possibly requires fixing (PRF): GNAT 7.0 not printing actual code samples and column markers when printing errors and warnings

2016-12-11 Thread Eric Botcazou
> What do you guys think? It's by design. Use -fdiagnostics-show-caret to flip the setting. -- Eric Botcazou

Re: Converting to LRA (calling all maintainers)

2017-01-03 Thread Eric Botcazou
> p.s. Are there plans for converting the SPARC port? The SPARC port has now been converted. Note that the status of the PowerPC port is a bit confusing because both doc/invoke.texi and htdocs/backends.html say that it still uses reload. -- Eric Botcazou

Re: Converting to LRA (calling all maintainers)

2017-01-03 Thread Eric Botcazou
ure with few, simple addressing modes so the conversion was relatively straightforward. The only irregular feature is the pairing of (even, odd) integer registers in 32-bit mode and it was the source of the annoying issues. I'm going to add a few words on the Wiki about that. -- Eric Botcazou

Re: input address reload issue

2017-01-06 Thread Eric Botcazou
ost of them old indeed, with the exception of AVR. You're probably thinking of m68k, but AVR seems to be more blocking here. -- Eric Botcazou

Re: Stack offset computation for incoming arguments.

2014-04-25 Thread Eric Botcazou
> #define FIRST_PARM_OFFSET(FNDECL) (get_frame_size() + > STARTING_FRAME_OFFSET + RETURN_BYTES ) I don't think that you can define FIRST_PARM_OFFSET like so, you need to have a fixed FIRST_PARM_OFFSET (for some definition of fixed) and eliminate the argument pointer during reload

Re: SPARC LEON3 and CAS instruction

2014-04-25 Thread Eric Botcazou
a > machine option to GCC to use an ASI of 0x0A for the atomic operations via > CASA on LEON3? Yes, I guess we actually want to emit an ASI of either 0xA (user data) or 0xB (supervisor data), predicated on -muser-mode. I'll prepare a patch. -- Eric Botcazou

Re: SPARC LEON3 and CAS instruction

2014-04-28 Thread Eric Botcazou
> Thanks, since this -muser-mode seems to be something new, maybe we should > instead use -mcas=supervisor|user to make it more specific? I don't think so, we might need to extend its purview in the future. -- Eric Botcazou

Re: SPARC LEON3 and CAS instruction

2014-04-28 Thread Eric Botcazou
> Ok, this makes sense. Which default to you have in mind for the -muser-mode > option? -mno-user-mode the default, it's usually what's done in this case I think. -- Eric Botcazou

Re: SPARC LEON3 and CAS instruction

2014-05-01 Thread Eric Botcazou
> I think its more natural to generate user-space code by default. Well, the other architectures I know of think differently so we'll follow them. -- Eric Botcazou

Re: aarch64 ada rpms

2014-05-01 Thread Eric Botcazou
I'll backport the changes to the official 4.9 branch at some point. -- Eric Botcazou

Re: Supported targets

2014-05-20 Thread Eric Botcazou
rned 1 exit status > make[3]: *** [cc1] Error 1 > > [snip] > > > Requires a later version of glibc? Yes, glibc 2.4 is required for GCC 4.9 because of this. -- Eric Botcazou

Re: Supported targets

2014-05-20 Thread Eric Botcazou
ript Use the shared library, but some functions are only in the static library, so try that secondarily. */ OUTPUT_FORMAT(elf32-i386) GROUP ( /lib/libc.so.6 /usr/lib/libc_nonshared.a AS_NEEDED ( /lib/ld- linux.so.2 ) ) -- Eric Botcazou

Re: Supported targets

2014-05-20 Thread Eric Botcazou
> But that should be generally needed only when linking with -Wl,-z,defs , > without it the linker shouldn't care. Yet using a local libc.so with the missing AS_NEEDED is a (poor) workaround. -- Eric Botcazou

Re: Stack offset computation for incoming arguments.

2014-05-29 Thread Eric Botcazou
mination_offset (FROM, TO) > > #define CAN_ELIMINATE 1 > > #define FIRST_PARM_OFFSET 3 > > With -O0 or by default options the frame and arg regs are not > replaced by stack reg and the same replaced with -O1 and above > optimisation. Only pseudo-registers are always eliminated I think. -- Eric Botcazou

Re: Stack offset computation for incoming arguments.

2014-05-30 Thread Eric Botcazou
they need to be fake hard registers, i.e. hard registers according to the FIRST_PSEUDO_REGISTER macro but with an arbitrary REGNUM (typically just below the FIRST_PSEUDO_REGISTER macro). See the numerous examples in the tree. -- Eric Botcazou

Re: Stack offset computation for incoming arguments.

2014-05-31 Thread Eric Botcazou
l used regs respectively. If they are fake, you ought to mark them as fixed. > Please help us regrading with any hints ?? Look at existing ports in the tree with an equivalent setup. -- Eric Botcazou

Re: lib{atomic, itm}/configure.tgt uses -mcpu=v9 as default for sparc

2014-06-02 Thread Eric Botcazou
under NetBSD 6.4.1, throws Illegal > Instruction during those lib{atomic, itm} final stage configure. > > Removing "-mcpu=v9" allows the build to finalize. > > System is a QEMUlated SparcStation 5. Not the best target for testing, > but I understand this is a bug nonetheless. IIRC both libraries require the V9 architecture to work properly/efficiently. -- Eric Botcazou

Re: lib{atomic, itm}/configure.tgt uses -mcpu=v9 as default for sparc

2014-06-02 Thread Eric Botcazou
quot; to > XCFLAGS, but adding it for non-v9 sparc-*-* targets is at least weird. Well, V9 is about 20 years old now so defaulting to it is not unreasonable, especially for all the native OSes. But patches are of course welcome. -- Eric Botcazou

Re: lib{atomic, itm}/configure.tgt uses -mcpu=v9 as default for sparc

2014-06-03 Thread Eric Botcazou
> V9 is currently bound to 64bit, you can't build a sparc-linux-gnu compiler > defaulting to V9 without patches. libitm was tested on SPARC/Linux though. -- Eric Botcazou

Re: Gimplilfy ICE in gnat.dg/array18.adb

2014-06-05 Thread Eric Botcazou
> Can someone give me a hint to solve my problem ? I have no idea which part > of my backend could be related to the GENERIC or GIMPLE generation and I'm > very unfamiliar with this part of GCC. Look at the patch installed in conjunction with gnat.dg/array18.adb. -- Eric Botcazou

Re: Gimplilfy ICE in gnat.dg/array18.adb

2014-06-06 Thread Eric Botcazou
comment should clearly state the intent of the change though and how to adjust it to your needs. -- Eric Botcazou

Re: GCC version bikeshedding

2014-07-21 Thread Eric Botcazou
t as ridiculous as Firefox, but still. -- Eric Botcazou

Re: GCC version bikeshedding

2014-07-29 Thread Eric Botcazou
y": if you drop the major version number, the next release should be 10.0, not 5.0. Here we seem to be leaning towards a weird scheme where we retain the major version number but change its meaning, which will be even more confusing than the current scheme. -- Eric Botcazou

Re: GCC version bikeshedding

2014-07-29 Thread Eric Botcazou
> How does it change meaning? It's still the major number, just > incremented more often. Reread Ian's post, the original idea is to drop the major version number. -- Eric Botcazou

Re: GCC version bikeshedding

2014-07-30 Thread Eric Botcazou
27;s message if you deem it necessary. -- Eric Botcazou

Re: GCC version bikeshedding

2014-08-06 Thread Eric Botcazou
sense to anybody who is not an > active GCC developer. I also disagree with the last assertion (for example Sun did that for Solaris) but that's probably too much bikeshedding at this point. -- Eric Botcazou

Re: -Wstack-usage and alloca in loops

2014-09-22 Thread Eric Botcazou
oving the stack usage computation into its own analysis phase which has > access to VRP bounds and such would be a a significant improvement and > one which I think would be quite useful. Yes, provided the outcome is still guaranteed to be conservatively correct. -- Eric Botcazou

Re: [gimple-classes, committed 4/6] tree-ssa-tail-merge.c: Use gassign

2014-11-11 Thread Eric Botcazou
But perhaps I'm alone with this. IMO that's the sort of things some of us were afraid of when the C++ switch was being discussed and IIRC we were told this would not happen... -- Eric Botcazou

Re: Support for architectures without hardware interlocks

2015-01-08 Thread Eric Botcazou
-specific pass that runs at the end of the RTL pipeline. -- Eric Botcazou

Re: Support for architectures without hardware interlocks

2015-01-08 Thread Eric Botcazou
h shortening. The new Visium port does that for all instructions (see visium_reorg). -- Eric Botcazou

Re: [ping] Re: proper name of i386/x86-64/etc targets

2015-01-20 Thread Eric Botcazou
> Ping? Any thoughts? x86 for the family and x86-32/x86-64 for the 2 architectures? -- Eric Botcazou

Re: How to update reg_dead notes

2015-02-24 Thread Eric Botcazou
> Could you give me some advice on correct usage of df or even more preferred > point me to a comprehensible documentation of df which is more complete than > in df-core.c? Take a look at the c6x and mep ports. -- Eric Botcazou

Re: Ada: %(cc1_options) missing from default specs file

2015-04-01 Thread Eric Botcazou
" thing) and cc1_options doesn't do it. That being said, there are enough common bits as to deserve a factorization. -- Eric Botcazou

Re: Ada: %(cc1_options) missing from default specs file

2015-04-01 Thread Eric Botcazou
Yes, defining a common set of base options would be welcome. -- Eric Botcazou

Re: Ada: %(cc1_options) missing from default specs file

2015-04-01 Thread Eric Botcazou
e_options only to the Ada front-end. -- Eric Botcazou

Re: gcc -S vs clang -S

2015-05-12 Thread Eric Botcazou
#x27;s your point exactly here? You cannot expect different compilers to generate exactly the same code on a given testcase for non-toy architectures. Note that this kind of discussion is more appropriate for gcc-h...@gcc.gnu.org -- Eric Botcazou

Re: movmem pattern and missed alignment

2018-10-08 Thread Eric Botcazou
OK for every language on strict-alignment platforms. This was changed only because of SSE on x86. -- Eric Botcazou

Re: movmem pattern and missed alignment

2018-10-08 Thread Eric Botcazou
ween gcc-4.5 and gcc-4.6) Possibly indeed, I remembered GCC 4.5 as being the turning point. -- Eric Botcazou

Re: movmem pattern and missed alignment

2018-10-09 Thread Eric Botcazou
t would fix the simple testcase > that was presented here. OK, I keep forgetting it and that would be a good compromise indeed. -- Eric Botcazou

Re: testsuite result updates for x86_64-w64-mingw32

2018-10-18 Thread Eric Botcazou
8-10/msg02312.html So we have an additional ACATS failure (ce2104c) in 8.2.1 over the previous releases? Feel free to open a PR about it if you have a couple of minutes. Thanks for testing the Ada compiler! -- Eric Botcazou

Re: testsuite result updates for x86_64-w64-mingw32

2018-10-18 Thread Eric Botcazou
> About the Ada compiler: it doesn't build on i686-w64-mingw32. It is > the reason why MSYS2 is stuck with 7.3 for 32 bits. Why doesn't it build? Because of PR ada/81878? -- Eric Botcazou

Re: Enabling vectorization at -O2 for x86 generic, core and zen tuning

2019-01-07 Thread Eric Botcazou
gt; cost models. ; Alias to enable both -ftree-loop-vectorize and -ftree-slp-vectorize. ftree-vectorize Common Report Optimization Enable vectorization on trees. -- Eric Botcazou

Re: Strange executable text files in the repository

2019-01-11 Thread Eric Botcazou
upstream and > sanitizer_common_interceptors_ioctl.inc isn't executable there. No objections for the couple of Ada files. -- Eric Botcazou

Re: RTEMS Ada build problem on trunk

2019-01-17 Thread Eric Botcazou
ANTABILITY or FITNESS FOR A > PARTICULAR PURPOSE. This would suggest that bldtools/oscons/xoscons is miscompiled by the trunk native compiler. How did you configure this latter compiler? -- Eric Botcazou

Re: testsuite result updates for x86_64-w64-mingw32

2019-01-22 Thread Eric Botcazou
e efficient than the former mechanism." I presume that the problem occurs during stage #2, i.e. that the gnat1 at stake has been built by the base compiler, right? -- Eric Botcazou

Re: testsuite result updates for x86_64-w64-mingw32

2019-01-22 Thread Eric Botcazou
> Ah, that makes sense since the 32-bit SEH is different from the 64-bit one, > explains why the 64-bit builds work. Which EH mechanism does the base compiler use? The default one? We know that this works with the DWARF-2 mechanism (--disable-sjlj-exceptions). -- Eric Botcazou

Re: testsuite result updates for x86_64-w64-mingw32

2019-01-22 Thread Eric Botcazou
so, can you lower it to -O1 or -O0? -- Eric Botcazou

Re: testsuite result updates for x86_64-w64-mingw32

2019-01-22 Thread Eric Botcazou
int size = dwarf_reg_size_table[__builtin_dwarf_sp_column ()]; if (size == sizeof(_Unwind_Ptr)) tmp_sp->ptr = (_Unwind_Ptr) cfa; else { gcc_assert (size == sizeof(_Unwind_Word)); tmp_sp->word = (_Unwind_Ptr) cfa; } which is quite unexpected. -- Eric Botcazou

Re: GCC missing -flto optimizations? SPEC lbm benchmark

2019-02-15 Thread Eric Botcazou
es of GNAT is to be compatible with C by default as much as possible. But we started to do some reordering recently when the records don't have (direct) equivalents in C. -- Eric Botcazou

Re: Function pointers to a nested function / contained procedure

2019-03-26 Thread Eric Botcazou
back-ends to support this (look for trampolines/descriptors in the manual and the source code). This should essentially work out of the box for any language front-end. -- Eric Botcazou

Re: is re-running bootstrap after a change safe?

2019-04-05 Thread Eric Botcazou
ers and that isn't what happens. Instead the compiler of each stage is updated in isolation. -- Eric Botcazou

Re: A bug in vrp_meet?

2019-05-05 Thread Eric Botcazou
> I have now applied this variant. You backported it onto the 8 branch on Friday: 2019-05-03 Richard Biener Backport from mainline [...] 2019-03-07 Richard Biener PR tree-optimization/89595 * tree-ssa-dom.c (dom_opt_dom_walker::optimize_stmt): Take

Re: [PowerPC 64]r12 is not updated to GEP when control transferred from virtual thunk function .

2019-05-15 Thread Eric Botcazou
if (!TARGET_VXWORKS || TARGET_VXWORKS_RTP) return true; /* The loader neither creates the glue code sequence that loads r12 nor uses the local entry point for the sibcall's target in the ELFv2 ABI. */ return DEFAULT_ABI != ABI_ELFv2; } -- Eric Botcazou

Re: [PowerPC 64]r12 is not updated to GEP when control transferred from virtual thunk function .

2019-05-15 Thread Eric Botcazou
d global entry points. We have had this patch in our tree for some time and it works well, so let me submit it for inclusion in the official tree. -- Eric Botcazou

Re: [PowerPC 64]r12 is not updated to GEP when control transferred from virtual thunk function .

2019-05-17 Thread Eric Botcazou
olves the remaining relocations. None of them plays the usual dance with the local and global entry points implied by the ELFv2 ABI. -- Eric Botcazou

Re: On-Demand range technology [3/5] - The Prototype

2019-05-23 Thread Eric Botcazou
of lesser importance than literal ranges in most cases. > Note that symbolic ranges are already restricted to PLUS_EXPR > and MINUS_EXPR (and NEGATE_EXPR I think). There are > also "symbolic" (non-integer constant) ranges like [&a, &a]. Yes, the current implementation is restricted to additive operations. -- Eric Botcazou

Re: Testsuite not passing and problem with xgcc executable

2019-06-08 Thread Eric Botcazou
; from the build folder without installing it? You need to pass -B where contains the compiler cc1. -- Eric Botcazou

Re: Testsuite not passing and problem with xgcc executable

2019-06-08 Thread Eric Botcazou
> https://gcc.gnu.org/ml/gcc-testresults/2019-06/msg00810.html > results have been produced or there is something I am not aware of. You need to issue a third command: make mail-report.log -- Eric Botcazou

Re: C2X Proposal, merge '.' and '->' C operators

2019-12-21 Thread Eric Botcazou
> For what it's worth, that is how Go works. The '.' operator is used > for struct fields regardless of whether the left hand operand is a > struct or a pointer to a struct. Likewise in Ada. -- Eric Botcazou

Re: [RFC] Further LRA subreg handling issues

2017-01-19 Thread Eric Botcazou
> I'll run testing for at least x86_64, MIPS and another > WORD_REGISTER_OPERATIONS target and try to get this committed in the next > couple of days so it can get into everyone's testing well before release. I'm going to give it a try on SPARC. -- Eric Botcazou

Re: [RFC] Further LRA subreg handling issues

2017-01-20 Thread Eric Botcazou
> I'll run testing for at least x86_64, MIPS and another > WORD_REGISTER_OPERATIONS target and try to get this committed in the next > couple of days so it can get into everyone's testing well before release. No issues found on SPARC. -- Eric Botcazou

Re: [RFC] Further LRA subreg handling issues

2017-01-26 Thread Eric Botcazou
gister and let the insn do the different-sized accesses. This is doubly true if WORD_REGISTER_OPERATIONS. In this case eliminate_regs has left non-paradoxical subregs for push_reload to see. Make sure it does by forcing the reload. -- Eric Botcazou

Re: [RFC] Further LRA subreg handling issues

2017-01-26 Thread Eric Botcazou
elated bugs in the code. -- Eric Botcazou

Re: [RFD] Simplifying subregs in LRA

2017-02-03 Thread Eric Botcazou
e, MEM_ALIGN (reg) > return true; > > *curr_id->operand_loc[nop] = operand; > > > The change will affect at least arc,mips,rx,sh,sparc though I haven't > checked which of these default on for LRA just that they can turn on LRA. Only MIPS and SPARC (see https://gcc.gnu.org/backends.html). -- Eric Botcazou

Re: [RFD] Simplifying subregs in LRA

2017-02-03 Thread Eric Botcazou
You can send me the patch(es) in advance, I'll give it a try on SPARC. -- Eric Botcazou

Re: __sync_-builtins cause undefined references on some sparc targets

2017-02-27 Thread Eric Botcazou
s on how to start? I'm not sure backtrace support has much interest on embedded platforms and I don't think implementing atomic operations makes any sense on LEON2, so the best thing to do is probably to kludge around it in libgfortran. -- Eric Botcazou

Re: __sync_-builtins cause undefined references on some sparc targets

2017-02-27 Thread Eric Botcazou
s HPUX. -- Eric Botcazou

Re: __sync_-builtins cause undefined references on some sparc targets

2017-03-03 Thread Eric Botcazou
> Is libbacktrace excluded from the build, or is it build but broken? Neither, it's presumably falls back to __atomic. No big deal in any case, since you'll presumably never use libbacktrace in practice. -- Eric Botcazou

Re: Right way to represent flag-setting arithmetic instructions in MD files

2017-03-10 Thread Eric Botcazou
e transformations it wants. Why do you want to use the compare-elimination pass exactly if the flags are exposed before reload, as is the case on Aarch64 I think? The combiner is supposed to do the same job instead for these targets. -- Eric Botcazou

Re: try_finally_expr wrong source location info

2017-06-09 Thread Eric Botcazou
mple_set_location (x, tf_loc); + gimple_set_location (x, finally_loc); gimple_seq_add_stmt (&switch_body, x); } -- Eric Botcazou

Re: Read-only *.ali files in adalib installation?

2017-06-14 Thread Eric Botcazou
; -rw-r--r-- 1 sebastian_h domain users 16076716 Jun 12 14:30 libgnat.a > > [...] > > This is unlike the lib*.a files, which are user writeable. Its this > intentional? Yes for the ALI files, but no for the libraries (it doesn't matter for them). -- Eric Botcazou

Re: GCC 6.4 Release Candidate available from gcc.gnu.org

2017-06-29 Thread Eric Botcazou
er/79562 > * sanitizer_common/sanitizer_platform_limits_posix.cc: Cherry-pick > upstream r294806. > > > this was also pushed to the GCC 5 branch. Yes, it's again PR sanitizer/63958 I guess. -- Eric Botcazou

Re: GCC 6.4 Release Candidate available from gcc.gnu.org

2017-06-29 Thread Eric Botcazou
64/Linux. -- Eric Botcazou

Re: timeouts/malloc failures in ada tests?

2017-07-07 Thread Eric Botcazou
iler should really consider enabling it (and it's a very good testbed). -- Eric Botcazou

Re: Volatile Memory accesses in Branch Delay Slots

2017-07-25 Thread Eric Botcazou
ion where allowing volatile memory accesses in branch delay slots > leads to problems. Am I missing a case? Or are negative effects limited > to other architectures? Delay slot filling is a code movement optimization and such optimizations are not valid for volatile memory accesses in the

Re: Overwhelmed by GCC frustration

2017-08-16 Thread Eric Botcazou
deprecation of cc0 is futile, > the voices that support cc0 deprecation are more and usefulness > of cc0 is not recognized. cc0 is just obsolete and inferior compared to the new representation. -- Eric Botcazou

Re: Byte swapping support

2017-09-12 Thread Eric Botcazou
ng the code simple and > maintainable. How do you discriminate scalars stored in native order and scalars stored in reverse order though? That's the main difficulty of the implementation. -- Eric Botcazou

Re: Byte swapping support

2017-09-13 Thread Eric Botcazou
time performance. This is not what the attribute was designed for, although we added the -fsso-struct switch at some point. -- Eric Botcazou

Re: Byte swapping support

2017-09-13 Thread Eric Botcazou
s any easier than > fixing the application. Note that WRS' Diab compiler has got something equivalent to what GCC has got now, i.e. a way to tag a particular component in a structure as BE or LE. -- Eric Botcazou

Re: Byte swapping support

2017-09-14 Thread Eric Botcazou
structures..." with the same limitation as GCC about taking the address: "It is not possible to take the address of a byte-swapped member." -- Eric Botcazou

Re: Byte swapping support

2017-09-15 Thread Eric Botcazou
ere is some interest though. -- Eric Botcazou

Re: Byte swapping support

2017-09-15 Thread Eric Botcazou
> handle_pragma_scalar_storage_order does not check c_dialect_cxx, so it > will not issue a warning for C++ even though the pragma is effectively > ignored. Indeed, unlike for the attribute, will fix, thanks. -- Eric Botcazou

Re: Dropping ChangeLogs

2017-12-22 Thread Eric Botcazou
e git has specific counter-measures against them, but that's useful at least with Subversion. -- Eric Botcazou

Re: Build Ada compiler for nios2?

2018-01-04 Thread Eric Botcazou
> This HOST_WIDE_INT is defined in gcc/hwint.h. Who is supposed to include > this file? Is this done via an #include or via a tm_file (gcc/config.gcc)? Nobody I'd say, the declaration shouldn't be compiled for the target. -- Eric Botcazou

Re: Status of m32c target?

2018-01-19 Thread Eric Botcazou
atency of the loads (assuming some AVR processors are pipelined), in which case CCmode will give you a performance bonus. -- Eric Botcazou

Re: Status of m32c target?

2018-01-23 Thread Eric Botcazou
ew back-end. And IMO starting from scratch is a bad idea. > But writing a backend is too much for a GSoC, even a small one. Definitely, and doing a CC0 conversion is probably an upper bound. -- Eric Botcazou

Re: [gcc plugin] get member offset in struct just like offsetof

2018-02-06 Thread Eric Botcazou
tes is given by tree.c:bit_position/byte_position. -- Eric Botcazou

Re: GCC 8.0.0 status on x86_64-w64-mingw32, some issues

2018-02-06 Thread Eric Botcazou
d > 23_containers/unordered_set/requirements/exception/propagation_consistent.cc Does passing -fno-reorder-blocks-and-partition change anything? -- Eric Botcazou

Re: GCC 8.0.0 status on x86_64-w64-mingw32, some issues

2018-02-06 Thread Eric Botcazou
> Sorry for the stupid question. How do I pass this to the testsuite? For ACATS it's a little awkward: you manually need to add it to the gccflags variable in gcc/testsuite/ada/acats/run_all.sh -- Eric Botcazou

Re: GCC 8.0.0 status on x86_64-w64-mingw32, some issues

2018-02-07 Thread Eric Botcazou
2102m ce2103a ce2103b ce3102d ce3107a ce3115a cxa4005 cxa4008 > cxa4016 cxa4019 cxac003 cxb3012 cxf3a01 cxf3a02 > /opt/devel/gnu/src/gcc-mingw-w64/gcc-8.0.0/gcc/testsuite/ada/acats/run_all.s > h completed at Wed Feb 7 12:28:36 CET 2018 Please open a PR for the ACATS regressions on mainline. -- Eric Botcazou

Re: Why does IRA force all pseudos live across a setjmp call to be spilled?

2018-03-04 Thread Eric Botcazou
fixed" it? What are the requirements imposed on setjmp exactly and by whom? The psABI on SPARC (the SCD) has an explicit note saying that setjmp/sigsetjmp/vfork don't (have to) preserve the usual non-volatile registers. -- Eric Botcazou

Re: Why does IRA force all pseudos live across a setjmp call to be spilled?

2018-03-04 Thread Eric Botcazou
the (historical) requirements were vague enough to allow their interpretation, IOW that the compiler can do the work. -- Eric Botcazou

Re: Why does IRA force all pseudos live across a setjmp call to be spilled?

2018-03-04 Thread Eric Botcazou
GNU and the Solaris libc make use of the leeway given by the psABI for setjmp at least in some cases. -- Eric Botcazou

Re: Why does IRA force all pseudos live across a setjmp call to be spilled?

2018-03-05 Thread Eric Botcazou
> Maybe we should have a target hook that says setjmp/longjmp are > implemented by simple function calls (or as-if by function calls), so > as not to penalize everyone who has an, erm, more conservative ABI? Yes, that sounds a sensible compromise to me. -- Eric Botcazou

Re: Selective scheduling and its usage

2018-03-29 Thread Eric Botcazou
ich doesn't really make sense IMO. -- Eric Botcazou

Re: Selective scheduling and its usage

2018-03-29 Thread Eric Botcazou
ng them at P3, which is not "don't care" as far as I know but just the default priority. The criterion could be a flag that is not part of any -Ox switches and not enabled on any primary+secondary platforms. -- Eric Botcazou

Re: Must TYPE_MODE of a UNION_TYPE be of MODE_INT class?

2018-05-24 Thread Eric Botcazou
gisters, whereas for structures it's dependent on the types of the fields. > Could anyone provide some insight on whether the TYPE_MODE of a union should > stay as a MODE_INT class or if it would be acceptable for the TYPE_MODE to > be other classes e.g. MODE_FLOAT? No, I don't think we want to change that. -- Eric Botcazou

Re: virtual-stack-vars reference not resolved in vregs

2018-05-24 Thread Eric Botcazou
> Is this something the back end is responsible for getting right, for example > via the machine description file? If so, any hints where to start? The SUBREG of MEM is invalid at this stage. -- Eric Botcazou

Re: Project Ranger

2018-05-30 Thread Eric Botcazou
term with cases that do require symbolic information to optimize things? The TODO page seems to acknowledge the loophole but only mentions a plan to deal with equivalences, which is not sufficient in the general case (as acknowledged too on the page). -- Eric Botcazou

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