> However in lra-constraints.c:simplify_operand_subreg it quite happily
> performs a reload using the outer mode in this case and only drops down to
> the inner mode if the outer mode reload would be slower than the inner.
>
> Presumably this is safe for non WORD_REGISTER_OPERATIONS targets as the
> junk upper bits in registers will be ignored; On WORD_REGISTER_OPERATIONS
> targets then the narrower-than-word mode load will take care of any
> 'magic' needed to set the upper bits to a safe value in register.
Yes, I was leaning to the same conclusion before reading your second message.
> So my thinking is that at least WORD_REGISTER_OPERATIONS targets should
> always reload the inner mode for the case mentioned above much like the same
> is required for normal subregs. Does that seem reasonable? Have I
> misunderstood the paradoxical subreg case entirely?
No, this is correct, see find_reloads:
/* We must force a reload of paradoxical SUBREGs
of a MEM because the alignment of the inner value
may not be enough to do the outer reference. On
big-endian machines, it may also reference outside
the object.
On machines that extend byte operations and we have a
SUBREG where both the inner and outer modes are no wider
than a word and the inner mode is narrower, is integral,
and gets extended when loaded from memory, combine.c has
made assumptions about the behavior of the machine in such
register access. If the data is, in fact, in memory we
must always load using the size assumed to be in the
register and let the insn do the different-sized
accesses.
This is doubly true if WORD_REGISTER_OPERATIONS. In
this case eliminate_regs has left non-paradoxical
subregs for push_reload to see. Make sure it does
by forcing the reload.
--
Eric Botcazou
