On Sat, Jan 11, 2020 at 2:02 AM Andrew Pinski wrote:
>
> Hi,
> I was looking into reassoc (for PR 93131) and I noticed that the
> alu.shift_reg is set to COSTS_N_INSNS (1). This prevents an
> optimization where we combine some if statements into shifts. I
> looked into the Corext A57 software
Hi,
I was looking into reassoc (for PR 93131) and I noticed that the
alu.shift_reg is set to COSTS_N_INSNS (1). This prevents an
optimization where we combine some if statements into shifts. I
looked into the Corext A57 software optimization guide[1] and saw that
shift with a register has a lat