Hi Joern,
>The insn that loads the return register with the label needs a REG_LABEL
>note to avoid the ref count dropping to zero.
The insn has a REG_LABEL (foo.c.110r.vregs) and the label also has a ref
count of 1.
>You would have to put a (set (pc) (reg RA)) into the pattern of the
>call in
Hi Jim,
>>> But my return label is getting optimized away. Could you please tell
>>> me how to avoid this.
>
>You may also need to add a (USE (REG RA)) to the call pattern. Gcc
will see that you set a register to the value of the
>return label, but it won't see any code that uses that register,
Kunal Parmar wrote:
>> But my return label is getting optimized away. Could you please tell
>> me how to avoid this.
You may also need to add a (USE (REG RA)) to the call pattern. Gcc will
see that you set a register to the value of the return label, but it
won't see any code that uses tha
> Kunal Parmar <[EMAIL PROTECTED]> writes:
>
> > Is this correct :
> >ret_label = gen_label_rtx ();
> >emit_move_insn (gen_rtx_REG (HImode, 7),
> >gen_rtx_LABEL_REF (VOIDmode,
> > ret_label));
> >emit_call_insn (gen_brc_call_simulate (add
Kunal Parmar <[EMAIL PROTECTED]> writes:
> Is this correct :
>ret_label = gen_label_rtx ();
>emit_move_insn (gen_rtx_REG (HImode, 7),
>gen_rtx_LABEL_REF (VOIDmode,
> ret_label));
>emit_call_insn (gen_brc_call_simulate (addr, args_size));
Hi,
>> I am working on porting GCC to a new RISC architecture. The ISA does
>> not have a "Jump and Link Register" instruction. So I am simulating
>> one by replacing
>> jal [reg]
>> by
>> load ra, Lret
>> jr reg
>> Lret:
>>
>> in RTL.
>> But my return label is getting
Kunal Parmar <[EMAIL PROTECTED]> writes:
> I am working on porting GCC to a new RISC architecture. The ISA does
> not have a "Jump and Link Register" instruction. So I am simulating
> one by replacing
> jal [reg]
> by
> load ra, Lret
> jr reg
> Lret:
>
> in RTL.
> But my
