> I think its more natural to generate user-space code by default.
Well, the other architectures I know of think differently so we'll follow them.
--
Eric Botcazou
On 2014-04-28 10:14, Eric Botcazou wrote:
Ok, this makes sense. Which default to you have in mind for the -muser-mode
>option?
-mno-user-mode the default, it's usually what's done in this case I think.
I think its more natural to generate user-space code by default.
--
Sebastian Huber, embed
> Ok, this makes sense. Which default to you have in mind for the -muser-mode
> option?
-mno-user-mode the default, it's usually what's done in this case I think.
--
Eric Botcazou
On 2014-04-28 10:02, Eric Botcazou wrote:
Thanks, since this -muser-mode seems to be something new, maybe we should
>instead use -mcas=supervisor|user to make it more specific?
I don't think so, we might need to extend its purview in the future.
Ok, this makes sense. Which default to you have
> Thanks, since this -muser-mode seems to be something new, maybe we should
> instead use -mcas=supervisor|user to make it more specific?
I don't think so, we might need to extend its purview in the future.
--
Eric Botcazou
On 2014-04-25 18:31, Eric Botcazou wrote:
recent GCC versions support the C11 atomic operations for the SPARC LEON3
processor via the CASA instruction. GCC emits CASA instructions with an ASI
of 0x80. I think this is due to the usage of "cas" if I get the stuff in
sync.md right:
"(define_insn
On Fri, Apr 25, 2014 at 1:31 PM, Eric Botcazou wrote:
>> recent GCC versions support the C11 atomic operations for the SPARC LEON3
>> processor via the CASA instruction. GCC emits CASA instructions with an ASI
>> of 0x80. I think this is due to the usage of "cas" if I get the stuff in
>> sync.md
> recent GCC versions support the C11 atomic operations for the SPARC LEON3
> processor via the CASA instruction. GCC emits CASA instructions with an ASI
> of 0x80. I think this is due to the usage of "cas" if I get the stuff in
> sync.md right:
>
> "(define_insn "*atomic_compare_and_swap_1"
>
