On Thu, Sep 04, 2008 at 09:04:30AM -0400, David Edelsohn wrote:
> That is unfortunate, but it is a long-term, known problem with PSIM. Someone
> maintaining PSIM needs to update it.
Also unfortunately, there is no one maintaining PSIM. It's shipped
with GDB, but I consider that only a convenienc
David Edelsohn wrote:
On Thu, Sep 4, 2008 at 8:31 AM, Joel Sherrill <[EMAIL PROTECTED]> wrote:
Another related issue is that psim in gdb does not currently
support the lwsync instruction so any code generated using it
would fail there. Since this is used as the test platform for
the embedded
On Thu, Sep 4, 2008 at 8:31 AM, Joel Sherrill <[EMAIL PROTECTED]> wrote:
> Another related issue is that psim in gdb does not currently
> support the lwsync instruction so any code generated using it
> would fail there. Since this is used as the test platform for
> the embedded gcc targets (at lea
David Daney wrote:
On Wed, Sep 3, 2008 at 6:09 PM, David Edelsohn <[EMAIL PROTECTED]> wrote:
On Wed, Sep 3, 2008 at 6:53 PM, Anton Blanchard <[EMAIL PROTECTED]> wrote:
The only thing lwsync wont order is a store followed by a load. Since
the lwsync will always be paired with a store (th
David Edelsohn wrote:
> On Wed, Sep 3, 2008 at 6:53 PM, Anton Blanchard <[EMAIL PROTECTED]> wrote:
>> The only thing lwsync wont order is a store followed by a load. Since
>> the lwsync will always be paired with a store (the stwcx), we will order
>> all accesses before it and provide a release bar
Hi David,
> My one other concern is developers using the builtins for applications on
> embedded PowerPC processors. lwsync will not order accesses to device
> memory space, AFAICT. I do not know if developers would rely on GCC builtins
> in that context and assume it implements the correct se
On Wed, Sep 3, 2008 at 6:09 PM, David Edelsohn <[EMAIL PROTECTED]> wrote:
> On Wed, Sep 3, 2008 at 6:53 PM, Anton Blanchard <[EMAIL PROTECTED]> wrote:
>> The only thing lwsync wont order is a store followed by a load. Since
>> the lwsync will always be paired with a store (the stwcx), we will order
On Wed, Sep 3, 2008 at 6:53 PM, Anton Blanchard <[EMAIL PROTECTED]> wrote:
> The only thing lwsync wont order is a store followed by a load. Since
> the lwsync will always be paired with a store (the stwcx), we will order
> all accesses before it and provide a release barrier.
Anton,
My one other
Hi Richard,
>> I noticed that sync_lock_release uses lwsync if available but every other
>> sync_* builtin uses a heavyweight sync. eg:
>
> Every other sync builtin has full-barrier semantics. AFAIK, isync is
> correct.
I think we can change the sync to an lwsync and still maintain full
barri
Anton Blanchard wrote:
I noticed that sync_lock_release uses lwsync if available but every other
sync_* builtin uses a heavyweight sync. eg:
Every other sync builtin has full-barrier semantics. AFAIK, isync is
correct.
r~
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