On Thu, Aug 11, 2005 at 08:12:57AM +0800, Ling-hua Tseng wrote:
> I used the automata based pipeline description for my ports,
> I described the data latency time by `define_insn_reservation',
> and I'm trying to insert the "nop" in the hook
> TARGET_MACHINE_DEPENDENT_REORG.
It is possible to emi
Ling-hua Tseng wrote:
> I'm porting gcc 4.0.1 to a new VLIW architecture.
> Some of its function units doesn't have internal hardware pipeline
> forwarding,
> so I need to insert "nop" instructions in order to resovle the data
> hazard.
>
> I used the automata based pipeline description for my por
essage -
From: "Richard Sandiford" <[EMAIL PROTECTED]>
To: "Ling-hua Tseng" <[EMAIL PROTECTED]>
Cc:
Sent: Thursday, August 11, 2005 6:49 PM
Subject: Re: Question of the DFA scheduler
"Ling-hua Tseng" <[EMAIL PROTECTED]> writes:
The destination ope
"Ling-hua Tseng" <[EMAIL PROTECTED]> writes:
> The destination operand of the `sub' instruction, d0, will be written
> back in the 4th cycle, and the instruction `max' will use it as source
> operand (i.e., there is a true data dependency).
>
> I figured out that the state_transition() returns -1 w
I'm porting gcc 4.0.1 to a new VLIW architecture.
Some of its function units doesn't have internal hardware pipeline forwarding,
so I need to insert "nop" instructions in order to resovle the data hazard.
I used the automata based pipeline description for my ports,
I described the data latency ti
