Ling-hua Tseng wrote: > I'm porting gcc 4.0.1 to a new VLIW architecture. > Some of its function units doesn't have internal hardware pipeline > forwarding, > so I need to insert "nop" instructions in order to resovle the data > hazard. > > I used the automata based pipeline description for my ports, > I described the data latency time by `define_insn_reservation', > and I'm trying to insert the "nop" in the hook > TARGET_MACHINE_DEPENDENT_REORG. > > The implementation of this hook is simple. > I just run the DFA scheduler again manually, > and I just let the insns to be issued as well as 2nd sched pass. > > I figured out that the state_transition() returns -1 when I issuing > the `max' instruction, > and I figured out it only returns > 0 when "hardware structural > hazard" occured. > > Are there any solutions for me to insert 4 nops between the 2 insns?
In the past, when working on such machines (MIPS, possibly the FR-V, and doing the planning for a VLIW machine where the contract fell through), I couldn't guarantee that the scheduler would run. Even if it ran, there was always the possibility that something else after the scheduler rearranged things. Generally my solution was to make sure the assembler would put in the NOPs if needed (and also have the assembler set the stop bits, etc. after the compiler did its best to fill the VLIW buckets).
