RE: Modeling predicate registers with more than one bit

2013-03-28 Thread Paulo Matos
> -Original Message- > From: Hans-Peter Nilsson [mailto:h...@bitrange.com] > Sent: 26 March 2013 17:43 > To: Paulo Matos > Cc: gcc@gcc.gnu.org > Subject: RE: Modeling predicate registers with more than one bit > > Unfortunately undocumented, but UTSL, for exampl

RE: Modeling predicate registers with more than one bit

2013-03-28 Thread Paulo Matos
> -Original Message- > From: Hans-Peter Nilsson [mailto:h...@bitrange.com] > Sent: 26 March 2013 17:43 > To: Paulo Matos > Cc: gcc@gcc.gnu.org > Subject: RE: Modeling predicate registers with more than one bit > > > > What do you mean by source modes? &g

RE: Modeling predicate registers with more than one bit

2013-03-26 Thread Hans-Peter Nilsson
On Tue, 26 Mar 2013, Paulo Matos wrote: > > -Original Message- > > From: Hans-Peter Nilsson [mailto:h...@bitrange.com] > > Sent: 05 March 2013 01:45 > > To: Paulo Matos > > Cc: gcc@gcc.gnu.org > > Subject: Re: Modeling predicate registers with more tha

RE: Modeling predicate registers with more than one bit

2013-03-26 Thread Paulo Matos
Hi, sorry for the delay of this reply but just returned from paternity leave. > -Original Message- > From: Hans-Peter Nilsson [mailto:h...@bitrange.com] > Sent: 05 March 2013 01:45 > To: Paulo Matos > Cc: gcc@gcc.gnu.org > Subject: Re: Modeling predicate registers with

RE: Modeling predicate registers with more than one bit

2013-03-26 Thread Paulo Matos
Hi, sorry for the delay of this reply but just returned from paternity leave. > > Have you had a look at the SH backend? SH cores have a "T Bit" > register, which functions as carry bit, over/underflow, comparison > result and branch condition register. In the SH backend it's treated as > a fix

Re: Modeling predicate registers with more than one bit

2013-03-04 Thread Hans-Peter Nilsson
On Thu, 28 Feb 2013, Paulo Matos wrote: > Hello, > > I am looking at how to correctly model in GCC predicate > registers that have more than one bit and the value set into to > the predicate register after a comparison depends on the size > of the comparison. > > I have looked into GCC backends but

Re: Modeling predicate registers with more than one bit

2013-03-02 Thread Oleg Endo
Hi, On Thu, 2013-02-28 at 11:10 +, Paulo Matos wrote: > Hello, > > I am looking at how to correctly model in GCC predicate registers that > have more than one bit and the value set into to the predicate register > after a comparison depends on the size of the comparison. > > I have looked in

Modeling predicate registers with more than one bit

2013-02-28 Thread Paulo Matos
Hello, I am looking at how to correctly model in GCC predicate registers that have more than one bit and the value set into to the predicate register after a comparison depends on the size of the comparison. I have looked into GCC backends but haven't really found any backend with a similar co