Re: Question about Machine Description

2010-06-15 Thread yazdanbakhsh
Actually, I'm working with simplescalar and it only supports gcc 2.9. -- View this message in context: http://old.nabble.com/Question-about-Machine-Description-tp1026428p28890565.html Sent from the gcc - Dev mailing list archive at Nabble.com.

Re: Question about Machine Description

2010-06-15 Thread yazdanbakhsh
Hi, I'm working with GCC 2.7. I think, It doesn't support define_predict. I define a c function in the mips.c file and add the following lines: int new_arith_operand (op, mode) rtx op; enum machine_mode mode; { if (GET_CODE (op) == CONST_INT) if(NEW_INT_UNSIGNED (op))

Re: Question about Machine Description

2010-06-15 Thread yazdanbakhsh
Hi, I want to limit the size of immediate field of some operation. For example somehow modify the machine description that the compiler supports only 0-255 for immediate operand. I also want to change the compiler to the 2-address operand. do you have any ideas? I just need some hint Best Regard

Re: Question about Machine Description

2010-06-05 Thread yazdanbakhsh
I did what you said, and the same error happened :( -- View this message in context: http://old.nabble.com/Question-about-Machine-Description-tp1026428p28790996.html Sent from the gcc - Dev mailing list archive at Nabble.com.

Re: Question about Machine Description

2010-06-05 Thread yazdanbakhsh
Hi, I want to exclude all immediate or instruction. I did this by the following define_insn /-- (define_insn "iorsi3" [(set (match_operand:SI 0 "register_operand" "=d,d") (ior:SI (match_operand:SI 1 "uns_arith

Re: Question about Machine Description

2010-06-02 Thread yazdanbakhsh
Hi, I want to exclude XORI from the instruction set of a cpu. I deleted all the XORI in md file. But when I compiled my program some XORI operation still exist. how this would be possible? -- View this message in context: http://old.nabble.com/Question-about-Machine-Description-tp1026428p287633

Re: Question about Machine Description

2010-05-09 Thread yazdanbakhsh
Hi, I found an strategy that would solve my problem. I changed .md with the following paragraph... (define_expand "blt" [(set (pc) (if_then_else (lt:SI (match_dup 1)

Re: Question about Machine Description

2010-05-06 Thread yazdanbakhsh
gen_conditional_le(rtx comp1, rtx comp2, rtx final_label) { printf("my operation called"); emit_insn(gen_ble1(comp1, comp2, final_label)); return TRUE; } *** but it didn't work... I want the following C code is compiled to just one inst

Re: Question about Machine Description

2010-05-06 Thread yazdanbakhsh
To add "ble" I changed "equality_op" in the header file to have "ble" as a acceptable operation.but it didn't work. Do u have any idea? I also saw some functions in the assembler that hand

Re: Question about Machine Description

2010-05-04 Thread yazdanbakhsh
I have read all the documents, and changed some lines but nothing happened :( Ian Lance Taylor-3 wrote: > > yazdanbakhsh writes: > >> I want to change instruction blez to ble. ble compare two registers and >> jump >> to the target address if the condition is tr

Re: Question about Machine Description

2010-05-04 Thread yazdanbakhsh
Hi, I want to change instruction blez to ble. ble compare two registers and jump to the target address if the condition is true. thanks in advance, Ian Lance Taylor-3 wrote: > > yazdanbakhsh writes: > >> Please assume I'm working with the MIPS. There is a little diffe

Re: Question about Machine Description

2010-05-03 Thread yazdanbakhsh
VOIDmode, (XINT (operands[2], 0))& 0x1f); operands[4] = gen_rtx (REG, VOIDmode, 0); return \"add\\t%3,%4,%z2;srl\\t%0,%1,%3\"; } else return \"srl\\t%0,%1,%2\"; }" [(set_attr "type" "arith") (set_attr "mode" "SI

Re: Question about Machine Description

2010-05-03 Thread yazdanbakhsh
(set_attr "mode" "SI") (set_attr "length" "1")]) Is there any other solutions? Best Regards, yazdanbakhsh wrote: > > Is it any way that we can chat? > I'm

Re: Question about Machine Description

2010-05-03 Thread yazdanbakhsh
Is it any way that we can chat? I'm working on my thesis project and a paper. I appreciate it if you would cooperate in this project. I have gmail Id "amir.yazdanbakhsh" and also skype "amir.yazdanbakhsh" best regards, yazdanbakhsh wrote: > > Hi, > > Pl

Re: Question about Machine Description

2010-05-03 Thread yazdanbakhsh
structions: sll %2,%2,5 changed to: addi %3,%0,5 sllv %2,%2,%3 thanks in advance Ian Lance Taylor-3 wrote: > > yazdanbakhsh writes: > >> I'm working on my a gcc compiler for my own written processor with the >> help >> of SimpleScalar. >> I want to remo

Re: Question about Machine Description

2010-05-03 Thread yazdanbakhsh
Dear all, I'm working on my a gcc compiler for my own written processor with the help of SimpleScalar. I want to remove "srav/slav" (immediate arithmetic shift) from the instruction set. I explore ss.md file but I didn't see any define_ins for the mentioned instructions, but they are used in othe