What are the optimizations that contribute to ~70% improvement on SPEC06 hmmer benchmark?

Recently I happen to notice that there is more than 70% performance improvement for SPEC06 hmmer benchmark from Linaro GCC 5.2-2015.11-2 to GCC 10.0 on ARM platforms. I did some quick searching and think loop distributio

POINTER_PLUS_EXPR Vs. PLUS_EXPR

I hit a problem about the 2 operands of a addr-plus instruction. My instruction is special because it is not commutative and requries address be the 2nd operand and the offset in the 3rd one. But my port generates PLUS_EXPR instead of POINTER_PLUS_EXPR and finally mistakenly switches the order

incorrect redundency of loading subreg of physical regs

Hello, I cannot figure out how the entire mechaism works in my case. I work on 4.5.2. e.g. I have 64 registers. But sometimes I need to 2 kinds of instructions (Xand Y)to fill these 64-bit registers. X fills the low 32 bit and Y fills the high 32 bit. I try to use subreg for the RTL