Hello,
I cannot figure out how the entire mechaism works in my case. I work on
4.5.2.
e.g. I have 64 registers. But sometimes I need to 2 kinds of instructions
(Xand Y)to fill these 64-bit registers. X fills the low 32 bit and Y fills the
high 32 bit. I try to use subreg for the RTL patterns of X and Y.
insn1 (set (subreg:SI (reg:DI) 0) (reg:SI)) <X rtl setting the
low 32 bit>
insn2 (set (subreg:SI (reg:DI) 4) (reg:SI)) < Y rtl setting the high
32 bit>
the problem is that register allocation seems to allocate the same register
to both insns, and after register allocation (or more precisely postreload), I
lose the subreg info in rtl. This makes the later phases think that insn2 kills
insn1 and then insn1 is deleted.
Can you give me some suggestion how to solve this problem? I can think of
many possible solutions but I don't know what is the better one.
how to let the compiler know that insn2 and insn1 write to the different parts
of the same reg and insn1 should be retained?
gcc internal says that use of subreg for physical regs are not encouraged. why?
is that the reason that subreg is removed after IRA?
if I use subreg of physical reg, will the phases avoid the incorrect code
elimination problem? ordo I need some extra work to teach the later phases to
work on subreg of physical regs?
any example about supporting subreg of physical regs?
thanks
