Help with target hook TARGET_INIT_LIBFUNCS

Hello All, I need some clarification regarding the target hook "TARGET_INIT_LIBFUNCS". I wanted to replace all the instances of 'memcpy' with '__memcpy'. For that, i have used the above mentioned target hook with the code as shown below: memcpy_libfunc = init_one_libfunc ("__memcpy"); I can see

Effect of 'register' keyword on debug info

Hello All, I came across this issue while working with PowerPC GCC tool chain v4.5.2 for e500mc(64bit)/e5500. Test case compiled with '-O0 -g'. /** Test Case / 1: int main() 2: { 3: int i=0; 4: 5: register float f1 = 55.77f; 6: reg

Help with 'ev_sl' PowerPC SPE Intrinsic

Hello All, I need some help regarding implementation of one of the SPE instructions. I am planning to implement 'evsl' instrinsic. d = __ev_sl (a,b) : The value in parameter 'a' is shifted left by no. of  bit positions specified in parameter 'b', filling vacated bit positions with zeros, and the

Help with generating 'memset' for loop initialization

Hello All, With the code given below, i expected the ppc compiler (e500mc v4.6.2) to generate 'memset' zero call for loop initialization (at '-O3'), but it generates a loop. Case:1 int a[18], b[18]; foo () { int i; for (i=0; i < 18; i++) a[i] = 0; } Also based on the '-ftree-loop-

Help with RTL loop invariant motion

Hi, With PowerPC GCC tool chain v4.6.1 (for e500mc), i have a test case which shows regression at -O3 with the patch [IRA-based register pressure calculation for RTL loop invariant motion] listed below: http://gcc.gnu.org/ml/gcc-patches/2009-09/msg01889.html Reduced Test Case: /*

mno-eabi option on powerpc-elf

Hello All, I am working with powerpc-elf tool chain v4.5.2 (with newlib). I need some clarification regarding the -mno-eabi option. From the GCC docs, this option means that the tool chain does not adhere to EABI. -mno-eabi: On System V.4 and embedded PowerPC systems do not adhere to th

Re: clobber CC for arithmetic instructions

On Sat, Aug 13, 2011 at 5:20 AM, Hans-Peter Nilsson wrote: > On Fri, 12 Aug 2011, Rohit Arul Raj wrote: >> On Fri, Aug 12, 2011 at 12:17 PM, Rohit Arul Raj >> wrote: >> > Hello All, >> > >> > I am working on 32-bit target with gcc 4.6.0. I need some hel

Re: clobber CC for arithmetic instructions

On Fri, Aug 12, 2011 at 12:17 PM, Rohit Arul Raj wrote: > Hello All, > > I am working on 32-bit target with gcc 4.6.0. I need some help on the > following: > > For my target, If my CCR register is set, all the arithmetic > instructions update the CC register else the don&#x

clobber CC for arithmetic instructions

Hello All, I am working on 32-bit target with gcc 4.6.0. I need some help on the following: For my target, If my CCR register is set, all the arithmetic instructions update the CC register else the don't update. Setting the CCR register is done by a built-in function. Can any one help how to pro

Re: Help with PPC Relocation options

On Mon, Aug 1, 2011 at 12:12 PM, Rohit Arul Raj wrote: > Hello All, > > I compiled a simple 1.c file with -mpcu=e500mc64 option and while > trying to create a relocatable, i am getting the following error: > > $powerpc-elf-ld.exe -static -r 1.o > powerpc-elf-ld.exe: Rel

Help with PPC Relocation options

Hello All, I compiled a simple 1.c file with -mpcu=e500mc64 option and while trying to create a relocatable, i am getting the following error: $powerpc-elf-ld.exe -static -r 1.o powerpc-elf-ld.exe: Relocatable linking with relocations from format elf64-powerpc (1.o) to format elf32-powerpc (a.out

Re: [patches] Re: Cross compiler build instructions - PowerPC

On Mon, Jul 18, 2011 at 8:10 PM, Khem Raj wrote: > On Mon, Jul 18, 2011 at 4:58 AM, Rohit Arul Raj > wrote: >> >> Is this expected behavior? >> >> > yes > Hello Khem, 1. Got in to another error while doing make [make csu/subdir_lib] of "eglibc default

Re: [patches] Re: Cross compiler build instructions - PowerPC

On Fri, Jul 8, 2011 at 8:03 PM, Khem Raj wrote: > On Fri, Jul 8, 2011 at 1:08 AM, Rohit Arul Raj wrote: >> On Wed, Mar 23, 2011 at 5:55 PM, Joseph S. Myers >> wrote: >>> On Wed, 23 Mar 2011, Rohit Arul Raj wrote: >>> >>>> Hello All, >>>&g

Need clarification for PPC floating Point compiler options

Hello All, I have a few clarification with the PPC floating point compiler options. I am working with v4.4.1 (e500mc) but i think it applies to 4.6 as well. 1. -msingle-float: With this option, i get a compiler warning: "-msingle-float option equivalent to -mhard-float" which means both the sin

Re: Cross compiler build instructions - PowerPC

On Wed, Mar 23, 2011 at 5:55 PM, Joseph S. Myers wrote: > On Wed, 23 Mar 2011, Rohit Arul Raj wrote: > >> Hello All, >> >> I have been trying to build a cross compiler (for PowerPC) on x86_64 >> linux host. I followed the build procedure given in the link belo

[Take 2] Help with specifying processor pipeline GCC4.5.1

Hello All, I need some help with setting the pipeline hazard recognizer (I am working with gcc v4.5.1 for a private target). A brief pipeline description of my target: We have 2 functional units        1) For multiplication.        2) For All other instructions. a) Multiply instructions are not

Help with specifying processor pipeline GCC4.5.1

Hello All, I need some help with setting the pipeline hazard recognizer (I am working with gcc v4.5.1 for a private target). A brief pipeline description of my target: We have 2 functional units 1) For multiplication. 2) For All other instructions. a) Multiply instructions are n

Cross compiler build instructions - PowerPC

Hello All, I have been trying to build a cross compiler (for PowerPC) on x86_64 linux host. I followed the build procedure given in the link below: http://www.eglibc.org/archives/patches/msg00078.html The build instructions in the link works perfectly fine with the following revisions: GCC v4.1.

Re: Clarification on PowerPC64 Linux ABI

Hello Andrew, On Tue, Mar 22, 2011 at 11:41 AM, Andrew Pinski wrote: > On Mon, Mar 21, 2011 at 10:50 PM, Rohit Arul Raj > wrote: >> Hello All, >> >> I have a question regarding PowerPC64 bit ABI. Since GCC generates FP >> instructions for Non FP code, i

Clarification on PowerPC64 Linux ABI

Hello All, I have a question regarding PowerPC64 bit ABI. Since GCC generates FP instructions for Non FP code, i was running in to issues with applications having interrupts (i have seen some threads with people complaining about this). So the other option to resolve this was to build the entire a

Re: Void Pointer Alignment - GCC 3.4.6

On Thu, Jan 29, 2009 at 11:39 AM, Ian Lance Taylor wrote: > Rohit Arul Raj writes: > >> I am working with GCC 3.4.6 for a private target. The Alignment of all >> pointer variables in my target is supposed to be 16bits. But it seems >> that for void pointers, the alignmen

Void Pointer Alignment - GCC 3.4.6

Hi All, I am working with GCC 3.4.6 for a private target. The Alignment of all pointer variables in my target is supposed to be 16bits. But it seems that for void pointers, the alignment by default is taken as 8 bits. I have defined the following macros to get the desired alignment but still it do

Re: Enabling gcc optimization pass

On 7/26/07, Basile STARYNKEVITCH <[EMAIL PROTECTED]> wrote: Rohit Arul Raj wrote: > Hi all, > > I have 3 functions- fun1, fun2, fun3 in the same source file and i > want to enable one or any of the gcc optimization pass to code in fun2 > only, > > 1. Is it possi

Enabling gcc optimization pass

Hi all, I have 3 functions- fun1, fun2, fun3 in the same source file and i want to enable one or any of the gcc optimization pass to code in fun2 only, 1. Is it possible to implement this using function attributes or #pragms's? 2. What will be its side-effects? Regards, Rohit

promoting function arguments - GCC 4.1.1

Hi all, I have added two new data types for GCC 4.1.1 (for private target). They are fixed and accum. Variants of fixed are, short fixed (1 byte) fixed (4 byte) long fixed (8 byte). While passing short fixed as a function argument, i want to promote it to fixed type. I tried using PROMOTE_FUNC

Debug info generation (target: Fr30) - GCC 4.1.1

Hi all, I need some clarification regarding the debug info generated for var_arg function. Target: fr30 Compiler version : v4.1.1 binutils : v2.16 newlib : v1.14.0 <

Target Hook not getting recognized - GCC 4.1.1

Hi all, I have defined a target hook TARGET_EXPAND_BUILTIN_SAVEREGS (GCC 4.1.1) as an alternative to TARGET_SETUP_INCOMING_VARARGS so as to code ___builtin_saveregs as per my target. But this target hook is not getting recognized. Is there anything else this target hook depends on? Regards, Roh

Function prologue - Debug info for frame related instruction

Hi all, I am having some issues while generating debug info for frame related instructions in fuction_prologue (for GCC 4.1.1) for a private target. (fr30 & cris backend also showed similiar error while dumping the debug info). For my target, while generating the stack frame for local variable,

Doubt regarding dwarf info generated for var_args function

Hi all, I need some clarification regarding the debug information generated for var_args function. I am working with GCC 4.1.1. In my target, var_args registers are saved in stack frame during function prologue (similiar to fr30). ### sample program ### #include int fun(const char *temp,...)

Improper Frame Description Entry - DWARF2 debug info

Hi all, I am working with GCC 4.1.1 for a private target. For the sample program given below, frame description entry generated is not proper. PROGRAM # #include void fun(); int main() { fun(); return 0; } void fun() { int a; int b, c; return; } ### Re

Difference in DWARF Info generated by GCC 3.4.6 and GCC 4.1.1

_AT_name: raj DW_AT_decl_file : 10 DW_AT_decl_line : 6 DW_AT_type: DW_AT_location: 2 byte block: 91 0 (DW_OP_fbreg: 0) ### Can any one point out what is going wrong here? The above program is working properly with GCC 3.4.6. R

Difference in DWARF Info generated by GCC 3.4.6 and GCC 4.1.1

Hello all, I ran a sample program with gcc 3.4.6 and gcc 4.1.1 compiler. I need some clarifications regarding the DWARFinfo generated by these 2 compilers. Sample Program: #include int fun(const char*, ...); /* Variadic function */ int fun(const char *raj,...) { return 9; } int main() { f

Re: Constrain not satisfied - floating point insns.

tch_scratch:SF 2 "=X,X,X,&d,X,X")) ] But i am getting: error: insn does not satisfy its constraints: Is there any other way to generate a temporary register other than using gen_reg_RTX in define expand and emitting the corresponding mov patterns? Regards, Rohit On 3/15/07, Jim

DWARF Formats - GCC 4.1.1

Hi all, Can any one suggest a right place to find the differences between the DWARF formats in gcc compiler versions 3.4.6 and 4.1.1? Regards, Rohit

Adding Profiling support - GCC 4.1.1

Hi all, I need to implement profiling support for my backend (GCC 4.1.1). There is only limited information in GCC Internals to define the following macros (FUNCTION_PROFILER, PROFILE_HOOK ,NO_PROFILE_COUNTERS & PROFILE_BEFORE_PROLOGUE) to add profiling support. I need to know the following detai

Re: Constrain not satisfied - floating point insns.

) ] But for moving an immediate value, compiler should use a data register but it is using a floating point register. Still i get an ICE for constrain not satisfied. Regards, Rohit On 3/15/07, Jim Wilson <[EMAIL PROTECTED]> wrote: Rohit Arul Raj wrote: > (define_insn "

Constrain not satisfied - floating point insns.

Hi all, I am currently adding floating point support for a private target (for GCC 4.1.1). i am having some problems with register allocation. In SF mode, i have specified to the compiler that it can use both floating point registers as well as data registers. For all move instructions in SF mod

RTL insns getting deleted

Hi all, I am working with GCC 4.1.1. I had to set some target dependent flags before emitting any arithmetic instruction for floating point operation. e.g. before add operation, i need to set some flags. For that in define expand i used 1. emit_insn to set the flag (moving data to special regis

Floating point insn dependency - GCC 4.1.1

Hi all, I am adding floating point support to GCC 4.1.1 for a private target. My machine can issue (1) Two instructions, [one integer insns (16 bit) + one floating point insn (16 bit) ]or (2) one 32 bit integer insn. For case (1) , Since both instructions are executed parallely, there is no dep

Controlling Register Allocation - GCC 4.1.1

Hi all, I am having some problem while allocating floating point registers in GCC 4.1.1. As of now my target does not have floating point registers. To support floating point operations, i added 8 floating point registers that i want the gcc to allocate only when the mode is MODE_FLOAT. I have

About STACK ALIGNMENT

Hello all, 1. How do i get the stack alignment size of a particular target? Does #define STACK_BOUNDARY 32 serve this purpose? 2. Is it possible to override the STACK Alignment in ld file using ALIGN()? 3. Difference between stack alignment and data alignment? Regards, Rohit

Saving the Tree declaration node in GCC 4.1.1.

Hi all, I am working with GCC 4.1.1. I need some information on the following Before emitting a call instruction, i need to check for function attributes. Based on that i need to emit the corresponding call instruction. For that, before emitting the call instruction, i check for the attributes o

Re: Getting declaration tree node using func. name

On 12/19/06, Ferad Zyulkyarov <[EMAIL PROTECTED]> wrote: tree fn_decl; tree fn_id; fn_id = get_identifier("test_fn_call"); fn_decl = lookup_name(fn_id); /* returns you a pointer to the function declaration tree */ Hope this is what you are looking for. On 12/19/06, Rohit

Error due to function call while checking fn attributes

Hi all, I am working with gcc 4.1.1. I have a target dependent function attribute to check the function mode. Before emitting the call instruction, i just want to check the function attribute and depending on that i need to emit the call instruction. After making the modifications, while buildi

Getting declaration tree node using func. name

Hi all, I am working with GCC 4.1.1. By using the function name, is it possible to get the declaration tree node of that function. e.g. using maybe_get_identifier("name"), i get the identifier node. similarly are there any functions or macros available to get the declaration tree node. Regards

Re: 32 bit jump instruction.

On 06 Dec 2006 23:13:35 -0800, Ian Lance Taylor <[EMAIL PROTECTED]> wrote: David Daney <[EMAIL PROTECTED]> writes: > > I am working on a private target where jump instruction patterns are > > similiar to this > > > > jmp <24 bit offset> > > jmp for 32 bit offsets > > > > if my offset is greater

Accessing CVS

Hi all, How to download GCC projects from CVS For e.g.i tried this one cvs -d :pserver:[EMAIL PROTECTED]:/cvsroot/gcc checkout -P /branches./fixed-point But it did not work. Regards, Rohit

Adding New Function Attributes

Hi all, In case i have to support a new function attribute specifically for my target, 1. Do i have to modify the GCC source base like adding a new flag in tree_function_decl(tree.h), adding a new handler to set the flag in c-common.h. or can i do it from the backend itself. 2. Any documentatio

32 bit jump instruction.

Hi all, I am working on a private target where jump instruction patterns are similiar to this jmp <24 bit offset> jmp for 32 bit offsets if my offset is greater than 24 bits, then i have to move the offset to an address register. But inside the branch instruction (in md file), i am not able to

Invoking static library automatically

Hi all, I have built a static runtime library and i want the linker to access it automatically without having to pass it explicitly. Are there any environmental variables available to make this happen? Regards, Rohit

Abt RTL expression

Hi all, Can any one get me the information/implementation of below mentioned functions? 1. operands[0] = gen_rtx_REG (SImode,REGNO (set_dest)); 2. operands[0] = gen_highpart (SImode, set_dest); Are both functionalities similiar if i use the above functions to get the 32 bit word from a 64 bit

Re: Abt RTL expression - combining instruction

. What are the other factors that i have to take into consideration while combining a compare and branch instruction. Regards, Rohit On 08 Nov 2006 07:00:29 -0800, Ian Lance Taylor <[EMAIL PROTECTED]> wrote: "Rohit Arul Raj" <[EMAIL PROTECTED]&g

Abt RTL expression

Hello all, While going through the RTL dumps, I noticed a few things which i need to get clarified. Below is the extract, in which i get the doubt. (insn 106 36 107 6 (set (reg:SI 13 a5) (const_int -20 [0xffec])) 17 {movsi_short_const} (nil) (nil)) (insn 107 106 108 6 (parallel [

Re: Abt RTL expression - combining instruction

if (h >= 0) p = 0; Then it matches the seperate compare and branch instructions and not cbranch instruction. Can anyone point out where i am going wrong? Regards, Rohit On 06 Nov 2006 23:15:04 -0800, Ian Lance Taylor <[EMAIL PROTECTED]> wrote: "Rohit Arul Raj" <[EMAIL PROTE

Abt RTL expression - combining instruction

Hi all, I am trying to combine the compare and branch instruction. But my instructions are not getting generated as my operands are not matched properly. Previously for individual compare instructions, i had operand 0 - Register operand operand 1 - Non memory operand. For branch instruction, op

Abt RTL expression - Optimization

Hi All, GCC 4.1.1 This small bit of code from one of the test suites ( gcc.c-torture/execute/20020611-1.c)worked fine with all optimization except size optimization -Os. unsigned int p; unsigned int n = 30; void x () { unsigned int h; h = n <= 30; // Line 1 if (h) p = 1; else p = 0;

Register Usage - RTL Expression

Hi all, I am working with GCC Cross compiler 4.1.1. I just some information regarding the following: 1. How does the life1 pass gets the register usage information from the gcse pass? 2. From which other passes and how, the information about registers used can be determined by looking at the RT

Re: Abt RTL expression - Optimization

<[EMAIL PROTECTED]> wrote: "Rohit Arul Raj" <[EMAIL PROTECTED]> writes: > > > This small bit of code worked fine with all optimization except Os. unsigned int p; > > > unsigned int n = 30; > > > void x () > > > { > >

Re: Abt RTL expression - Optimization

On 26 Oct 2006 22:02:04 -0700, Ian Lance Taylor <[EMAIL PROTECTED]> wrote: "Rohit Arul Raj" <[EMAIL PROTECTED]> writes: > This small bit of code worked fine with all optimization except Os. > > unsigned int n = 30; > void x () > { > unsigned int h; >

Abt RTL expression - Optimization

Hi all, I am working with a GCC Cross compiler version 4.1.1. This small bit of code worked fine with all optimization except Os. unsigned int n = 30; void x () { unsigned int h; h = n <= 30; // Line 1 if (h) p = 1; else p = 0; } when we tried to debug the emitted RTL instruction

Abt -fpic, -fPIC Option

Hi, I have built a cross-compiler for m68k-elf with GCC 4.1.1. I need to know the difference in implementations of -fpic and -fPIC for this particular target. can anyone help me out? Thanking you in advance, Rohit

Abt RTL expression - Optimization

Hi all, This small bit of code worked fine with all optimization except Os. unsigned int n = 30; void x () { unsigned int h; h = n <= 30; // Line 1 if (h) p = 1; else p = 0; } when we tried to debug the emitted RTL instruction for Os, it was found that RTL instruction for Li

Abt RTL expression

Hi all, I need some clarification in understanding the below mentioned RTL Expressions 1. (insn 11 10 12 0 gcc/testsuite/gcc.c-torture/execute/20020611-1.c:13 (parallel [ (set (reg/f:SI 13 a5 [28]) (symbol_ref:SI ("n") [flags 0x2] )) (clobber (reg:CC 21 cc))

Fwd: Migration of Cross Compiler from gcc 3.4.6 to gcc 4.1.1

Hi all, I am upgrading my cross-compiler from 3.4.6 to 4.1.1. It has built successfully. But while running the test suites, one of the errors that i was getting was due to the below mentioned file 20020611-1.c that too while optimizing for size Os. /* PR target/6997. Missing (set_attr "cc" "none

Migration of Cross Compiler from gcc 3.4.6 to gcc 4.1.1

Hi all, I am upgrading my cross-compiler from 3.4.6 to 4.1.1. It has built successfully. But while running the test suites, one of the errors that i was getting was due to the below mentioned file 20020611-1.c /* PR target/6997. Missing (set_attr "cc" "none") in sleu pattern in cris.md.

Migration of Cross Compiler from gcc 3.4.6 to gcc 4.1.1

Hi all, I am upgrading my cross-compiler from 3.4.6 to 4.1.1. It has built successfully. But while running the test suites, i am getting lots of run time errors during optimization tests (Mostly size optimization - Os). But the same code with same level of optimization works fine with 3.4.6. 1.

Upgrading a cross compiler from GCC 3.4.6 to 4.1.1

Hi all, I am upgrading a cross-compiler from gcc3.4.6 to gcc 4.1.1. i am getting some errors while trying to build the compiler. The way in which i am building the compiler is : $configure --target= --prefix=/usr/crossgcc/ --with-newlib --disable-libssp i am getting the following errors!! /ho

Upgrading a cross compiler from GCC 3.4.6 to 4.1.1

Hi all, I am upgrading a cross compiler from gcc 3.4.6 to gcc 4.1.1. i just want to confirm whether the poisoned macro FUNCTION_ARG_PASS_BY_REFERENCE in target.h is replaced by the target hook in target.c as TARGET_PASS_BY_REFERENCE. Is there any log file other than ChangeLog which keeps the l

Building a Cross compiler for Cold Fire

Hi all, i am trying to build a GCC Cross-compiler for Cold Fire on cygwin. The Source versions i am using are binutils 2.17 gcc 4.1.1 newlib 1.14 The way in which i am building the tool chain - build/install binutils: cd /binutil-2.17 ./configure --target=m68k-elf --prefix=/usr make make i

Porting PXE-GCC tool chain from GCC 3.2 to GCC 3.4.6

Hello Everyone!! I am trying to port GCC-PXE tool chain from GCC 3.2 to GCC 3.4.6. While building the PXE-GCCCross Compiler i am getting the following errors: ../../../gcc-3.4.6/gcc-3.4.6/gcc/config/pxe/pxe.c: In function `pxe_mark_machine_status': ../../../gcc-3.4.6/gcc-3.4.6/gcc/config/pxe/px

Re: Modifying the LABEL for functions emitted by the GCC Compiler

Rohit Arul Raj wrote: The gcc-coldfire compiler spits out the labels as it is in the assembly file (main, printf etc), where as the IDE compiler spits out the labels prefixed with a '_' (_main, _printf etc). Is there any way i can make gcc-coldfire compiler emit the lables pre

Modifying the LABEL for functions emitted by the GCC Compiler

Hello Everyone, I am trying to link the object file emitted by a Cross Compiler IDE with the GCC Coldfire Linker and its libraries. The Problem that i faced was: The gcc-coldfire compiler spits out the labels as it is in the assembly file (main, printf etc), where as the IDE compiler spits ou