Hi all,
I am currently adding floating point support for a private target (for
GCC 4.1.1). i am having some problems with register allocation.
In SF mode, i have specified to the compiler that it can use both
floating point registers as well as data registers. For all move
instructions in SF mode, i can use both these registers. But while
moving data from/to memory, i can use only floating point registers.
(define_expand "movsf"
[(set (match_operand:SF 0 "general_operand" "")
(match_operand:SF 1 "general_operand" ""))]
""
"
{
if (GET_CODE (operands[0]) == MEM) {
operands[1] = force_reg (SFmode, operands[1]);
})
(define_insn "movsf_store"
[(set (match_operand:SF 0 "memory_operand" "=m")
(match_operand:SF 1 "float_reg" "f"))]
""
"stf \\t%1, %0"
)
But if the compiler tries to move a data register to memory, i get
constraint not satisfied error (ICE).
1. Is there any way to prevent the compiler from using data registers.
2. As a work around, i did the following:
a) In define expand, i check whether the register is a data register.
b) If it is a data register, generate a callee saved register
(floating point register).
c) Emit a move insn from data register to floating pt register.
d) Change the second operand to floating point register so that my
define_insn pattern is matched properly.
Is it advisable to follow this method or is there a better way to
handle this problem?
Regards,
Rohit
