Re: Understanding uses of a statement and def-use chains

Hi I request you to help me understand the solution to my problem. Am I misunderstanding the data structures or is there something wrong with my examples? Thanks and Regards Rohit On Thu, Jul 9, 2015 at 5:59 PM, rohit bhatia wrote: > Hi > > I am implementing a GCC Pass as IPA_Pass b

Understanding uses of a statement and def-use chains

ee more issues in the Output above. I was hoping you could enlighten me if I am misinterpreting the data structures. I will be thankful for your help. Thanks and Regards Rohit Bhatia

Help with target hook TARGET_INIT_LIBFUNCS

p debug_rtx((&default_target_libfuncs)->x_libfunc_table[1]) (symbol_ref:SI ("__memcpy") [flags 0x41]) Am i missing any other details or is this not the right way to do this? Regards, Rohit

Effect of 'register' keyword on debug info

Debugger Output */ 5 register float f1 = 55.77f; (gdb) n 6 register double d1 = 22.99f; (gdb) n 8 while (i <= 100) (gdb) p f1 $5 = (gdb) p d1 $6 = 22.98771118164 // Regards, Rohit

Help with 'ev_sl' PowerPC SPE Intrinsic

ounts are carried by a "vector" of bytes, half-words, and words respectively, for uniformity can we consider 64-bit shift as similar, a "vector" of one shift amount? Thanks in advance. Regards, Rohit

Help with generating 'memset' for loop initialization

to update this conditional check for single loop (which is not split) also? or Is there any other place/pass where we can implement this. Regards, Rohit

Help with RTL loop invariant motion

on. 2) If not, the user should have control over the '-fira-loop-pressure' flag when passed explicitly. File: rs6000.c if (optimize >= 3 && global_init_p && !global_options_set.x_flag_ira_loop_pressure) flag_ira_loop_pressure = 1; Regards, Rohit

mno-eabi option on powerpc-elf

the Embedded Applications Binary Interface (eabi) which is a set of modifications to the System V.4 specifications. Does that mean if i use '-mno-eabi', it will adhere to System V.4 specs completely like the 'powerpc-linux' tool chain? Thanks, Rohit

Re: clobber CC for arithmetic instructions

On Sat, Aug 13, 2011 at 5:20 AM, Hans-Peter Nilsson wrote: > On Fri, 12 Aug 2011, Rohit Arul Raj wrote: >> On Fri, Aug 12, 2011 at 12:17 PM, Rohit Arul Raj >> wrote: >> > Hello All, >> > >> > I am working on 32-bit target with gcc 4.6.0. I need some hel

Re: clobber CC for arithmetic instructions

On Fri, Aug 12, 2011 at 12:17 PM, Rohit Arul Raj wrote: > Hello All, > > I am working on 32-bit target with gcc 4.6.0. I need some help on the > following: > > For my target, If my CCR register is set, all the arithmetic > instructions update the CC register else the don&#x

clobber CC for arithmetic instructions

ow to proceed with this? or any other target where a similar case has been implemented? Thanks, Rohit

Re: Help with PPC Relocation options

On Mon, Aug 1, 2011 at 12:12 PM, Rohit Arul Raj wrote: > Hello All, > > I compiled a simple 1.c file with -mpcu=e500mc64 option and while > trying to create a relocatable, i am getting the following error: > > $powerpc-elf-ld.exe -static -r 1.o > powerpc-elf-ld.exe: Rel

Help with PPC Relocation options

(a.out) is not supported $ powerpc-elf-ld.exe -static -r 1.o --oformat elf64-powerpc powerpc-elf-ld.exe: Relocatable linking with relocations from format elf64-powerpc (1.o) to format elf64-powerpc (a.out) is not supported Is relocatable linking not allowed for 64bit PPC? Regards, Rohit

Re: [patches] Re: Cross compiler build instructions - PowerPC

On Mon, Jul 18, 2011 at 8:10 PM, Khem Raj wrote: > On Mon, Jul 18, 2011 at 4:58 AM, Rohit Arul Raj > wrote: >> >> Is this expected behavior? >> >> > yes > Hello Khem, 1. Got in to another error while doing make [make csu/subdir_lib] of "eglibc default

Re: [patches] Re: Cross compiler build instructions - PowerPC

On Fri, Jul 8, 2011 at 8:03 PM, Khem Raj wrote: > On Fri, Jul 8, 2011 at 1:08 AM, Rohit Arul Raj wrote: >> On Wed, Mar 23, 2011 at 5:55 PM, Joseph S. Myers >> wrote: >>> On Wed, 23 Mar 2011, Rohit Arul Raj wrote: >>> >>>> Hello All, >>>&g

Need clarification for PPC floating Point compiler options

f this option? "-mfloat-gprs=" when passed "yes/single/double", they generate instructions like "efsmul" for a simple float multiplication statement which belong to SPE engine. Since e500mc doesn't support SPE instruction set and if "-mfloat-gprs=" enables them then should this option throw an warning/error? Regards, Rohit

Re: Cross compiler build instructions - PowerPC

On Wed, Mar 23, 2011 at 5:55 PM, Joseph S. Myers wrote: > On Wed, 23 Mar 2011, Rohit Arul Raj wrote: > >> Hello All, >> >> I have been trying to build a cross compiler (for PowerPC) on x86_64 >> linux host. I followed the build procedure given in the link belo

[Take 2] Help with specifying processor pipeline GCC4.5.1

t;) In case other independent instructions are not available to be scheduled for this latency, i will be inserting NOP's from the backend. But i want to make sure the correct info is passed to the scheduler. Any comments/suggestions? Thanks, Rohit

Help with specifying processor pipeline GCC4.5.1

uot; "mul") "mult*4") In case other independent instructions are not available to be scheduled for this latency, i will be inserting NOP's from the backend. But i want to make sure the correct info is passed to the scheduler. Any comments/suggestions? Thanks, Rohit

Cross compiler build instructions - PowerPC

CC but was not sure if this was the right way to do it. Do we have different build instructions other than the one mentioned in the link above to build the latest sources? Thanks, Rohit

Re: Clarification on PowerPC64 Linux ABI

Hello Andrew, On Tue, Mar 22, 2011 at 11:41 AM, Andrew Pinski wrote: > On Mon, Mar 21, 2011 at 10:50 PM, Rohit Arul Raj > wrote: >> Hello All, >> >> I have a question regarding PowerPC64 bit ABI. Since GCC generates FP >> instructions for Non FP code, i

Clarification on PowerPC64 Linux ABI

nd.net/binutils/ppc-docs/ppc-eabi-1995-01.pdf 1. Am i referring right documents? 2. Is there any restriction on '-msoft-float' ABI definition on 32bit Linux sys V ABI, 32-bit EABI, 64bit ABI? 3. If PPC linux kernels are built with '-msoft-float -m64' compiler option, is it reasonably safe to build the application with the same options? Thanks, Rohit

branches within C++ destructors

% call4 returned 100% It is not the part of actual code, why do we have it and what its significance in terms of branches . Can we omit it from the coverage?? Thanks, ROHIT

Re: Void Pointer Alignment - GCC 3.4.6

On Thu, Jan 29, 2009 at 11:39 AM, Ian Lance Taylor wrote: > Rohit Arul Raj writes: > >> I am working with GCC 3.4.6 for a private target. The Alignment of all >> pointer variables in my target is supposed to be 16bits. But it seems >> that for void pointers, the alignmen

Void Pointer Alignment - GCC 3.4.6

doesn't seem to work. #define Pmode HImode #define POINTER_SIZE 16 Are there any other macros that are supposed to be defined to get the preferred alignment or any other way of implementing this? Regards, Rohit

gcc 4.3.2 compilation failure on aix 5.3

orkaround to skip this. I do not really care what the output gcc will be capable off. it should just be able to compile itself. Its more of an i/o test in my setup. I can provide more information if required. -Rohit

gcc 4.3.2 compilation failure on aix 5.3

f an i/o test in my setup. I can provide more information if required. -Rohit

Re: Enabling gcc optimization pass

On 7/26/07, Basile STARYNKEVITCH <[EMAIL PROTECTED]> wrote: Rohit Arul Raj wrote: > Hi all, > > I have 3 functions- fun1, fun2, fun3 in the same source file and i > want to enable one or any of the gcc optimization pass to code in fun2 > only, > > 1. Is it possi

Enabling gcc optimization pass

Hi all, I have 3 functions- fun1, fun2, fun3 in the same source file and i want to enable one or any of the gcc optimization pass to code in fun2 only, 1. Is it possible to implement this using function attributes or #pragms's? 2. What will be its side-effects? Regards, Rohit

promoting function arguments - GCC 4.1.1

PROMOTE_FUNCTION_MODE. But it is not getting invoked. Is there any other target hook used for doing this? Regards, Rohit

Debug info generation (target: Fr30) - GCC 4.1.1

;>>> #include int fun(const char *name,...) { return 9; } int main() { fun("Rohit",4,5,6,7); return 0; } <<<<<<<<<<<<OBJDUMP >>>>>>>>>>>>>>> 00010110 : #include /* Variadic

Target Hook not getting recognized - GCC 4.1.1

, Rohit

Function prologue - Debug info for frame related instruction

e test program: int main() { int temp; char new[1<<17]; return 0; } 1. Is the REG NOTE provided for the dwarf code proper? 2. What is the reason for readelf error? Regards, Rohit

Doubt regarding dwarf info generated for var_args function

n address range 0x294 -0x296 is SP (Stack Pointer). But at that instant, it is not correct. The value of "temp" is in register D0 which gets stored in stack only when instruction at 0x29a is executed. Until then this value is undefined. Is it right? Is this the right behavior or am i missing something? Regards, Rohit

Improper Frame Description Entry - DWARF2 debug info

a=00(SP/t7) 0002: cfa=04(SP/t7) FP/t6=-4(cfa) 0004: cfa=04(FP/t6) FP/t6=-4(cfa) When looking at the dwarf dump, the starting frame address for function "fun" is given as < 0><0:0xc> ideally it should have been < 0><0x16:0x20> Any suggestions where to look at for these kinds of behavior? Regards, Rohit

Difference in DWARF Info generated by GCC 3.4.6 and GCC 4.1.1

_AT_name: raj DW_AT_decl_file : 10 DW_AT_decl_line : 6 DW_AT_type: DW_AT_location: 2 byte block: 91 0 (DW_OP_fbreg: 0) ####### Can any one point out what is going wrong here? The above program is working properly with GCC 3.4.6. R

Difference in DWARF Info generated by GCC 3.4.6 and GCC 4.1.1

and reg-no 15 is Stack Pointer) Is this the expected behavior? 2. For the variable, const char *raj, the DIE for 3.4.6 has the location mentioned as (fbreg + 4 [offset] ) whereas for 4.1.1, location is mentioned as (fbreg + 0). Any specific reason for this behavior in GCC 4.1.1 Regards, Rohit

Re: Constrain not satisfied - floating point insns.

tch_scratch:SF 2 "=X,X,X,&d,X,X")) ] But i am getting: error: insn does not satisfy its constraints: Is there any other way to generate a temporary register other than using gen_reg_RTX in define expand and emitting the corresponding mov patterns? Regards, Rohit On 3/15/07, Jim

DWARF Formats - GCC 4.1.1

Hi all, Can any one suggest a right place to find the differences between the DWARF formats in gcc compiler versions 3.4.6 and 4.1.1? Regards, Rohit

Adding Profiling support - GCC 4.1.1

s it customized for every backend? 3. Any other existing back-ends that support profiling. Thanks in advance. Regards, Rohit

Re: Constrain not satisfied - floating point insns.

) ] But for moving an immediate value, compiler should use a data register but it is using a floating point register. Still i get an ICE for constrain not satisfied. Regards, Rohit On 3/15/07, Jim Wilson <[EMAIL PROTECTED]> wrote: Rohit Arul Raj wrote: > (define_insn "

Constrain not satisfied - floating point insns.

r is a data register. b) If it is a data register, generate a callee saved register (floating point register). c) Emit a move insn from data register to floating pt register. d) Change the second operand to floating point register so that my define_insn pattern is matched properly. Is it advisable to follow this method or is there a better way to handle this problem? Regards, Rohit

RTL insns getting deleted

vance, Regards, Rohit.

Floating point insn dependency - GCC 4.1.1

backend that has this type of design. Any other suggestions? Kind Regards, Rohit

Controlling Register Allocation - GCC 4.1.1

sed out on anything? Can anyone point out where i am going wrong!! Thanking you in advance, Regards, Rohit

About STACK ALIGNMENT

Hello all, 1. How do i get the stack alignment size of a particular target? Does #define STACK_BOUNDARY 32 serve this purpose? 2. Is it possible to override the STACK Alignment in ld file using ALIGN()? 3. Difference between stack alignment and data alignment? Regards, Rohit

Saving the Tree declaration node in GCC 4.1.1.

function declaration nodes for further use? can any one suggest a workaround!! Thanks in advance, Regards, Rohit

Re: Getting declaration tree node using func. name

On 12/19/06, Ferad Zyulkyarov <[EMAIL PROTECTED]> wrote: tree fn_decl; tree fn_id; fn_id = get_identifier("test_fn_call"); fn_decl = lookup_name(fn_id); /* returns you a pointer to the function declaration tree */ Hope this is what you are looking for. On 12/19/06, Rohit

Error due to function call while checking fn attributes

building the compiler, i am getting the following errors: /home/rohit/TestPXE/BUILD/gcc-new4.1.1/./gcc/xgcc -B/home/rohit/TestPXE/BUILD/gcc-new4.1.1/./gcc/ -B/home/rohit/Z-MOD//bin/ -B/home/rohit/Z-MOD/lib/ -isystem /home/rohit/Z-MOD/include -isystem /home/rohit/Z-MOD/sys-include -O2 -O2 -g -O2

Getting declaration tree node using func. name

tree node. Regards, Rohit

Re: 32 bit jump instruction.

some callee-saved register ", is it to pick them randomly from an available set in CALL_USED_REGISTERS or a specific register. Ian Regards, Rohit

Accessing CVS

Hi all, How to download GCC projects from CVS For e.g.i tried this one cvs -d :pserver:[EMAIL PROTECTED]:/cvsroot/gcc checkout -P /branches./fixed-point But it did not work. Regards, Rohit

Adding New Function Attributes

change? Regards, Rohit

32 bit jump instruction.

t able to generate a pseudo register because the condition check for "no_new_pseudos " fails. Can any one suggest a way to overcome this? Regards, Rohit

Invoking static library automatically

Hi all, I have built a static runtime library and i want the linker to access it automatically without having to pass it explicitly. Are there any environmental variables available to make this happen? Regards, Rohit

Abt RTL expression

register? Regards, Rohit

Re: Abt RTL expression - combining instruction

all_type" "short") (const_int 8) (const_int 16) (set_attr "delay_type" "delayed") (set_attr "type" "compare,branch")] ) 1. Does attribute length affect the calculation of offset? 2

Abt RTL expression

)) 15 {movsi_load} (nil) if i am wrong, can anyone tell me what actually insn 108 means? Regards, Rohit

Re: Abt RTL expression - combining instruction

if (h >= 0) p = 0; Then it matches the seperate compare and branch instructions and not cbranch instruction. Can anyone point out where i am going wrong? Regards, Rohit On 06 Nov 2006 23:15:04 -0800, Ian Lance Taylor <[EMAIL PROTECTED]> wrote: "Rohit Arul Raj" <[EMAIL PROTE

Abt RTL expression - combining instruction

operands and operators while combining instruction? 2. How to check where my instruction matching goes wrong? regards Rohit --- Thanks for finally giving the complete program and the RTL. I think you said earlier that this is a private target, not a standard gcc

Abt RTL expression - Optimization

ar_reg""=d,d,r,r") (match_operand:SI 1 "immediate_operand" "L,n,n,i")) (clobber (reg:CC CC_REGNUM))] "" "* { Is there any other thing that i can do to overcome this error? Regards, Rohit

Register Usage - RTL Expression

RTL dump of the corresponding pass? 3. Any documentation regarding the above? Regards, Rohit

Re: Abt RTL expression - Optimization

(nil))) (insn 13 12 50 0 (set (reg:CC 21 cc) (compare:CC (reg:SI 29 [ n ]) (const_int 30 [0x1e]))) 68 {*cmpsi_internal} (nil) (nil)) 2. Any documentation on Code Hoisting Algorithm used by GCC 4.1.1? Regards, Rohit On 26 Oct 2006 22:30:43 -0700, Ian Lance Taylor

Re: Abt RTL expression - Optimization

On 26 Oct 2006 22:02:04 -0700, Ian Lance Taylor <[EMAIL PROTECTED]> wrote: "Rohit Arul Raj" <[EMAIL PROTECTED]> writes: > This small bit of code worked fine with all optimization except Os. > > unsigned int n = 30; > void x () > { > unsigned int h; >

Abt RTL expression - Optimization

optimization pass? 2. What does .life1 Life analysis pass do ? 3. What are the probable causes for the elimination of RTL code's (Compare & gtu) between the above mentioned passes? Thanking you in advance, Rohit

Abt -fpic, -fPIC Option

Hi, I have built a cross-compiler for m68k-elf with GCC 4.1.1. I need to know the difference in implementations of -fpic and -fPIC for this particular target. can anyone help me out? Thanking you in advance, Rohit

Abt RTL expression - Optimization

ct to local identifiers) controlled by any flag? 2. Is it possible to override this optimzation constraint? Thanking you in advance, Rohit

Abt RTL expression

t:REG_DEAD (reg/f:SI 13 a5 [28]) (expr_list:REG_EQUAL (mem/c/i:SI (symbol_ref:SI ("n") [flags 0x2] ) [2 n+0 S4 A32]) (nil a) what does this mean [orig:29 n ] [29] in the above expression? b) what does this mean [2 n+0 S4 A32] in the above expression? Thanking you in advance, Regards, Rohit

Fwd: Migration of Cross Compiler from gcc 3.4.6 to gcc 4.1.1

x (); if (p != 1 || k != 1) abort (); exit (0); } This bug was fixed previously. 1. Can i get more information on how the bug was fixed? 2. what does sleu pattern mean? Regards, Rohit

Migration of Cross Compiler from gcc 3.4.6 to gcc 4.1.1

Hi all, I am upgrading my cross-compiler from 3.4.6 to 4.1.1. It has built successfully. But while running the test suites, one of the errors that i was getting was due to the below mentioned file 20020611-1.c /* PR target/6997. Missing (set_attr "cc" "none") in sleu pattern in cris.md.

Migration of Cross Compiler from gcc 3.4.6 to gcc 4.1.1

? Regards, Rohit

Upgrading a cross compiler from GCC 3.4.6 to 4.1.1

** [all] Error 2 is there a way out of this? is the internal compiler error generated due to gcc_assert? Regards, Rohit

Upgrading a cross compiler from GCC 3.4.6 to 4.1.1

list of macros replaced. Regards, Rohit

Building a Cross compiler for Cold Fire

cannot generate output file" Can any one tell me what are the stable sources for building a GCC Cross compiler for Coldfire or are there any other steps to follow while installation. Is there any way out of it? Regards, Rohit

Porting PXE-GCC tool chain from GCC 3.2 to GCC 3.4.6

/../../gcc-3.4.6/gcc-3.4.6/gcc/config/pxe/pxe.c:1686: `free_machine_status' undeclared (first use in this function) make[1]: *** [pxe.o] Error 1 make[1]: Leaving directory `/home/rohit/PXE-Migration/buildpxe3.4/gcc/gcc

Re: Modifying the LABEL for functions emitted by the GCC Compiler

Rohit Arul Raj wrote: The gcc-coldfire compiler spits out the labels as it is in the assembly file (main, printf etc), where as the IDE compiler spits out the labels prefixed with a '_' (_main, _printf etc). Is there any way i can make gcc-coldfire compiler emit the lables pre

Modifying the LABEL for functions emitted by the GCC Compiler

out the labels prefixed with a '_' (_main, _printf etc). Is there any way i can make gcc-coldfire compiler emit the lables prefixed with an underscore (' _ ').Can anyone Help me OUT of this mess!!! Thanks in Advance, Rohit

Using gcc compiler on IXDP425 using eCos

Wi-Fi lan card that will fit in the PCI slot. The Wi-Fi lan card should be such that its drivers for linux should be open-source and freely available on the net. Can anyone suggest me a Wi-Fi lan card which fulfils my requirements? Any help would be appreciated. Thanks, ROHIT -- if u dont know i