Re: How can I add 256bits register file to a MIPS port?

2010-12-20 Thread Ian Lance Taylor
Liu writes: > I need add 256bits-register support for our MIPS-based > processor, so I add some codes. > When I build gcc and test it, get a error "unable to find a > register to spill in class 'XX_REGS'" > can you tell me how to add 256bits register file to a MIPS port? > > Tha

Question on ARM legitimate address for DImode

2010-12-20 Thread Jie Zhang
Hi, While working on a bug, I found some code in ARM port that I don't understand. In ARM_LEGITIMIZE_RELOAD_ADDRESS and arm_legitimize_address, we allow a very small offset for DImode addressing. In ARM_LEGITIMIZE_RELOAD_ADDRESS: if (MODE == DImode || (MODE == DFmode && TARGET_SOFT_FLOAT))

soft-fp/fixtfsi.c:44:3: warning: left shift count >= width of type

2010-12-20 Thread Jack Howarth
On x86_64-apple-darwin10, we see the warnings... /Users/howarth/darwin_objdir/./gcc/xgcc -B/Users/howarth/darwin_objdir/./gcc/ -B/Users/howarth/dist/x86_64-apple-darwin10.5.0/bin/ -B/Users/howarth/dist/x86_64-apple-darwin10.5.0/lib/ -isystem /Users/howarth/dist/x86_64-apple-darwin10.5.0/inclu

Re: cscope replacement

2010-12-20 Thread Arnaud Lacombe
Hi, On Mon, Dec 20, 2010 at 2:44 PM, Ian Lance Taylor wrote: > Perry Smith writes: > >> Is there a way to have gcc produce some type of intermediate file that >> could be used to generate a cscope like database.  (Perhaps a better >> way to phrase the question is 'which intermediate file, if any

How can I add 256bits register file to a MIPS port?

2010-12-20 Thread Liu
Hi all I need add 256bits-register support for our MIPS-based processor, so I add some codes. When I build gcc and test it, get a error "unable to find a register to spill in class 'XX_REGS'" can you tell me how to add 256bits register file to a MIPS port? Thanks! codes: gcc/con

[gimplefe] Mainline merge @168092

2010-12-20 Thread Diego Novillo
Bootstrapped and tested on x86_64. ChangeLog.gimplefe Merge with mainline rev 168092. * BASE-VER: Add -gimplefe suffix to version string. * DATESTAMP: Indicate latest trunk revision merged. gimple/ChangeLog * parser.h (gimple_parser): Remove field debug_p.

Re: cscope replacement

2010-12-20 Thread Ian Lance Taylor
Perry Smith writes: > Is there a way to have gcc produce some type of intermediate file that > could be used to generate a cscope like database. (Perhaps a better > way to phrase the question is 'which intermediate file, if any, could > be used') I have a few issues with cscope that I keep hopin

Re: Help with reloading

2010-12-20 Thread Jeff Law
On 12/20/10 07:33, Mohamed Shafi wrote: I didn't know that you could do that in TARGET_SECONDARY_RELOAD hook. Can you point me to some target that does this - figuring out what the destination is based on the source or vice versa. In my case only the address operand comes into TARGET_SECONDA

Re: Help with reloading

2010-12-20 Thread Mohamed Shafi
On 20 December 2010 19:30, Jeff Law wrote: > On 12/20/10 01:47, Mohamed Shafi wrote: >> >> >>> I think this is a case where you're going to need a secondary reload to >>> force the immediate into a register if the destination is a non-symbolic >>> MEM >>> or a pseudo without a hard reg and its equ

Re: Help with reloading

2010-12-20 Thread Jeff Law
On 12/20/10 01:47, Mohamed Shafi wrote: I think this is a case where you're going to need a secondary reload to force the immediate into a register if the destination is a non-symbolic MEM or a pseudo without a hard reg and its equivalent address is non-symbolic. I am not sure how i sho

Re: Is eliminate_regs_in_insn allowed to generate invalid instruction?

2010-12-20 Thread Ulrich Weigand
Bingfeng Mei wrote: > > -Original Message- > > This means that the RTL that is passed to your EXTRA_CONSTRAINT_STR > > implementation will still be the *original* un-reloaded address. > > And most likely, your back-end will then reject this address as > > not valid for your machine. > > T

Re: BImode is treated as normal byte-wide mode and causes bug.

2010-12-20 Thread Claudiu Zissulescu
Hi, Why don't you use a define_insn "zero_extendbisi2" which generates your conversion instruction. You can also use a define_insn_and_split if you have multiple instructions to generate. The define_insn_and_split should take place after reload is completed. Hence, you will avoid working on subreg

RE: Is eliminate_regs_in_insn allowed to generate invalid instruction?

2010-12-20 Thread Bingfeng Mei
> -Original Message- > From: Ulrich Weigand [mailto:uweig...@de.ibm.com] > Sent: 17 December 2010 18:48 > To: Bingfeng Mei > Cc: i...@google.com; gcc@gcc.gnu.org; gcc-patc...@gcc.gnu.org > Subject: Re: Is eliminate_regs_in_insn allowed to generate invalid > instruction? > > Bingfeng Mei w

Re: Help with reloading

2010-12-20 Thread Mohamed Shafi
On 20 December 2010 10:56, Jeff Law wrote: > On 12/15/10 07:14, Mohamed Shafi wrote: >> >> Hi, >> >> I am doing a port in GCC 4.5.1. >> The target supports storing immediate values into memory location >> represented by a symbolic address. So in the move pattern i have given >> constraints to repr