Hi all
I need add 256bits-register support for our MIPS-based
processor, so I add some codes.
When I build gcc and test it, get a error "unable to find a
register to spill in class 'XX_REGS'"
can you tell me how to add 256bits register file to a MIPS port?
Thanks!
codes:
gcc/config/mips/constraints.md :
(define_register_constraint 'Z' 'XX_REGS'
'@internal')
gcc/config/mips/mips-ftypes.def :
DEF_MIPS_FTYPE (2, (UV32QI, UV32QI, UV32QI))
DEF_MIPS_FTYPE (2, (V32QI, V32QI, V32QI))
gcc/config/mips/mips.h :
#define FIXED_REGISTERS
/* XX regusters */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 \
#define CALL_USED_REGISTERS
/* XX regusters */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 \
#define CALL_REALLY_USED_REGISTERS
/* XX regusters */ \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \
#define XX_REG_FIRST 188
#define XX_REG_LAST 251
#define XX_REG_NUM (XX_REG_LAST - XX_REG_FIRST + 1)
#define XX_REG_P(REGNO) \
((unsigned int) ((int) (REGNO) - XX_REG_FIRST) < XX_REG_NUM)
enum reg_class
XX_REGS,
#define REG_CLASS_NAMES
XX_REGS,
#define REG_CLASS_CONTENTS add bits into it.
#define REG_ALLOC_ORDER
188,189,190,191,192,193,194,195,196,197, \
198,199,200,201,202,203,204,205,206,207,208,209,210,211,212,213, \
214,215,216,217,218,219,229,221,222,223,224,225,226,227,228,229, \
230,231,232,233,234,235,236,237,238,239,240,241,242,243,244,245, \
246,247,248,249,250,251
#define REGISTER_NAMES
'$z0', '$z1', '$z2', '$z3', '$z4', '$z5', '$z6', '$z7', '$z8', '$z9', \
'$z10', '$z11', '$z12', '$z13', '$z14', '$z15', '$z16', '$z17',
'$z18', '$z19', \
'$z20', '$z21', '$z22', '$z23', '$z24', '$z25', '$z26', '$z27',
'$z28', '$z29', \
'$z30', '$z31', '$z32', '$z33', '$z34', '$z35', '$z36', '$z37',
'$z38', '$z39', \
'$z40', '$z41', '$z42', '$z43', '$z44', '$z45', '$z46', '$z47',
'$z48', '$z49', \
'$z50', '$z51', '$z52', '$z53', '$z54', '$z55', '$z56', '$z57',
'$z58', '$z59', \
'$z60', '$z61', '$z62', '$z63' }
gcc/config/mips/mips-modes.def :
/* XX Vec modes */
VECTOR_MODES (INT, 32); /* V32QI V16HI V8SI V4DI */
gcc/config/mips/xx.h :
vpaddb_u (uint8x32_t s, uint8x32_t t)
{
return __builtin_xx_vpaddb_u (s, t);
}
__extension__ static __inline int8x32_t __attribute__ ((__always_inline__))
vpaddb_s (int8x32_t s, int8x32_t t)
{
return __builtin_xx_vpaddb_s (s, t);
}
gcc/config/mips/xx.md :
(define_mode_iterator ZB [V32QI])
(define_mode_iterator ZH [V16HI])
(define_mode_iterator ZW [V8SI])
(define_mode_iterator ZD [V4DI])
(define_mode_iterator ZHB [V16HI V32QI])
(define_mode_iterator ZWH [V8SI V16HI])
(define_mode_iterator ZDW [V4DI V8SI])
(define_mode_iterator ZWHB [V8SI V16HI V32QI])
(define_mode_iterator ZDWH [V4DI V8SI V16HI])
(define_mode_iterator ZDWHB [V4DI V8SI V16HI V32QI])
(define_mode_attr Z_suffix [(V4DI 'd')(V8SI 'w') (V16HI 'h') (V32QI 'b')])
(define_insn 'xx_vpadd<mode>'
[(set (match_operand:ZDWHB 0 'register_operand' '=Z')
(plus:ZDWHB (match_operand:ZDWHB 1 'register_operand' 'Z')
(match_operand:ZDWHB 2 'register_operand' 'Z')))]
'TARGET_HARD_FLOAT && TARGET_XX_VECTORS'
'vpadd<Z_suffix>\t%0,%1,%2'
[(set_attr 'type' 'fadd')])
gcc/config/mips/mips.c :
if (TARGET_XX_VECTORS
&& (mode == V32QImode
|| mode == V16HImode
|| mode == V8SImode
|| mode == V4DImode))
return true;
case V32QImode:
case V16HImode:
case V8SImode:
case V4DImode:
return TARGET_XX_VECTORS;
#define CODE_FOR_xx_vpaddb CODE_FOR_xx_vpaddv32qi
XX_BUILTIN_SUFFIX (vpaddb, u, MIPS_UV32QI_FTYPE_UV32QI_UV32QI),
XX_BUILTIN_SUFFIX (vpaddb, s, MIPS_V32QI_FTYPE_V32QI_V32QI),
#define MIPS_ATYPE_V32QI mips_builtin_vector_type (intQI_type_node, V32QImode)
#define MIPS_ATYPE_V16HI mips_builtin_vector_type (intHI_type_node, V16HImode)
#define MIPS_ATYPE_V8SI mips_builtin_vector_type (intSI_type_node, V8SImode)
#define MIPS_ATYPE_V4DI mips_builtin_vector_type (intDI_type_node, V4DImode)
#define MIPS_ATYPE_UV32QI \
mips_builtin_vector_type (unsigned_intQI_type_node, V32QImode)
#define MIPS_ATYPE_UV16HI \
mips_builtin_vector_type (unsigned_intHI_type_node, V16HImode)
#define MIPS_ATYPE_UV8SI \
mips_builtin_vector_type (unsigned_intSI_type_node, V8SImode)
#define MIPS_ATYPE_UV4DI \
mips_builtin_vector_type (unsigned_intDI_type_node, V4DImode)
testcase:
#include "xx.h"
#include <stdio.h>
#include <stdint.h>
#include <assert.h>
#include <limits.h>
typedef union { int8x32_t v; int8_t a[32]; } int8x32_encap_t;
typedef union { uint8x32_t v; uint8_t a[32]; } uint8x32_encap_t;
static void test_vpaddb_u (void)
{
uint8x32_encap_t s, t;
uint8x32_encap_t r;
s.a[0] = 1;
s.a[1] = 2;
s.a[2] = 3;
s.a[3] = 4;
s.a[4] = 5;
s.a[5] = 6;
s.a[6] = 7;
s.a[7] = 8;
s.a[8] = 9;
s.a[9] = 10;
s.a[10] = 11;
s.a[11] = 12;
s.a[12] = 13;
s.a[13] = 14;
s.a[14] = 15;
s.a[15] = 16;
s.a[16] = 17;
s.a[17] = 18;
s.a[18] = 19;
s.a[19] = 20;
s.a[20] = 21;
s.a[21] = 22;
s.a[22] = 23;
s.a[23] = 24;
s.a[24] = 25;
s.a[25] = 26;
s.a[26] = 27;
s.a[27] = 28;
s.a[28] = 29;
s.a[29] = 30;
s.a[30] = 31;
s.a[31] = 32;
t.a[0] = 33;
t.a[1] = 34;
t.a[2] = 35;
t.a[3] = 36;
t.a[4] = 37;
t.a[5] = 38;
t.a[6] = 39;
t.a[7] = 40;
t.a[8] = 41;
t.a[9] = 42;
t.a[10] = 43;
t.a[11] = 44;
t.a[12] = 45;
t.a[13] = 46;
t.a[14] = 47;
t.a[15] = 48;
t.a[16] = 49;
t.a[17] = 50;
t.a[18] = 51;
t.a[19] = 52;
t.a[20] = 53;
t.a[21] = 54;
t.a[22] = 55;
t.a[23] = 56;
t.a[24] = 57;
t.a[25] = 58;
t.a[26] = 59;
t.a[27] = 60;
t.a[28] = 61;
t.a[29] = 62;
t.a[30] = 63;
t.a[31] = 64;
r.v = vpaddb_u (s.v, t.v);
assert (r.a[0] == 34);
assert (r.a[1] == 36);
assert (r.a[2] == 38);
assert (r.a[3] == 40);
assert (r.a[4] == 42);
assert (r.a[5] == 44);
assert (r.a[6] == 46);
assert (r.a[7] == 48);
assert (r.a[8] == 50);
assert (r.a[9] == 52);
assert (r.a[10] == 54);
assert (r.a[11] == 56);
assert (r.a[12] == 58);
assert (r.a[13] == 60);
assert (r.a[14] == 62);
assert (r.a[15] == 64);
assert (r.a[16] == 66);
assert (r.a[17] == 68);
assert (r.a[18] == 70);
assert (r.a[19] == 72);
assert (r.a[20] == 74);
assert (r.a[21] == 76);
assert (r.a[22] == 78);
assert (r.a[23] == 80);
assert (r.a[24] == 82);
assert (r.a[25] == 84);
assert (r.a[26] == 86);
assert (r.a[27] == 88);
assert (r.a[28] == 90);
assert (r.a[29] == 92);
assert (r.a[30] == 94);
assert (r.a[31] == 96);
}
static void test_vpaddb_s (void)
{
int8x32_encap_t s, t;
int8x32_encap_t r;
s.a[0] = -32;
s.a[1] = -31;
s.a[2] = -30;
s.a[3] = -29;
s.a[4] = -28;
s.a[5] = -27;
s.a[6] = -26;
s.a[7] = -25;
s.a[8] = -24;
s.a[9] = -23;
s.a[10] = -22;
s.a[11] = -21;
s.a[12] = -20;
s.a[13] = -19;
s.a[14] = -18;
s.a[15] = -17;
s.a[16] = -16;
s.a[17] = -15;
s.a[18] = -14;
s.a[19] = -13;
s.a[20] = -12;
s.a[21] = -11;
s.a[22] = -10;
s.a[23] = -9;
s.a[24] = -8;
s.a[25] = -7;
s.a[26] = -6;
s.a[27] = -5;
s.a[28] = -4;
s.a[29] = -3;
s.a[30] = -2;
s.a[31] = -1;
t.a[0] = 0;
t.a[1] = 1;
t.a[2] = 2;
t.a[3] = 3;
t.a[4] = 4;
t.a[5] = 5;
t.a[6] = 6;
t.a[7] = 7;
t.a[8] = 8;
t.a[9] = 9;
t.a[10] = 10;
t.a[11] = 11;
t.a[12] = 12;
t.a[13] = 13;
t.a[14] = 14;
t.a[15] = 15;
t.a[16] = 16;
t.a[17] = 17;
t.a[18] = 18;
t.a[19] = 19;
t.a[20] = 20;
t.a[21] = 21;
t.a[22] = 22;
t.a[23] = 23;
t.a[24] = 24;
t.a[25] = 25;
t.a[26] = 26;
t.a[27] = 27;
t.a[28] = 28;
t.a[29] = 29;
t.a[30] = 30;
t.a[31] = 31;
r.v = vpaddb_s (s.v, t.v);
assert (r.a[0] == -32);
assert (r.a[1] == -30);
assert (r.a[2] == -28);
assert (r.a[3] == -26);
assert (r.a[4] == -24);
assert (r.a[5] == -22);
assert (r.a[6] == -20);
assert (r.a[7] == -18);
assert (r.a[8] == -16);
assert (r.a[9] == -14);
assert (r.a[10] == -12);
assert (r.a[11] == -10);
assert (r.a[12] == -8);
assert (r.a[13] == -6);
assert (r.a[14] == -4);
assert (r.a[15] == -2);
assert (r.a[16] == 0);
assert (r.a[17] == 2);
assert (r.a[18] == 4);
assert (r.a[19] == 6);
assert (r.a[20] == 8);
assert (r.a[21] == 10);
assert (r.a[22] == 12);
assert (r.a[23] == 14);
assert (r.a[24] == 16);
assert (r.a[25] == 18);
assert (r.a[26] == 20);
assert (r.a[27] == 22);
assert (r.a[28] == 24);
assert (r.a[29] == 26);
assert (r.a[30] == 28);
assert (r.a[31] == 30);
}
int main (void)
{
test_vpaddb_u ();
test_vpaddb_s ();
return 0;
}
