On 7/20/20 8:24 AM, Metzger, Markus T wrote:
Hello Michael,
I tried submitting the proposal via the public comment function but I'm not sure
whether I succeeded. When I clicked on "Submit Comment" nothing happened.
I have not filled out the Section and Page fields as the proposal covers
multip
On 7/20/20 8:24 AM, Metzger, Markus T wrote:
Hello Michael,
We'd also want an unbounded piece operator to describe partially registerized
unbounded arrays, but I have not worked that out in detail, yet, and we're a bit
farther away from an implementation.
Can you describe this more?
Conside
Hello Michael,
> > I have a write-up ready but wanted to wait until we have a public
> implementation.
> > Is that the right order? Or would you rather want to review proposals right
> away.
>
> I'm not sure what a SIMD lane is. There are a number of architectures
> which support SIMD, such as
On 7/20/20 1:31 AM, Metzger, Markus T via Dwarf-Discuss wrote:
I found DW_AT_address_class, which allows attaching an integer, which
could represent the address-space. This sounds pretty close. I’m a bit
thrown off by the example, though.
Which example?
Table 2.7 "Example address class co
Hello Todd,
> They use DW_AT_address_class with a CUDA-specific enum of address spaces,
> with
> values for things like: global memory, shared memory, const memory, etc. They
> don't attach these attributes to subroutines, because all the code on that
> architecture is in a single "code" memory.
On 7/20/20 1:43 AM, Metzger, Markus T via Dwarf-Discuss wrote:
I also have a small proposal for describing locations as function of the SIMD
lane by
adding a DW_OP_push_simd_lane operator and introducing stack variants for piece
operators.
I have a write-up ready but wanted to wait until we
Markus,
My experience with an architecture like this also is a GPU: the Nvidia CUDA
GPUs. I don't work on nvcc. I'm coming at this from the consumer side. But
what I've observed:
They use DW_AT_address_class with a CUDA-specific enum of address spaces, with
values for things like: global memor
Hello Michael,
> https://llvm.org/docs/AMDGPUDwarfProposalForHeterogeneousDebugging.html
> >
> > AFAIK, these changes will be made to LLVM and there is interest in adding to
> the DWARF standard eventually.
>
> As mentioned in the past, I would be pleased to see proposals submitted
> for these ch
Hello Michael,
> > What would be the recommended way to model variables that are allocated
> > to different address spaces?
>
> Can you describe the architecture a bit?
It's a GPU. It uses a different address space for shared local memory.
> > I found DW_OPT_xderef for dereferencing address-s
