---
c/src/lib/libbsp/sparc/leon3/include/bsp.h | 11 +++
c/src/lib/libbsp/sparc/shared/irq/irq-shared.c | 38
2 files changed, 43 insertions(+), 6 deletions(-)
diff --git a/c/src/lib/libbsp/sparc/leon3/include/bsp.h
b/c/src/lib/libbsp/sparc/leon3/include/bsp.
The LEON2 and ERC32 maps the new macros to CPU0 since they do not
support SMP. With the LEON3 a specific CPU's interrupt controller
registers can be modified using macros.
---
c/src/lib/libbsp/sparc/erc32/include/erc32.h | 14 ++-
c/src/lib/libbsp/sparc/leon2/include/leon.h | 12 ++
c
Manupilating the interrupt control registers directly instead
of going through the interrupt layer can be deceiving.
---
c/src/lib/libbsp/shared/include/fatal.h |1 +
c/src/lib/libbsp/sparc/leon3/clock/ckinit.c | 23 ---
2 files changed, 21 insertions(+), 3 deletions(
On 10/07/2014 03:51 PM, Gedare Bloom wrote:
On Tue, Oct 7, 2014 at 5:10 AM, Daniel Hellstrom wrote:
---
c/src/lib/libbsp/sparc/leon3/include/bsp.h | 11 +++
c/src/lib/libbsp/sparc/shared/irq/irq-shared.c | 38
2 files changed, 43 insertions(+), 6
---
c/src/lib/libbsp/sparc/leon3/include/bsp.h | 11 +++
c/src/lib/libbsp/sparc/shared/irq/irq-shared.c | 38
2 files changed, 43 insertions(+), 6 deletions(-)
diff --git a/c/src/lib/libbsp/sparc/leon3/include/bsp.h
b/c/src/lib/libbsp/sparc/leon3/include/bsp.
On 10/09/2014 11:13 AM, Sebastian Huber wrote:
On 08/10/14 15:49, Daniel Hellstrom wrote:
+#ifdef RTEMS_SMP
+/* Weak table used to implement static interrupt CPU affinity in a SMP
+ * configuration. The array index is the interrupt to be looked up, and
+ * the array[INTERRUPT] content is the
On 10/09/2014 11:43 AM, Sebastian Huber wrote:
On 09/10/14 11:31, Daniel Hellstrom wrote:
On 10/09/2014 11:13 AM, Sebastian Huber wrote:
On 08/10/14 15:49, Daniel Hellstrom wrote:
+#ifdef RTEMS_SMP
+/* Weak table used to implement static interrupt CPU affinity in a SMP
+ * configuration. The
_STATUS);
} while ((status & SP_LSR_THOLD) == 0);
set( port, NS16550_TRANSMIT_BUFFER, buf [i]);
}
would be better?
Thanks,
Daniel.
--
Daniel F. Gutson
Chief Engineering Officer, SPD
San Lorenzo 47, 3rd Floor, Office 5
Córdoba, Argentina
Phone: +54 351 4217888 / +54 35
On Thu, Oct 23, 2014 at 5:47 AM, Sebastian Huber
wrote:
> Hello Daniel,
Hi Sebastian,
>
> I never notice a problem with this driver. It should only write to the FIFO
> in case it is completely empty. Did you observe problems?
no, I didn't (actually I found this while looking
On Fri, Oct 24, 2014 at 2:33 AM, Sebastian Huber
wrote:
> On 23/10/14 18:12, Daniel Gutson wrote:
>>
>> On Thu, Oct 23, 2014 at 5:47 AM, Sebastian Huber
>> wrote:
>>>
>>> >Hello Daniel,
>>
>> Hi Sebastian,
>>
>>> >
>
On Fri, Oct 24, 2014 at 2:16 PM, Daniel Gutson
wrote:
> On Fri, Oct 24, 2014 at 2:33 AM, Sebastian Huber
> wrote:
>> On 23/10/14 18:12, Daniel Gutson wrote:
>>>
>>> On Thu, Oct 23, 2014 at 5:47 AM, Sebastian Huber
>>> wrote:
>>>>
>>&
From: Daniel Hellstrom
This patch adds a default network tasks CPU affinity configuration
option. The network drivers have the option to create their own
daemon tasks with a custom CPU affinity set, or rely on the
default set.
---
cpukit/libnetworking/rtems/rtems_bsdnet.h | 11
From: Daniel Hellstrom
Similar to the task priority option, the new CPU affinity
option is first controlled by the RPCI specific rpciodCpuset
option. If that is not set, it uses the global network task config.
If that is also not set, it falls back to not setting the affinity
at all, using all
On 2014-11-13 10:23, Sebastian Huber wrote:
On 13/11/14 10:09, Daniel Cederman wrote:
@@ -407,6 +410,8 @@ static rtems_intervalticksPerSec;/*
cached system clock rate (WHO IS ASSUMED
*/
rtems_task_priorityrpciodPriority = 0
From: Daniel Hellstrom
This patch adds a default network tasks CPU affinity configuration
option. The network drivers have the option to create their own
daemon tasks with a custom CPU affinity set, or rely on the
default set.
---
cpukit/libnetworking/rtems/rtems_bsdnet.h | 9
From: Daniel Hellstrom
Similar to the task priority option, the new CPU affinity
option is first controlled by the RPCI specific rpciodCpuset
option. If that is not set, it uses the global network task config.
If that is also not set, it falls back to not setting the affinity
at all, using all
An oversight. I've now added const to all cpuset references.
On 2014-11-13 13:44, Sebastian Huber wrote:
On 13/11/14 11:21, Daniel Cederman wrote:
+cpu_set_t*network_task_cpuset;
The consumer of this field (rtems_task_set_affinity()) uses a const
cpuset, so why is this not
Similar to the task priority option, the new CPU affinity
option is first controlled by the RPCI specific rpciodCpuset
option. If that is not set, it uses the global network task config.
If that is also not set, it falls back to not setting the affinity
at all, using all CPUs.
---
cpukit/libfs/src
This patch adds a default network tasks CPU affinity configuration
option. The network drivers have the option to create their own
daemon tasks with a custom CPU affinity set, or rely on the
default set.
---
cpukit/libnetworking/rtems/rtems_bsdnet.h | 9 ++
cpukit/libnetworking/rtems
The LEON3 BSP have support for up to 8 termios consoles, the
LEON3-FT GR712RC uses 6 UARTs.
This does not take into account the BSP maximum devices instead
it is hardcoded to 6. This patch increases it the maximum
devices of DEVFS04 from 6 to 10.
---
testsuites/libtests/devfs04/init.c |2 +-
Hello,
All three patches have whitespace on "RTEMS_PRIORITY | " below. Otherwise it
looks good.
Thanks!
On 11/13/2014 07:15 PM, Jennifer Averett wrote:
Change semaphore attributes to prevent semaphore from being
locked and never released upon a context switch.
---
testsuites/smptests/smpsc
---
testsuites/sptests/spcpuset01/init.c |6 +-
testsuites/sptests/spcpuset01/spcpuset01.doc |2 +-
testsuites/sptests/spcpuset01/spcpuset01.scn | 130 +-
3 files changed, 69 insertions(+), 69 deletions(-)
diff --git a/testsuites/sptests/spcpuset01/init.c
I see no need for waiting the 3 instruction delay for wim to be
written in this case, since the STD after does not depend on WIM
---
c/src/lib/libcpu/sparc/reg_win/window.S |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/c/src/lib/libcpu/sparc/reg_win/window.S
b/c/src/lib
Save five instructions on underflow handling.
By using an optimized trap entry we can move instructions from
the window underflow function into the trap entry vector. By
setting WIM=0 and using RESTORE it is possible to move the
new WIM register content from the trapped window into the
to-be-resto
* Coding style cleanups.
* Use OS reserved trap 0x89 for IRQ Disable
* Use OS reserved trap 0x8A for IRQ Enable
This will result in faster Disable/Enable code since the
system trap handler does not need to decode which function
the user wants. Besides the IRQ disable/enabled can now
be inline whic
By using a optimized trap entry we can move instructions from
the window overflow function into the trap entry vector. By
using the saved locals instead of g1 we don't need to save
that register temporarily. Also spead out non store instructions
inbetween stores to use the write buffer better.
---
hanks!
DanielH
On Wed, Nov 19, 2014 at 10:35 AM, Daniel Hellstrom wrote:
* Coding style cleanups.
* Use OS reserved trap 0x89 for IRQ Disable
* Use OS reserved trap 0x8A for IRQ Enable
This will result in faster Disable/Enable code since the
system trap handler does not need to decode which functio
Hi,
I will fix this. I missed it since it I never enabled RTEMS_PROFILING.
Thanks!
Daniel
On 11/20/2014 10:12 AM, Sebastian Huber wrote:
With your patches applied I get a link-time error:
gmake[6]: Entering directory
`/scratch/git-build/b-smp-ngmp/sparc-rtems4.11/c/ngmp/testsuites/samples
On 11/20/2014 12:08 PM, Sebastian Huber wrote:
On 20/11/14 10:22, Daniel Hellstrom wrote:
I will fix this. I missed it since it I never enabled RTEMS_PROFILING.
I did a test suite run on NGMP with profiling enabled and your patches with a local fix. So overall they don't make things
On 11/20/2014 03:09 PM, Sebastian Huber wrote:
On 20/11/14 12:36, Daniel Hellstrom wrote:
On 11/20/2014 12:08 PM, Sebastian Huber wrote:
On 20/11/14 10:22, Daniel Hellstrom wrote:
I will fix this. I missed it since it I never enabled RTEMS_PROFILING.
I did a test suite run on NGMP with
* Coding style cleanups.
* Use OS reserved trap 0x89 for IRQ Disable
* Use OS reserved trap 0x8A for IRQ Enable
This will result in faster Disable/Enable code since the
system trap handler does not need to decode which function
the user wants. Besides the IRQ disable/enabled can now
be inline whic
On 11/24/2014 04:29 PM, Gedare Bloom wrote:
On Mon, Nov 24, 2014 at 5:15 AM, Daniel Hellstrom wrote:
* Coding style cleanups.
* Use OS reserved trap 0x89 for IRQ Disable
* Use OS reserved trap 0x8A for IRQ Enable
This will result in faster Disable/Enable code since the
system trap handler
Ok, what about ERC32 which has the same macros?
On 11/24/2014 04:41 PM, Gedare Bloom wrote:
Daniel commit these if you agree with the assessment.
On Sun, Nov 23, 2014 at 4:53 PM, Jiri Gaisler wrote:
Condition needs to be inverted, as a 1 in the mask register means
that the
Ok, Thanks!
DanielH
On 24 November 2014 17:15:03 CET, Jiri Gaisler wrote:
>On 11/24/2014 05:02 PM, Daniel Hellstrom wrote:
>> Ok, what about ERC32 which has the same macros?
>
>ERC32 is correctly defined. The leon2/3 were wrong because the
>defines were copied from ERC32, but
Hello Sebastian,
The coherent code looks nice and clean. I'm wondering, is it possbile to add a memory region to the coherent area and at the same time make malloc() return memory from that area when the default heap
connected to malloc() is empty? As I recall that is the behaviour of linux, whe
* Coding style cleanups.
* Use OS reserved trap 0x89 for IRQ Disable
* Use OS reserved trap 0x8A for IRQ Enable
* Add to SPARC CPU supplement documentation
This will result in faster Disable/Enable code since the
system trap handler does not need to decode which function
the user wants. Besides th
is the procedure for updates to GCC/newlib/binutils, if I add a LEON patch
to GCC should I email rtems-devel about this or submit patches to the source
builder?
Daniel H
On 12/04/2014 08:18 AM, Sebastian Huber wrote:
Hello,
we use currently GCC 4.9.2 for the SPARC. Unfortunately two patches
The LEON3 BSP has been using mcpu=cypress which is a
SPARCV7 that is compatible with SPARCv8 CPUs. This patch
enables the relatively new LEON3 model and generates
SPARCv7 compatible code. This shuold be comptabile with
all single-core LEON3/4 systems. The LEON3 model is
required for SMP to make GCC
/2014 09:13 AM, Daniel Hellstrom wrote:
Hello,
We use the 4.9.2 + all the commits up to the commit of the below multilib
patch. This, because it was the simplest approach. We might just as well add
the two patches on top of 4.9.2.
There are some information about this here
(http://www.gaisler.com
Recent GCC have SPARC multilib with muser-mode. This makes
CAS instruction operating in both user and priveleged mode.
It is required to allow the CAS in systems where RTEMS run
in user mode.
---
c/src/lib/libbsp/sparc/leon3/make/custom/ngmp.cfg |2 +-
1 files changed, 1 insertions(+), 1 delet
On 12/04/2014 01:20 PM, Sebastian Huber wrote:
This option is already in the master.
Ok, I missed that. Thanks!
DanielH
On 04/12/14 13:10, Daniel Hellstrom wrote:
Recent GCC have SPARC multilib with muser-mode. This makes
CAS instruction operating in both user and priveleged mode.
It is
On 12/04/2014 03:20 PM, Sebastian Huber wrote:
On 04/12/14 14:25, Sebastian Huber wrote:
On 04/12/14 13:22, Sebastian Huber wrote:
On 04/12/14 13:10, Daniel Hellstrom wrote:
I have now posted the two BSP build changes for LEON3+NGMP BSPs that reflect the updated GCC-4.9.2 toolchain
On 12/04/2014 03:26 PM, Sebastian Huber wrote:
On 04/12/14 13:10, Daniel Hellstrom wrote:
The LEON3 BSP has been using mcpu=cypress which is a
SPARCV7 that is compatible with SPARCv8 CPUs. This patch
enables the relatively new LEON3 model and generates
SPARCv7 compatible code. This shuold be
FWIW, we have a fully functional LWIP eth stack for the Beaglebone Black that
we'll contribute soon.
Maybe exploring/prototyping some dynamic checkers (specially for concurrency)
would be an option for gsoc.
--Mensaje original--
De: Joel Sherrill
Remitente: devel
Para: us...@rtems.org
Pa
stion,
feel free to contact me any time!
Best regards,
Daniel Krüger
--
SYS TEC electronic GmbH
Am Windrad 2
08468 Heinsdorfergrund
Telefon : +49 (0) 3765 38600-0
Fax : +49 (0) 3765 38600-4100
Email : daniel.krue...@systec-electronic.com
Website : http://www.systec-electronic.com
Man
in ticker. Look at the ticker variants in
> examples-v2
>
> >Regards,
> >Hesham
> >___
> >devel mailing list
> >devel@rtems.org
> >http://lists.rtems.org/mailman/listinfo/devel
>
> --joel
> ___
w a little more, I suggest that you make a objdump and
> see what global objects are using more RAM and where did they come from.
>
> On Wed, Dec 17, 2014 at 1:36 PM, Daniel Gutson <
> daniel.gut...@tallertechnologies.com> wrote:
>>
>> We were able to downsize R
On 12/04/2014 04:26 PM, Sebastian Huber wrote:
On 04/12/14 15:54, Daniel Hellstrom wrote:
On 12/04/2014 03:26 PM, Sebastian Huber wrote:
On 04/12/14 13:10, Daniel Hellstrom wrote:
The LEON3 BSP has been using mcpu=cypress which is a
SPARCV7 that is compatible with SPARCv8 CPUs. This patch
Congratulations!
--Mensaje original--
De: Joel Sherrill
Remitente: devel
Para: us...@rtems.org
Para: devel@rtems.org
Asunto: Fwd: Sebastian Huber appointed RTEMS Co-Maintainer
Enviado: 21 de dic de 2014 2:13 PM
Original Message
Subject:Sebastian Huber appointed
_vector_table[vector]);
}
--
Daniel Cederman
Software Engineer
Aeroflex Gaisler AB
Aeroflex Microelectronic Solutions – HiRel
Kungsgatan 12
SE-411 19 Gothenburg, Sweden
ceder...@gaisler.com
www.Aeroflex.com/Gaisler
___
devel mailing list
devel@rtems.org
ht
possible
and switch to manual just in small bounded
places of the code.
Before entering in the discussion of the implementation, I'd like
feeedback about the general idea please.
Thanks!
Daniel.
___
devel mailing list
devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel
Hello,
Haven't tested but seems good.
Thanks,
Daniel
On 01/21/2015 05:05 PM, Gedare Bloom wrote:
Claudio and Daniel H,
OK to commit?
-Gedare
On Tue, Dec 23, 2014 at 10:08 PM, Gedare Bloom wrote:
This is a patch proposed for PR 1761
[https://devel.rtems.org/ticket/1761]. Comment if
This allows it to be wrapped by another function at link-time
and can be used to trace interrupts. If not placed in a separate
file, the function pointer address used in BSP_shared_interrupt_init
will be resolved at compile-time, and the function will not be wrappable.
---
c/src/lib/libbsp/sparc/M
---
doc/cpu_supplement/sparc.t | 16
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/doc/cpu_supplement/sparc.t b/doc/cpu_supplement/sparc.t
index cd5602c..d21e9fe 100644
--- a/doc/cpu_supplement/sparc.t
+++ b/doc/cpu_supplement/sparc.t
@@ -951,10 +951,18 @@ handler
---
c/src/lib/libbsp/sparc/shared/spw/grspw.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw.c
b/c/src/lib/libbsp/sparc/shared/spw/grspw.c
index d3eb9b9..d869d17 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw.c
+++ b/c/src/l
---
testsuites/smptests/Makefile.am | 1 +
testsuites/smptests/configure.ac | 1 +
testsuites/smptests/smpcapture02/Makefile.am | 19 +
testsuites/smptests/smpcapture02/init.c | 425 ++
testsuites/smptests/smpcapture02/smpc
---
doc/networking/networkapp.t | 14 ++
1 file changed, 14 insertions(+)
diff --git a/doc/networking/networkapp.t b/doc/networking/networkapp.t
index 62b1a53..dd356a8 100644
--- a/doc/networking/networkapp.t
+++ b/doc/networking/networkapp.t
@@ -101,6 +101,11 @@ struct rtems_bsdnet_c
)
> --
> 1.8.1.4
>
> _______
> devel mailing list
> devel@rtems.org
> http://lists.rtems.org/mailman/listinfo/devel
>
--
Daniel F. Gutson
Chief Engineering Officer, SPD
San Lorenzo 47, 3rd Floor,
On Wed, Feb 4, 2015 at 1:16 PM, Daniel Gutson <
daniel.gut...@tallertechnologies.com> wrote:
> Hi Sebastian,
>
> On Wed, Feb 4, 2015 at 10:46 AM, Sebastian Huber <
> sebastian.hu...@embedded-brains.de> wrote:
>
>> ---
>> cpukit/libcsupport/include/rtems/lib
On Wed, Feb 4, 2015 at 1:27 PM, Gedare Bloom wrote:
>
> On Wed, Feb 4, 2015 at 11:16 AM, Daniel Gutson
> wrote:
> > Hi Sebastian,
> >
> > On Wed, Feb 4, 2015 at 10:46 AM, Sebastian Huber
> > wrote:
> >>
> >> ---
> >> cpukit/libcsuppor
> I'd like to entertain a new name for this "BSP_ISR_handler" function
> now that it becomes an exported symbol. We should put it into a proper
> namespace.
Any suggestion on what to change it to?
/Daniel C
On 2015-02-04 16:12, Gedare Bloom wrote:
I'd like to
> Daniel(s), could enlighten me why this is needed ? Is this a arch
> constraint or something else ?
>
> Chris
It is an arch constraint. On SPARC, for example, all memory accesses
needs to a be aligned. From the SPARC V8 manual:
"Halfword accesses must be aligned on 2-byte
Hi,
is there any current experience / support with hot patching? E.g.
patching a driver while the whole system is running.
Thanks,
Daniel.
--
Daniel F. Gutson
Chief Engineering Officer, SPD
San Lorenzo 47, 3rd Floor, Office 5
Córdoba, Argentina
Phone: +54 351 4217888 / +54 351
Just to clarify: the ability to provide a new piece of binary
corresponding to a driver and replace the existing one.
Have anybody tried this before?
Thanks!
Daniel.
On Fri, Feb 13, 2015 at 12:27 PM, Daniel Gutson
wrote:
> Hi,
>
>is there any current experience / support
El 13/02/2015 22:59, "Cudmore, Alan P. (GSFC-5820)"
escribió:
>
> A project is looking at using RTEMS on an FPGA based ARM Cortex-M1 like
> the one in the Microsemi ProAsic3L development kit:
>
http://www.microsemi.com/products/fpga-soc/design-resources/dev-kits/proasi
> c3/cortex-m1-enabled-proas
board with:
*** BEGIN OF TEST SMPCAPTURE 2 ***
rtems-4.11/c/src/../../testsuites/smptests/smpcapture02/init.c: 337
recs->time>=prev_rec->time
On 11/02/15 16:34, Daniel Hellstrom wrote:
Module:rtems
Branch:master
Commit:8d8573acc8f620c93afa8dd30ea8418d25ad2d21
Changeset:
h
I'm resending my answer since I got a mailman error response.
On Tue, Feb 17, 2015 at 10:53 AM, Daniel Gutson
wrote:
>
> El 14/02/2015 10:29, "Sebastian Huber"
> escribió:
>>
>> On 14/02/15 14:27, Sebastian Huber wrote:
>>>
>>> On 14/02/15
Adds the possibility to register drivers before the IO Manager has
completed the initialization. Sometimes the BSP may want to register
a driver dynamically early in the boot process.
---
cpukit/sapi/src/io.c |4
cpukit/sapi/src/ioregisterdriver.c | 14 +-
2 fi
---
c/src/lib/libbsp/sparc/leon3/amba/amba.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/c/src/lib/libbsp/sparc/leon3/amba/amba.c
b/c/src/lib/libbsp/sparc/leon3/amba/amba.c
index 70e703f..9706b25 100644
--- a/c/src/lib/libbsp/sparc/leon3/amba/amba.c
+++ b/c/src/l
Its now possible to select which timer core will be used for
system clock timer and to control the timer prescaler that
affects all timer instances on that timer core.
The timer and interrupt controller AMBA devices are exported
to make it possible for other code to get detailed information.
For e
Hi,
I have rebased and tested briefly the RTEMS code that we have used on LEON2/3/4
on RTEMS-4.10 during the last couple of years. A couple of years ago most stuff
that did not depend on the PCI and Driver Manager layers were submitted so most
patches are SPARC BSP specific this time. GCC-4.9 comp
Last timer instance of GPTIMER is sometimes a watchdog timer that
can reset the system on timer underflow.
---
c/src/lib/libbsp/sparc/leon3/Makefile.am|2 +
c/src/lib/libbsp/sparc/leon3/include/watchdog.h | 49
c/src/lib/libbsp/sparc/leon3/preinstall.am |4 +
c/
No point in scanning for the same GPTIMER twice. Rely on
amba.c AMBA PnP scanning.
---
c/src/lib/libbsp/sparc/leon3/clock/ckinit.c | 11 ++-
1 files changed, 2 insertions(+), 9 deletions(-)
diff --git a/c/src/lib/libbsp/sparc/leon3/clock/ckinit.c
b/c/src/lib/libbsp/sparc/leon3/clock/ck
Remove support for using the second timer for time stamping.
Instead the user can configure the system clock timer to a higher
base clock frequency (lower the prescaler). This change does not
affect the GR712RC or LEON4-N2X. The GR712RC does not have two
GPTIMERs and the N2X uses the Interrupt Cont
With this patch the LEON family can access the GRLIB GPTIMER using
the Timer library (TLIB).
A System Clock driver instead of BSP/clock/ck_init.c is provided
using the TLIB. The classic clock driver is split in two parts,
clock driver and timer driver. The BSPs need only to fullfill the
timer inte
---
cpukit/libmisc/Makefile.am |3 +-
cpukit/libmisc/shell/main_pci.c| 525
cpukit/libmisc/shell/shellconfig.h | 16 ++
3 files changed, 543 insertions(+), 1 deletions(-)
create mode 100644 cpukit/libmisc/shell/main_pci.c
diff --git a/cpuki
(pci_interrupt_register) and PCI
+ * target set up.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ *
+ * 2008-12-03, Daniel Hellstrom
+ *Created
+ *
+ */
+
+/* Use PCI Configuration libarary
---
c/src/lib/libbsp/sparc/Makefile.am |2 +
c/src/lib/libbsp/sparc/leon2/Makefile.am |7 +
c/src/lib/libbsp/sparc/leon2/include/bsp.h |7 +
c/src/lib/libbsp/sparc/leon2/preinstall.am | 13 +
.../lib/libbsp/sparc/leon2/startup/bsppredriver.c
This patch reimplements the console driver of the LEON3 BSP, it
has split up the console driver in two parts: Console driver and
UART driver. Before the only UART supported was APBUART and only
on-chip APBUARTs found during startup. However splitting the
driver in two allows any UART interface to r
---
c/src/lib/libbsp/sparc/leon3/amba/amba.c | 50
c/src/lib/libbsp/sparc/leon3/clock/ckinit.c| 10
c/src/lib/libbsp/sparc/leon3/console/console.c | 10
.../lib/libbsp/sparc/leon3/startup/bsppredriver.c | 32 -
4 files chang
---
c/src/lib/libbsp/sparc/Makefile.am |7 +
c/src/lib/libbsp/sparc/leon3/Makefile.am |7 +
c/src/lib/libbsp/sparc/leon3/include/bsp.h |7 +
c/src/lib/libbsp/sparc/leon3/preinstall.am | 12 +
c/src/lib/libbsp/sparc/shared/drvmgr/ambapp_bus.c
---
c/src/lib/libbsp/sparc/erc32/include/bsp.h |7 +++
c/src/lib/libbsp/sparc/leon2/include/bsp.h | 10 ++
c/src/lib/libbsp/sparc/leon3/include/bsp.h |9 +++--
3 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/c/src/lib/libbsp/sparc/erc32/include/bsp.h
b/c/
---
cpukit/libmisc/Makefile.am |2 +-
cpukit/libmisc/shell/main_drvmgr.c | 426
cpukit/libmisc/shell/shellconfig.h |9 +
3 files changed, 436 insertions(+), 1 deletions(-)
create mode 100644 cpukit/libmisc/shell/main_drvmgr.c
diff --git a/cpu
In some non-standard designs GRLIB peripherals are used together
LEON2. This patch adds a GRLIB amba Plug&Play driver so that AMBA
devices can be found from Plug&Play the same way as with the LEON3
BSP.
The user is required to add an AMBA-PnP device entry into the LEON2
bus configuration, so that
The old code used a limited PCI configuration library, which was
duplicated into LEON2 and LEON3 BSP pci.c together with respective
Host controller PCI interface.
The LEON2 BSP had support for AT697 PCI, and LEON3 for GRPCI PCI
Host controller. With this update new PCI Host drivers are added,
and
---
c/src/lib/libbsp/sparc/shared/uart/apbuart_cons.c | 16 ++--
1 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/c/src/lib/libbsp/sparc/shared/uart/apbuart_cons.c
b/c/src/lib/libbsp/sparc/shared/uart/apbuart_cons.c
index 2785286..64d1b15 100644
--- a/c/src/lib/libbsp
---
c/src/lib/libbsp/sparc/shared/pci/grpci.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/c/src/lib/libbsp/sparc/shared/pci/grpci.c
b/c/src/lib/libbsp/sparc/shared/pci/grpci.c
index f496405..0b781d3 100644
--- a/c/src/lib/libbsp/sparc/shared/pci/grpci.c
+++ b/c/src/l
---
c/src/lib/libbsp/sparc/shared/amba/ambapp_names.c | 55 +++-
c/src/lib/libbsp/sparc/shared/include/ambapp_ids.h | 44 +---
2 files changed, 77 insertions(+), 22 deletions(-)
diff --git a/c/src/lib/libbsp/sparc/shared/amba/ambapp_names.c
b/c/src/lib/libbsp/spa
---
c/src/lib/libbsp/sparc/shared/gpio/gpiolib.c| 11 +++
c/src/lib/libbsp/sparc/shared/gpio/grgpio.c | 12
c/src/lib/libbsp/sparc/shared/include/gpiolib.h |4
3 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/c/src/lib/libbsp/sparc/shared/gp
---
c/src/lib/libbsp/sparc/shared/uart/apbuart_cons.c | 32 ++--
1 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/c/src/lib/libbsp/sparc/shared/uart/apbuart_cons.c
b/c/src/lib/libbsp/sparc/shared/uart/apbuart_cons.c
index 64d1b15..e0fa64e 100644
--- a/c/src/lib/l
---
c/src/lib/libbsp/sparc/shared/spw/grspw.c | 171 ++--
1 files changed, 110 insertions(+), 61 deletions(-)
diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw.c
b/c/src/lib/libbsp/sparc/shared/spw/grspw.c
index 5cedcb9..ebf7fe0 100644
--- a/c/src/lib/libbsp/sparc/sha
---
c/src/lib/libbsp/sparc/shared/pci/grpci2.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/c/src/lib/libbsp/sparc/shared/pci/grpci2.c
b/c/src/lib/libbsp/sparc/shared/pci/grpci2.c
index 55a69ef..3891c25 100644
--- a/c/src/lib/libbsp/sparc/shared/pci/grpci2.c
+++
The _Watchdog_Nanoseconds_since_tick_handler() function caller does
not take into account that the timer counter may wrap, underflow or
overflow. Instead, the driver must take that into account. This
GPTIMER DrvMgr driver patch makes use of the IRQ-Pending bit to
determine if a underflow has happen
Interrupts have not been test yet
---
c/src/lib/libbsp/sparc/Makefile.am |2 +
c/src/lib/libbsp/sparc/leon2/Makefile.am |2 +
c/src/lib/libbsp/sparc/leon2/preinstall.am |4 +
c/src/lib/libbsp/sparc/leon3/Makefile.am |2 +
c/src/lib/libbsp
---
c/src/lib/libbsp/sparc/shared/timer/gptimer.c |8 +---
1 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/c/src/lib/libbsp/sparc/shared/timer/gptimer.c
b/c/src/lib/libbsp/sparc/shared/timer/gptimer.c
index 2314a3b..6a7e835 100644
--- a/c/src/lib/libbsp/sparc/shared/timer/g
---
c/src/lib/libbsp/sparc/Makefile.am |4 +
c/src/lib/libbsp/sparc/leon2/Makefile.am |5 ++
c/src/lib/libbsp/sparc/leon2/preinstall.am |4 +
c/src/lib/libbsp/sparc/leon3/Makefile.am |6 ++
c/src/lib/libbsp/sparc/leon3/preinstall.am
---
c/src/lib/libbsp/sparc/shared/net/greth.c | 33
1 files changed, 14 insertions(+), 19 deletions(-)
diff --git a/c/src/lib/libbsp/sparc/shared/net/greth.c
b/c/src/lib/libbsp/sparc/shared/net/greth.c
index ac4ec77..d721586 100644
--- a/c/src/lib/libbsp/sparc/shar
---
c/src/lib/libbsp/sparc/leon2/pci/at697_pci.c |9 -
1 files changed, 8 insertions(+), 1 deletions(-)
diff --git a/c/src/lib/libbsp/sparc/leon2/pci/at697_pci.c
b/c/src/lib/libbsp/sparc/leon2/pci/at697_pci.c
index 76b9c4d..6289a56 100644
--- a/c/src/lib/libbsp/sparc/leon2/pci/at697_
Looking at PHY Ctrl register without reseting it will give back
old register content, that is not stable. Instead the PHY is
reset and the autonogotiation capability is read out and
started if present.
---
c/src/lib/libbsp/sparc/shared/net/greth.c | 17 +++--
1 files changed, 11 inse
In some GRPCI cores not setting the cache line size could result
in long prefetches on the AMBA bus which would lead to bad
performance when doing PCI reads to GRPCI target interface (DMA).
---
c/src/lib/libbsp/sparc/shared/pci/grpci.c |7 +++
1 files changed, 7 insertions(+), 0 deletions(
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