On 12/04/2014 04:26 PM, Sebastian Huber wrote:
On 04/12/14 15:54, Daniel Hellstrom wrote:
On 12/04/2014 03:26 PM, Sebastian Huber wrote:
On 04/12/14 13:10, Daniel Hellstrom wrote:
The LEON3 BSP has been using mcpu=cypress which is a
SPARCV7 that is compatible with SPARCv8 CPUs. This patch
enables the relatively new LEON3 model and generates
SPARCv7 compatible code. This shuold be comptabile with
all single-core LEON3/4 systems. The LEON3 model is
required for SMP to make GCC generate the CAS instruction.
Does this mean that the ERC32 is v8 compatible and the LEON3 in general only v7
+ CAS?
No, ERC32 is V7 compatible. LEON3 is in general V8 but could be V7, LEON3 multi-core systems generally have CAS.
Ok, but if a LEON3 has not always the CAS instruction, then this is a problem
since for example libstdc++ uses atomic operations internally.
In that case that is not a good solution. Please drop this patch. Then we are back to adding a specific LEON3 SMP BSP config (see http://lists.rtems.org/pipermail/devel/2014-July/007257.html), or to
add a LEON3-with-CAS BSP that can do both single-core and SMP.
The toolchain multilib is still valid though.
DanielH
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