On 14.09.23 23:56, Chris Johns wrote:
On 14/9/2023 7:33 pm, Sebastian Huber wrote:
On 14.09.23 10:51, Chris Johns wrote:
On 14/9/2023 5:58 pm, Sebastian Huber wrote:
On 14.09.23 09:38, Chris Johns wrote:
The issue I faced was no score interface to get the TLS base for a thread to
determine
Update #4920.
---
cpukit/libdl/rtl-tls.c | 73 --
1 file changed, 6 insertions(+), 67 deletions(-)
diff --git a/cpukit/libdl/rtl-tls.c b/cpukit/libdl/rtl-tls.c
index 95ca47fe6a..7eb12831eb 100644
--- a/cpukit/libdl/rtl-tls.c
+++ b/cpukit/libdl/rtl-tls.c
@@
Add _CPU_Get_TLS_thread_pointer() to get the thread pointer which is
used to get the address of thread-local storage objects associated with
a thread.
Update #4920.
---
.../cpu/aarch64/include/rtems/score/cpuimpl.h | 7
.../cpu/arm/include/rtems/score/cpuimpl.h | 7
.../cpu/bfin/i
Update #4954.
---
bsps/sparc/leon3/clock/ckinit.c | 35 ++--
bsps/sparc/leon3/include/bsp/leon3.h | 4
bsps/sparc/leon3/start/cpucounter.c | 2 +-
3 files changed, 3 insertions(+), 38 deletions(-)
diff --git a/bsps/sparc/leon3/clock/ckinit.c b/bsps/sparc/leon3
This is necessary to run the tests on SIS with profiling enabled.
Update #4954.
---
bsps/include/bsp/fatal.h| 1 -
bsps/sparc/leon3/clock/ckinit.c | 6 ++
2 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/bsps/include/bsp/fatal.h b/bsps/include/bsp/fatal.h
index 4b7d0f6ce
Enable a BSP-specific CPU counter implementation.
Update #4954.
---
bsps/sparc/erc32/clock/ckinit.c | 9 +--
.../sparc/include/bsp/sparc-counter.h | 57 +--
bsps/sparc/leon2/clock/ckinit.c | 8 +--
bsps/sparc/leon3/clock/ckinit.c
Sebastian Huber (6):
bsps/leon3: Optional IRQ(A)MP timestamp support
sparc: Move CPU counter implementation
bsps/leon3: Make GPTIMER fall back mandatory
bsps/leon3: Simplify clock and CPU counter
bsps/leon3: Use custom CPU counter implementation
bsps/leon3: Use DSU time tag for GR712RC
Share the timecounter instance between the clock and the CPU counter.
This greatly simplifies the clock driver since we have to do the device
selection only in one place, the CPU counter support.
Update #4954.
---
bsps/sparc/leon3/clock/ckinit.c | 130 +--
bsps/sparc/
Update #4954.
---
bsps/sparc/leon3/include/bsp/leon3.h | 2 +-
bsps/sparc/leon3/start/cpucounter.c| 63 +++---
spec/build/bsps/sparc/leon3/grp.yml| 2 +
spec/build/bsps/sparc/leon3/optdsubase.yml | 18 +++
4 files changed, 78 insertions(+), 7 deletions(-
Merge the timecounter and CPU counter support for the leon3 BSP family.
Remove now unused functions from the CPU counter support of the erc32
and leon3 BSPs.
Update #4954.
---
bsps/sparc/include/bsp/sparc-counter.h | 12 --
bsps/sparc/leon3/clock/ckinit.c | 2 +-
bsps/sparc/le
It will be difficult to replace how well the PowerPC motor controllers work for
motor control when the canned, pre-written eTPU code do what you need. It's a
great architecture, the DMA chain is well thought out.
There is a Bosch "GTM" Generic Timer IP module that is intended to replace the
e
> On Sep 14, 2023, at 15:22 , o...@c-mauderer.de wrote:
>
> At the moment a lot of chips start to provide two different ARM cores. One
> bigger (often Cortex-A; sometimes multicore) and one smaller one (most of the
> time Cortex-M). I haven't used both CPUs of these dual CPU systems yet. But
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