On 25/10/19 8:41 am, Chris Johns wrote:
> On 24/10/19 7:50 pm, Sebastian Huber wrote:
>> On 24/10/2019 03:41, Jonathan Brandmeyer wrote:
>>> On Wed, Oct 23, 2019 at 6:04 AM Thomas Doerfler
>>> wrote:
Hi,
most likely the RAM areas have been mapped to the lowest-possible
non
On 24/10/19 7:50 pm, Sebastian Huber wrote:
> On 24/10/2019 03:41, Jonathan Brandmeyer wrote:
>> On Wed, Oct 23, 2019 at 6:04 AM Thomas Doerfler
>> wrote:
>>>
>>> Hi,
>>>
>>> most likely the RAM areas have been mapped to the lowest-possible
>>> non-NULL address, and they can be mapped to an addres
On 24/10/2019 03:41, Jonathan Brandmeyer wrote:
On Wed, Oct 23, 2019 at 6:04 AM Thomas Doerfler
wrote:
Hi,
most likely the RAM areas have been mapped to the lowest-possible
non-NULL address, and they can be mapped to an address boundary matching
the RAM size. zc702 has a 1MByte ram, mapped to
On Wed, Oct 23, 2019 at 6:04 AM Thomas Doerfler
wrote:
>
> Hi,
>
> most likely the RAM areas have been mapped to the lowest-possible
> non-NULL address, and they can be mapped to an address boundary matching
> the RAM size. zc702 has a 1MByte ram, mapped to the 1MByte boundary,
> zc706 has a 4MByt
Hi,
most likely the RAM areas have been mapped to the lowest-possible
non-NULL address, and they can be mapped to an address boundary matching
the RAM size. zc702 has a 1MByte ram, mapped to the 1MByte boundary,
zc706 has a 4MByte RAM mapped to the 4MByte boundary.
Having an identical starting ad
Hello,
why is the ZYNQ_RAM_ORIGIN different in these two BSP variants?
AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_zc702],
[ZYNQ_RAM_ORIGIN="0x0010"
ZYNQ_RAM_MMU="${ZYNQ_RAM_ORIGIN}"
ZYNQ_RAM_MMU_LENGTH="16k"
ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN} + 0x40
