[PATCH v2 3/3] dev/serial: Add Zynq UART kernel I/O support

Replace the BSP_CONSOLE_MINOR BSP option for the Xilinx Zynq BSPs with the new BSP option ZYNQ_UART_KERNEL_IO_BASE_ADDR. Move the kernel I/O support to a shared file. --- bsps/aarch64/xilinx-zynqmp/console/console.c | 41 ++ bsps/arm/xilinx-zynq/console/console-config.c | 50

[PATCH v2 1/3] dev/serial: Simplify some Zynq UART functions

Make the initialization and polled functions independent of the Termios context. This helps to implement the kernel I/O support without a dependency on the Termios framework. --- bsps/aarch64/xilinx-zynqmp/console/console.c | 23 --- bsps/arm/xilinx-zynq/console/debug-console.c

[PATCH 1/3] dev/serial: Simplify some Zynq UART functions

Make the initialization and polled functions independent of the Termios context. This helps to implement the kernel I/O support without a dependency on the Termios framework. --- bsps/aarch64/xilinx-zynqmp/console/console.c | 23 --- bsps/arm/xilinx-zynq/console/debug-console.c

[PATCH 3/3] dev/serial: Add Zynq UART kernel I/O support

Replace the BSP_CONSOLE_MINOR BSP option for the Xilinx Zynq BSPs with the new BSP option ZYNQ_UART_KERNEL_IO_BASE_ADDR. Move the kernel I/O support to a shared file. --- bsps/aarch64/xilinx-zynqmp/console/console.c | 41 ++ bsps/arm/xilinx-zynq/console/console-config.c | 50

[PATCH 0/3] Add shared Zynq UART kernel I/O support

Sebastian Huber (3): dev/serial: Simplify some Zynq UART functions dev/serial: Add ZYNQ_UART_[01]_BASE_ADDR dev/serial: Add Zynq UART kernel I/O support bsps/aarch64/xilinx-zynqmp/console/console.c | 58 +++ bsps/arm/xilinx-zynq/console/console-config.c | 49

Re: Zynq on qemu with a USB support or any hot plugged usb wifi adaptor

Hello Ashish, USB works on real hardware, however, I guess nobody tried it so far on Qemu. -- embedded brains GmbH & Co. KG Herr Sebastian HUBER Dornierstr. 4 82178 Puchheim Germany email: sebastian.hu...@embedded-brains.de phone: +49-89-18 94 741 - 16 fax: +49-89-18 94 741 - 08 Registergeric

Zynq on qemu with a USB support or any hot plugged usb wifi adaptor

Hello, New to rtems and I am trying to Zynq on qemu with usb doesn't work for me or which BSP will work with USB and hot plugged adapter on qemu any suggestions? thanks ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel

does anyone tried "Zynq on Qemu with a USB"

I am trying to use zynq on qemu and plugging usb device or unplugging device doesn't show any log message and libbsd testsuite media01 is used and using command ``` sudo qemu-system-arm -serial null -serial mon:stdio -nographic \

[PATCH 6/6] build: Add mkimage support for arm/xilinx-zynq

Update #4272. --- spec/build/bsps/arm/xilinx-zynq/grp.yml | 6 spec/build/bsps/arm/xilinx-zynq/mkimage.yml | 39 + 2 files changed, 45 insertions(+) create mode 100644 spec/build/bsps/arm/xilinx-zynq/mkimage.yml diff --git a/spec/build/bsps/arm/xilinx-zynq/grp.yml

Re: [PATCH rtems-lwip 1/1] Add ZYNQ 7000 support

A few comments inline below. For the most part, this looks good. On Sat, Jan 6, 2024 at 9:15 AM wrote: > From: Bernd Moessner > > This patch adds support for the Xilinx ZYNQ 7000 series. Please note that > this patch also affects ZYNQ Ultrascale+ as I`ve moved some functions f

[PATCH rtems-lwip 1/1] Add ZYNQ 7000 support

From: Bernd Moessner This patch adds support for the Xilinx ZYNQ 7000 series. Please note that this patch also affects ZYNQ Ultrascale+ as I`ve moved some functions from zynqmp/xil_shims.c to xilinx/freertos.c and xilinx/xscugic.c to share them between both families. --- defs/bsps/aarch64

[PATCH rtems-lwip 0/1] Add ZYNQ 7000 Support

From: Bernd Moessner This patch adds support for the ZYNQ 7000 Family. It targets the AVNET Picozed board, but the other boards in RTEMS can be added in a similar way. The patch also affects the ZYNQ Ultrascale+ Family as I have moved some code from xil_shims.c to a location which can be

[FIX rtems master] Fix comments in Zynq testsuite files

From: Bernd Moessner --- bsps/arm/xilinx-zynq/config/xilinx_zynq_a9_qemu-testsuite.tcfg | 2 +- bsps/arm/xilinx-zynq/config/xilinx_zynq_microzed-testsuite.tcfg | 2 +- bsps/arm/xilinx-zynq/config/xilinx_zynq_picozed-testsuite.tcfg | 2 +- bsps/arm/xilinx-zynq/config/xilinx_zynq_pynq

[PATCH 4/5] arm/xilinx-zynq: Do not provide legacy API

The header file provides a legacy API. Do not provide it by default through . --- bsps/arm/shared/clock/clock-a9mpcore.c | 2 +- bsps/arm/xilinx-zynq/include/bsp/irq.h | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/bsps/arm/shared/clock/clock-a9mpcore.c b/bsps/arm/shared

[PATCH 5/5] arm/xilinx-zynq: Initialize debug console once

--- bsps/arm/xilinx-zynq/console/debug-console.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/bsps/arm/xilinx-zynq/console/debug-console.c b/bsps/arm/xilinx-zynq/console/debug-console.c index 6e89ad0323..d398ca7988 100644 --- a/bsps/arm/xilinx-zynq/console/debug-console.c +++ b/bsps

[PATCH 4/4] arm/xilinx-zynq: Improve Doxygen file comments

--- bsps/arm/xilinx-zynq/console/console-config.c | 12 ++-- bsps/arm/xilinx-zynq/console/debug-console.c | 13 +++-- bsps/arm/xilinx-zynq/start/bspreset.c | 12 ++-- bsps/arm/xilinx-zynq/start/bspstart.c | 13 +++-- bsps/arm/xilinx-zynq/start

Re: CAN driver implementation for Xilinx Zynq

Dear Carlo and others, On Friday 03 of March 2023 16:03:52 Gedare Bloom wrote: > On Wed, Mar 1, 2023 at 3:14 AM wrote: > > As part of an internship at the German Aerospace Center, I am currently > > working on the implementation of a CAN driver for a Xilinx Zynq SoC. For >

Re: CAN driver implementation for Xilinx Zynq

On Wed, Mar 1, 2023 at 3:14 AM wrote: > > Hello, > > As part of an internship at the German Aerospace Center, I am currently > working on the implementation of a CAN driver for a Xilinx Zynq SoC. For this > I used the existing CAN framework /dev/can/can.h. A merge request w

Re: CAN driver implementation for Xilinx Zynq

> > Carlo Brokering > > > > > > *Von:* Prashanth S > *Gesendet:* Donnerstag, 2. März 2023 07:25 > *An:* Brokering, Carlo > *Cc:* devel@rtems.org > *Betreff:* Re: CAN driver implementation for Xilinx Zynq > > > > Hi @carlo.broker...@dlr.de , > &g

AW: CAN driver implementation for Xilinx Zynq

Prashanth S Gesendet: Donnerstag, 2. März 2023 07:25 An: Brokering, Carlo Cc: devel@rtems.org Betreff: Re: CAN driver implementation for Xilinx Zynq Hi @carlo.broker...@dlr.de <mailto:carlo.broker...@dlr.de> , > the design for the rx data path including the RxFIFO looks promising. If

Re: CAN driver implementation for Xilinx Zynq

> > bus->can_dev_ops->dev_ioctl(bus->priv, NULL, 0); > > > > Regards > > Carlo Brokering > > > > *Von:* Prashanth S > *Gesendet:* Mittwoch, 1. März 2023 11:53 > *An:* Brokering, Carlo > *Cc:* devel@rtems.org > *Betreff:* Re: CAN driver implemen

AW: CAN driver implementation for Xilinx Zynq

ation for Xilinx Zynq Hello @Carlo Brokering, > As part of an internship at the German Aerospace Center, I am currently > working on the implementation of a CAN driver for a Xilinx > Zynq SoC. For this I used the existing CAN framework /dev/can/can.h. A merge > request will

Re: CAN driver implementation for Xilinx Zynq

Hello @Carlo Brokering, > As part of an internship at the German Aerospace Center, I am currently working on the implementation of a CAN driver for a Xilinx > Zynq SoC. For this I used the existing CAN framework /dev/can/can.h. A merge request will follow soon. All the best for your Inte

CAN driver implementation for Xilinx Zynq

Hello, As part of an internship at the German Aerospace Center, I am currently working on the implementation of a CAN driver for a Xilinx Zynq SoC. For this I used the existing CAN framework /dev/can/can.h. A merge request will follow soon. Here's what I'd like to add to the frame

Re: [PATCH] bsps/xilinx-zynq: Init debug console only once

OK and thanks Chris On 29/6/2022 12:19 am, Sebastian Huber wrote: > Initialize the debug console only once during early system initialization. > --- > bsps/arm/xilinx-zynq/console/debug-console.c | 5 + > 1 file changed, 1 insertion(+), 4 deletions(-) > > diff --git a/bs

[PATCH] bsps/xilinx-zynq: Init debug console only once

Initialize the debug console only once during early system initialization. --- bsps/arm/xilinx-zynq/console/debug-console.c | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/bsps/arm/xilinx-zynq/console/debug-console.c b/bsps/arm/xilinx-zynq/console/debug-console.c index

Re: [PATCH] user: Document Zynq network

+.. Copyright (C) 2015, 2020 Chris Johns (chr...@rtems.org) > > xilinx-zynq > === > @@ -49,6 +49,22 @@ tools or a bootloader will be overwritten. > The settings for the console driver can be changed by the user > application through the termios API afterwards. > &g

[PATCH] user: Document Zynq network

/arm/xilinx-zynq.rst +++ b/user/bsps/arm/xilinx-zynq.rst @@ -1,6 +1,6 @@ .. SPDX-License-Identifier: CC-BY-SA-4.0 -.. Copyright (C) 2020 Chris Johns (chr...@rtems.org) +.. Copyright (C) 2015, 2020 Chris Johns (chr...@rtems.org) xilinx-zynq === @@ -49,6 +49,22 @@ tools or a bootloader

V4 Zynq/ZynqMP UART driver

change. I have tested this on zynqmp with no UART issues and I have tested it on a zynq application. All testing is in hardware. Chris ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel

[PATCH v4] arm/xilinx: Fix zynq-uart interrupt receive

From: Chris Johns - Trigger on a single character entering the RX FIFO - Disable the RX timeout - Send up to a FIFO full of data --- bsps/include/dev/serial/zynq-uart.h | 1 + bsps/shared/dev/serial/zynq-uart-polled.c | 45 ++--- bsps/shared/dev/serial/zynq-uart.c| 78

RE: V2 : Zynq/ZynqMP UART driver

> -Original Message- > From: devel On Behalf Of chr...@rtems.org > Sent: Thursday, September 9, 2021 10:25 AM > To: devel@rtems.org > Subject: V2 : Zynq/ZynqMP UART driver > > Hi, > > I have tested this version on zynq and zynqmp hardware and I am not seei

[PATCH] arm/xilinx: Fix zynq-uart interrupt receive

From: Chris Johns - Trigger on a single character entering the RX FIFO - Disable the RX timeout - Send up to a FIFO full of data --- bsps/include/dev/serial/zynq-uart.h | 1 + bsps/shared/dev/serial/zynq-uart-polled.c | 21 ++-- bsps/shared/dev/serial/zynq-uart.c| 66

V2 : Zynq/ZynqMP UART driver

Hi, I have tested this version on zynq and zynqmp hardware and I am not seeing any issues. I was seeing lost data with the serial port connected to FreeBSD 13 running ser2net. After careful review iof the driver I ended up spinning up a RPi3 with Ubunutu and ser2net it working as expected and

Re: [PATCH rtems v1 1/2] bsps/zynq: Moved general i2c files to shared directories

looks fine to me. On Mon, Aug 23, 2021 at 4:41 PM Stephen Clark wrote: > > Certain files related to the Zynq BSP's I2C driver are useable by the ZynqMP > BSP as well. > Moved these files to shared directory in anticipation of I2C support for > ZynqMP. > --- > .../

[PATCH rtems v1 1/2] bsps/zynq: Moved general i2c files to shared directories

Certain files related to the Zynq BSP's I2C driver are useable by the ZynqMP BSP as well. Moved these files to shared directory in anticipation of I2C support for ZynqMP. --- .../include/bsp => include/dev/i2c}/cadence-i2c-regs.h | 0 .../include/bsp => include/dev/i2c}/ca

Re: [PATCH rtems] arm/xilinx: Fix zynq-uart interrupt receive

; QEMU works fine either way. The ZynqMP hardware is what has issues without >>> the >>> null write. >> OK >> >>> The problem is that it's picky about which characters will actually fix the >>> data >>> loss/corruption. >>>

Re: [PATCH rtems] arm/xilinx: Fix zynq-uart interrupt receive

Null was chosen specifically because it's not printable. It shows up on Zynq consoles I have running a a junk character. Without this null print, I see garbage output and it eventually starts printing text correctly. How many characters? It smells like a clock is hunting. I suggest you ask Joe

Re: [PATCH rtems] arm/xilinx: Fix zynq-uart interrupt receive

n. > I've seen that both space and null will do it while letters and numbers won't. > Null was chosen specifically because it's not printable. It shows up on Zynq consoles I have running a a junk character. > Without this null print, I see garbage > output and it eve

Re: [PATCH rtems] arm/xilinx: Fix zynq-uart interrupt receive

garbage output and it eventually starts printing text correctly. One nit below. +    while (ctx->tx_queued < 32 && len > 0) { Is 32 the size of the TX FIFO? It would be nice to see that as a sizeof() or a #define for better context. The Versal is 32 bytes and the Zynq is 64 byt

Re: [PATCH rtems] arm/xilinx: Fix zynq-uart interrupt receive

fine for better context. The Versal is 32 bytes and the Zynq is 64 bytes. The Versal is based on the Arm IP r1p5-00rel1 and the Zynq and ZynqMP is based on Cadence IP. We either accept the lesser size on the Zynq and ZyncMP or the zynq_uart struct will need specialised info from each variant of de

Re: Xilinx Zynq console rx not working

f half the FIFO size. I > >>>> suspect > >>>> there is an assumption the RX timeout will fire but it is not. > >>>> > >>> Doing this is questionable > >>> > >>> https://git.rtems.org/rtems/tree/bsps/shared/dev/serial/zynq-uart.c#n

Re: Xilinx Zynq console rx not working

mption the RX timeout will fire but it is not. > >>> > >> Doing this is questionable > >> > >> https://git.rtems.org/rtems/tree/bsps/shared/dev/serial/zynq-uart.c#n222 > >> > >> You cannot send a character when touching the attributes. Where is

Re: [PATCH rtems] arm/xilinx: Fix zynq-uart interrupt receive

zynq_uart_reset_tx_flush before adjusting any registers to avoid data loss there. One nit below. Kinsey On 8/17/2021 03:39, chr...@rtems.org wrote: From: Chris Johns - Trigger on a single character entering the RX FIFO - Disable the RX timeout - Send up to a FIFO full of data --- bsps/include/dev/serial/zynq

Re: [PATCH rtems] arm/xilinx: Fix zynq-uart interrupt receive

> On 18 Aug 2021, at 4:41 pm, jan.som...@dlr.de wrote: > > Is this patch also something to backport to RTEMS5 or is this problem only > specific to the current version? I have not considered doing this as 5 works on the Zynq. If termios is the same we may look at this. And V

RE: [PATCH rtems] arm/xilinx: Fix zynq-uart interrupt receive

de...@rtems.org > Subject: Re: [PATCH rtems] arm/xilinx: Fix zynq-uart interrupt receive > > On 17/8/21 11:21 pm, Joel Sherrill wrote: > > I'm only asking where and how did this get tested? BSPs? Qemu/HW? > Input? > > I listed the testing in the covering email ... >

Re: [PATCH rtems] arm/xilinx: Fix zynq-uart interrupt receive

On 17/8/21 11:21 pm, Joel Sherrill wrote: > I'm only asking where and how did this get tested? BSPs? Qemu/HW? Input? I listed the testing in the covering email ... https://lists.rtems.org/pipermail/devel/2021-August/068938.html > Long overdue. I just hope it stays fixed. I agree. Chris ___

Re: [PATCH rtems] arm/xilinx: Fix zynq-uart interrupt receive

Send up to a FIFO full of data > --- > bsps/include/dev/serial/zynq-uart.h | 1 + > bsps/shared/dev/serial/zynq-uart-polled.c | 18 ++- > bsps/shared/dev/serial/zynq-uart.c| 66 +++ > 3 files changed, 36 insertions(+), 49 deletions(-) > > d

[PATCH rtems] arm/xilinx: Fix zynq-uart interrupt receive

From: Chris Johns - Trigger on a single character entering the RX FIFO - Disable the RX timeout - Send up to a FIFO full of data --- bsps/include/dev/serial/zynq-uart.h | 1 + bsps/shared/dev/serial/zynq-uart-polled.c | 18 ++- bsps/shared/dev/serial/zynq-uart.c| 66

Xilinx Zynq UART Driver Fixes

Hi This patch fixes the receive on Zynq-7000 SoC hardware. My QEMU still does not want to receive anything but that could be my QEMU. I have tested it on Zynq custom hardware with a complete application and on a Zedboard running fileio. I would welcome Ultrascale testing and I will try the

Re: Xilinx Zynq console rx not working

but it is not. >>>> >>> Doing this is questionable >>> >>> https://git.rtems.org/rtems/tree/bsps/shared/dev/serial/zynq-uart.c#n222 >>> >>> You cannot send a character when touching the attributes. Where is this >>> hardware &g

Re: Xilinx Zynq console rx not working

he receive FIFO trigger interrupt is >>> only >>> raised when the FIFO reaches the set threshold of half the FIFO size. I >>> suspect >>> there is an assumption the RX timeout will fire but it is not. >>> >> Doing this is questionable >> >&g

Re: Xilinx Zynq console rx not working

Ah. Yes. I did not test input. Thanks for the heads up. Sent from my iPhone > On Aug 16, 2021, at 09:04, Kinsey Moore wrote: > > On 8/16/2021 08:40, mben...@windhoverlabs.com wrote: >> I just built and ran the zc702 build on Qemu yesterday with no problems. I >> ran the hello.exe sample.

Re: Xilinx Zynq console rx not working

On 8/16/2021 08:40, mben...@windhoverlabs.com wrote: I just built and ran the zc702 build on Qemu yesterday with no problems. I ran the hello.exe sample. But, I launched it using Vitis 2020.2 so maybe it was a qemu difference? Master branch. RTEMS 6. Sent from my iPhone Output seems to w

Re: Xilinx Zynq console rx not working

>> raised when the FIFO reaches the set threshold of half the FIFO size. I >>> suspect >>> there is an assumption the RX timeout will fire but it is not. >> Doing this is questionable >> https://git.rtems.org/rtems/tree/bsps/shared/dev/serial/zynq-uart.c

Re: Xilinx Zynq console rx not working

FIFO size. I suspect there is an assumption the RX timeout will fire but it is not. Doing this is questionable https://git.rtems.org/rtems/tree/bsps/shared/dev/serial/zynq-uart.c#n222 You cannot send a character when touching the attributes. Where is this hardware bug documented by Xilinx

Re: Xilinx Zynq console rx not working

On 16/8/21 6:38 pm, Chris Johns wrote: > On 14/8/21 12:40 am, Kinsey Moore wrote: >> On 8/13/2021 03:05, Chris Johns wrote: >>> Hi, >>> >>> I am bring up a major app on RTEMS 6 and LibBSD on custom Zynq hardware and >>> I am >>> not getting

Re: Xilinx Zynq console rx not working

On 14/8/21 12:40 am, Kinsey Moore wrote: > On 8/13/2021 03:05, Chris Johns wrote: >> Hi, >> >> I am bring up a major app on RTEMS 6 and LibBSD on custom Zynq hardware and >> I am >> not getting any receive interrupts from the console UART. The same hardware >

Re: Xilinx Zynq console rx not working

On 8/13/2021 03:05, Chris Johns wrote: Hi, I am bring up a major app on RTEMS 6 and LibBSD on custom Zynq hardware and I am not getting any receive interrupts from the console UART. The same hardware works with RTEMS 4.11 and RTEMS 5. I also do not see any console input with qemu and I thought

Xilinx Zynq console rx not working

Hi, I am bring up a major app on RTEMS 6 and LibBSD on custom Zynq hardware and I am not getting any receive interrupts from the console UART. The same hardware works with RTEMS 4.11 and RTEMS 5. I also do not see any console input with qemu and I thought this was something in qemu but I am now

Typical workflows for RTEMS-based development using Xilinx Zynq 7000

mmand-line Tools and System Debugger XSDB) and a more traditional one using GDB/OpenOCD. Being more familiar with the GDB/OpenOCD approach, I was wondering which tools/workflows for working with Xilinx Zynq are used or considered best practice by the RTEMS community. Related question: does a

Re: [PATCH] bsps/zynq-uart: Make post baud change kick global

the logic reset and kick apply in any locations where the baud > rate could be changed. > --- > bsps/aarch64/xilinx-zynqmp/console/console.c | 5 - > bsps/shared/dev/serial/zynq-uart-polled.c| 6 ++ > bsps/shared/dev/serial/zynq-uart.c | 8 > 3 f

[PATCH] bsps/zynq-uart: Make post baud change kick global

changed. --- bsps/aarch64/xilinx-zynqmp/console/console.c | 5 - bsps/shared/dev/serial/zynq-uart-polled.c| 6 ++ bsps/shared/dev/serial/zynq-uart.c | 8 3 files changed, 14 insertions(+), 5 deletions(-) diff --git a/bsps/aarch64/xilinx-zynqmp/console/console.c b/bsps

Re: Booting a rtems exe on Zynq UltraScale+ MPSoC ZCU106 board

On 21/4/21 2:37 pm, Richi Dubey wrote: > Cool, I tried building uboot for the board from this > repo: https://github.com/Xilinx/u-boot-xlnx > , and the instructions for zcu106 are > here:  > https://github.com/Xilinx/u-boot-xlnx/blob/master/doc/board/xilinx/zy

Re: Booting a rtems exe on Zynq UltraScale+ MPSoC ZCU106 board

gt;>> Thanks for your quick responses. >>> >>> I rebuilt the .img file with -O rtems option, and I think it is the >>> standard uboot available from PetaLinux. It still fails, but I think it is >>> related to RTEMS now: >>> --

Re: Booting a rtems exe on Zynq UltraScale+ MPSoC ZCU106 board

e to minicom 2.7.1 OPTIONS: I18n Compiled on May  6 2018, 08:02:47. Port /dev/ttyUSB32, 18:14:14 Press CTRL-K Z for help on special keys Xilinx Zynq MP First Stage Boot Loader Release 2020.1   Jan  1 2021  -  07:33:16 NOTICE:  ATF running

Re: Booting a rtems exe on Zynq UltraScale+ MPSoC ZCU106 board

with -O rtems option, and I think it is the >> standard uboot available from PetaLinux. It still fails, but I think it is >> related to RTEMS now: >> ---- >> Welcome to minicom 2.7.1 >> >> OPTIONS: I18n >> Compile

Re: Booting a rtems exe on Zynq UltraScale+ MPSoC ZCU106 board

minicom 2.7.1 OPTIONS: I18n Compiled on May  6 2018, 08:02:47.Welcome to minicom 2.7.1 OPTIONS: I18n Compiled on May  6 2018, 08:02:47. Port /dev/ttyUSB32, 18:14:14 Press CTRL-K Z for help on special keys Xilinx Zynq MP First Stage Boot Loader Release 2020.

Re: Booting a rtems exe on Zynq UltraScale+ MPSoC ZCU106 board

t; OPTIONS: I18n > Compiled on May 6 2018, 08:02:47. > Port /dev/ttyUSB32, 18:14:14 > > Press CTRL-K Z for help on special keys > > Xilinx Zynq MP First Stage Boot Loader > Release 2020.1 Jan 1 2021 - 07:33:16 > NOTICE: ATF running on XCZU7EV/silicon v4/RTL5.1 at 0xf

Re: Booting a rtems exe on Zynq UltraScale+ MPSoC ZCU106 board

TIONS: I18n Compiled on May  6 2018, 08:02:47. Port /dev/ttyUSB32, 18:14:14 Press CTRL-K Z for help on special keys Xilinx Zynq MP First Stage Boot Loader Release 2020.1   Jan  1 2021  -  07:33:16 NOTICE:  ATF running on XCZU7EV/silicon v4/RTL5.1 at 0xfffea000 NOTICE:  BL31: Secure code at 0x600

Re: Booting a rtems exe on Zynq UltraScale+ MPSoC ZCU106 board

: I18n Compiled on May 6 2018, 08:02:47.Welcome to minicom 2.7.1 OPTIONS: I18n Compiled on May 6 2018, 08:02:47. Port /dev/ttyUSB32, 18:14:14 Press CTRL-K Z for help on special keys Xilinx Zynq MP First Stage Boot Loader Release 2020.1 Jan 1 2021 - 07:33:16 NOTICE: ATF running on XCZU7EV

RE: Booting a rtems exe on Zynq UltraScale+ MPSoC ZCU106 board

difference between -O rtems and -O linux is subtle, but maybe that helps. Best regards, Jan From: devel On Behalf Of Richi Dubey Sent: Wednesday, April 14, 2021 3:22 PM To: Kinsey Moore Cc: rtems-de...@rtems.org Subject: Re: Booting a rtems exe on Zynq UltraScale+ MPSoC ZCU106 board Trying

Re: Booting a rtems exe on Zynq UltraScale+ MPSoC ZCU106 board

*To:* Kinsey Moore mailto:kinsey.mo...@oarcorp.com>>; rtems-de...@rtems.org <mailto:rtems-de...@rtems.org> mailto:devel@rtems.org>> *Subject:* Booting a rtems exe on Zynq UltraScale+ MPSoC ZCU106 board Hi, I followed the 8.2.23 docs <https://docs.rtems.org/br

Re: Booting a rtems exe on Zynq UltraScale+ MPSoC ZCU106 board

.@rtems.org < > devel@rtems.org> > *Subject:* Booting a rtems exe on Zynq UltraScale+ MPSoC ZCU106 board > > > > Hi, > > > > I followed the 8.2.23 docs > <https://docs.rtems.org/branches/master/user/bsps/bsps-arm.html#xilinx-zynqmp> > to > build rtems

RE: Booting a rtems exe on Zynq UltraScale+ MPSoC ZCU106 board

Subject: Booting a rtems exe on Zynq UltraScale+ MPSoC ZCU106 board Hi, I followed the 8.2.23 docs<https://docs.rtems.org/branches/master/user/bsps/bsps-arm.html#xilinx-zynqmp> to build rtems for the xilinx_zynqmp_ultra96 bsp since it was the only bsp corresponding to xilinx-zynqmp

Booting a rtems exe on Zynq UltraScale+ MPSoC ZCU106 board

Hi, I followed the 8.2.23 docs to build rtems for the xilinx_zynqmp_ultra96 bsp since it was the only bsp corresponding to xilinx-zynqmp in the rtems-bsp. Then I followed the boot via Uboot section 8.2.1.1 on docs

RE: [rtems5 PATCH 0/5] Backport zynq SPI drivers to rtems5

> -Original Message- > From: Chris Johns > Sent: Thursday, April 1, 2021 2:15 AM > To: Sommer, Jan ; devel@rtems.org > Subject: Re: [rtems5 PATCH 0/5] Backport zynq SPI drivers to rtems5 > > Hi Jan, > > This looks good. Has this been tested on zync hardware

Re: [rtems5 PATCH 0/5] Backport zynq SPI drivers to rtems5

m/include/bsp/xilinx-axi-spi.h | 67 +++ > bsps/arm/shared/spi/cadence-spi.c | 444 ++ > bsps/arm/shared/spi/xilinx-axi-spi.c | 402 > c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am | 4 + > .../lib/libbsp/arm/xilinx-zynqmp/Makefile.am |

[rtems5 PATCH 0/5] Backport zynq SPI drivers to rtems5

rm/shared/spi/cadence-spi.c | 444 ++ bsps/arm/shared/spi/xilinx-axi-spi.c | 402 c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am | 4 + .../lib/libbsp/arm/xilinx-zynqmp/Makefile.am | 4 + cpukit/Makefile.am| 4 + c

RE: [PATCH v2] user/bsps: Mention fixed console baud rate for zynq

Thanks. Pushed to master. > -Original Message- > From: Gedare Bloom > Sent: Monday, March 15, 2021 11:08 PM > To: Joel Sherrill > Cc: Sommer, Jan ; rtems-de...@rtems.org > > Subject: Re: [PATCH v2] user/bsps: Mention fixed console baud rate for zynq > >

Re: [PATCH v2] user/bsps: Mention fixed console baud rate for zynq

nal Message- >> > From: Sommer, Jan >> > Sent: Friday, March 5, 2021 7:04 PM >> > To: devel@rtems.org >> > Cc: Sommer, Jan >> > Subject: [PATCH v2] user/bsps: Mention fixed console baud rate for zynq >> > >> > --- >> > user/bsp

Re: [PATCH v2] user/bsps: Mention fixed console baud rate for zynq

t; > Cc: Sommer, Jan > > Subject: [PATCH v2] user/bsps: Mention fixed console baud rate for zynq > > > > --- > > user/bsps/arm/xilinx-zynq.rst | 12 > > 1 file changed, 12 insertions(+) > > > > diff --git a/user/bsps/arm/xilinx-zynq.rst >

RE: [PATCH v2] user/bsps: Mention fixed console baud rate for zynq

Could someone please have a look at this patch? > -Original Message- > From: Sommer, Jan > Sent: Friday, March 5, 2021 7:04 PM > To: devel@rtems.org > Cc: Sommer, Jan > Subject: [PATCH v2] user/bsps: Mention fixed console baud rate for zynq > > --- > user/bs

Re: Qemu on Zynq Hanging

On 11/3/21 5:17 am, Joel Sherrill wrote: > On Wed, Mar 10, 2021 at 11:42 AM Chris Johns <mailto:chr...@rtems.org>> wrote: > > On 11/3/21 1:22 am, Joel Sherrill wrote: > > I see qemu hanging for days testing zynq. This is on the Xeon Centos > computer

Re: Qemu on Zynq Hanging

On Wed, Mar 10, 2021 at 11:42 AM Chris Johns wrote: > On 11/3/21 1:22 am, Joel Sherrill wrote: > > I see qemu hanging for days testing zynq. This is on the Xeon Centos > computer I > > use for batch and automated testing. > > > > This is ps but top shows six qemu p

Re: Qemu on Zynq Hanging

On 11/3/21 1:22 am, Joel Sherrill wrote: > I see qemu hanging for days testing zynq. This is on the Xeon Centos computer > I > use for batch and automated testing. > > This is ps but top shows six qemu processes having around 2231:52 in CPU time > used and using 100% CPU. Lu

Qemu on Zynq Hanging

Hi I see qemu hanging for days testing zynq. This is on the Xeon Centos computer I use for batch and automated testing. This is ps but top shows six qemu processes having around 2231:52 in CPU time used and using 100% CPU. Luckily this machine has more cores than this. Any ideas? [joel@devel

RE: [5 PATCH 0/2] Backport fixes to zynq uart to RTEMS5

> -Original Message- > From: Chris Johns > Sent: Tuesday, March 9, 2021 3:20 AM > To: Sommer, Jan ; devel@rtems.org > Subject: Re: [5 PATCH 0/2] Backport fixes to zynq uart to RTEMS5 > > OK for 5. > Thanks. Pushed to 5. > On 6/3/21 5:58 am, Jan Somm

Re: [5 PATCH 0/2] Backport fixes to zynq uart to RTEMS5

On Fri, Mar 5, 2021 at 11:59 AM Jan Sommer wrote: > > This patchset backports the commits of Kinsey Moore and myself, which > fix the stdin behavior for the zynq-uart based console driver. > I checked the behavior on hardware with the termios.exe application. > Before, the sc

Re: [5 PATCH 0/2] Backport fixes to zynq uart to RTEMS5

OK for 5. On 6/3/21 5:58 am, Jan Sommer wrote: > This patchset backports the commits of Kinsey Moore and myself, which > fix the stdin behavior for the zynq-uart based console driver. > I checked the behavior on hardware with the termios.exe application. > Before, the scanf and simil

[PATCH 2/2] bsps/shared: Allow setting baud rate for zynq uart

Closes #4236 --- bsps/arm/shared/serial/zynq-uart.c | 21 - 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/bsps/arm/shared/serial/zynq-uart.c b/bsps/arm/shared/serial/zynq-uart.c index a0dfc0c929..f298719fde 100644 --- a/bsps/arm/shared/serial/zynq-uart.c

[5 PATCH 0/2] Backport fixes to zynq uart to RTEMS5

This patchset backports the commits of Kinsey Moore and myself, which fix the stdin behavior for the zynq-uart based console driver. I checked the behavior on hardware with the termios.exe application. Before, the scanf and similar functions do not wait for user input and return immediately. With

[PATCH 1/2] zynq-uart: Fix set_attributes implementation

From: Kinsey Moore The zynq-uart set_attributes implementation was configured to always return false which causes spconsole01 to fail. This restores the disabled implementation which sets the baud rate registers appropriately and allows spconsole01 to pass. This also expands the set_attributes

RE: [PATCH v3 1/1] bsps/shared: Allow setting baud rate for zynq uart

Thanks. Pushed to master. > -Original Message- > From: Gedare Bloom > Sent: Friday, March 5, 2021 6:48 PM > To: Sommer, Jan > Cc: devel@rtems.org > Subject: Re: [PATCH v3 1/1] bsps/shared: Allow setting baud rate for zynq > uart > > Looks good to me. >

[PATCH v2] user/bsps: Mention fixed console baud rate for zynq

--- user/bsps/arm/xilinx-zynq.rst | 12 1 file changed, 12 insertions(+) diff --git a/user/bsps/arm/xilinx-zynq.rst b/user/bsps/arm/xilinx-zynq.rst index 365c336..29f9cb0 100644 --- a/user/bsps/arm/xilinx-zynq.rst +++ b/user/bsps/arm/xilinx-zynq.rst @@ -37,6 +37,18 @@ to return the p

RE: [PATCH v3 0/1] Enable baud rate selection for zynq uart

, 2021 6:54 PM To: Sommer, Jan Cc: rtems-de...@rtems.org Subject: Re: [PATCH v3 0/1] Enable baud rate selection for zynq uart On Fri, Mar 5, 2021 at 11:42 AM Jan Sommer mailto:jan.som...@dlr.de>> wrote: v3: - Make sure the baud registers are not modified for baud rate B0 B0 is an odd bi

Re: [PATCH v3 0/1] Enable baud rate selection for zynq uart

ns. I'm not saying anything negative about your patches. Just that B0 is a weird corner of POSIX and computing history. > > v2: > - Use rtems_baud_to_number instead of duplicating baud table > > This patch allows to set the baud rate of the zynq-uart using the termios > API. >

Re: [PATCH v3 1/1] bsps/shared: Allow setting baud rate for zynq uart

Looks good to me. On Fri, Mar 5, 2021 at 10:42 AM Jan Sommer wrote: > > --- > bsps/shared/dev/serial/zynq-uart.c | 21 - > 1 file changed, 16 insertions(+), 5 deletions(-) > > diff --git a/bsps/shared/dev/serial/zynq-uart.c > b/bsps/shared/dev/seria

[PATCH v3 0/1] Enable baud rate selection for zynq uart

v3: - Make sure the baud registers are not modified for baud rate B0 v2: - Use rtems_baud_to_number instead of duplicating baud table This patch allows to set the baud rate of the zynq-uart using the termios API. I could change the baud rate successfully on hardware using the termios

[PATCH v3 1/1] bsps/shared: Allow setting baud rate for zynq uart

--- bsps/shared/dev/serial/zynq-uart.c | 21 - 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/bsps/shared/dev/serial/zynq-uart.c b/bsps/shared/dev/serial/zynq-uart.c index 8f17d3ca65..cd0d0e7584 100644 --- a/bsps/shared/dev/serial/zynq-uart.c +++ b/bsps/shared

RE: [PATCH v2 1/1] bsps/shared: Allow setting baud rate for zynq uart

> -Original Message- > From: Gedare Bloom > Sent: Friday, March 5, 2021 4:36 PM > To: Sommer, Jan > Cc: devel@rtems.org > Subject: Re: [PATCH v2 1/1] bsps/shared: Allow setting baud rate for zynq > uart > > On Mon, Feb 22, 2021 at 9:23 AM Jan Sommer w

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