Re: Cacheable OCM support for the Zynq BSP

On 11/6/20 12:22 pm, Jonathan Brandmeyer wrote: > On Wed, Jun 10, 2020 at 8:08 PM Chris Johns > wrote: > > Could you please create a ticket for this change and attach the patch? > Please > set the milestone to 6. The change might be OK for 5.2 so a new ticket >

Re: Cacheable OCM support for the Zynq BSP

On Wed, Jun 10, 2020 at 8:08 PM Chris Johns wrote: > > Could you please create a ticket for this change and attach the patch? > Please > set the milestone to 6. The change might be OK for 5.2 so a new ticket for > that > milestone can be created once we have the change merged onto master. > > htt

Re: Cacheable OCM support for the Zynq BSP

On 11/6/20 10:10 am, Jonathan Brandmeyer wrote: > On Wed, Jun 10, 2020 at 5:57 PM Chris Johns > wrote: > > On 11/6/20 9:30 am, Jonathan Brandmeyer wrote: > > We've patched the RTEMS kernel in order to support using the Zynq > on-chip > memory > > as inner

Re: Cacheable OCM support for the Zynq BSP

On Wed, Jun 10, 2020 at 5:57 PM Chris Johns wrote: > On 11/6/20 9:30 am, Jonathan Brandmeyer wrote: > > We've patched the RTEMS kernel in order to support using the Zynq > on-chip memory > > as inner-cacheable memory. The enclosed patch should apply cleanly to > master. > > > > Background: Durin

Re: Cacheable OCM support for the Zynq BSP

On 11/6/20 9:30 am, Jonathan Brandmeyer wrote: > We've patched the RTEMS kernel in order to support using the Zynq on-chip > memory > as inner-cacheable memory.  The enclosed patch should apply cleanly to master. > > Background: During normal startup, the ROM bootloader performs vendor-specific >

Cacheable OCM support for the Zynq BSP

We've patched the RTEMS kernel in order to support using the Zynq on-chip memory as inner-cacheable memory. The enclosed patch should apply cleanly to master. Background: During normal startup, the ROM bootloader performs vendor-specific initialization of core 1, and then sits in a wait-for-even