Re: [PATCH] aarch64: Use page table level 0

2022-07-19 Thread Sebastian Huber
On 19/07/2022 18:58, Kinsey Moore wrote: + if ( begin >= max_mappable || end > max_mappable ) { +rtems_fatal_error_occurred( RTEMS_INVALID_ADDRESS ); + } Such a fatal error is not really helpful, since you cannot get the error location from the fatal source/code pair. I would add a new c

Re: [PATCH] aarch64: Use page table level 0

2022-07-19 Thread Chris Johns
On 20/7/2022 2:58 am, Kinsey Moore wrote: > This alters the AArch64 page table generation and mapping code and MMU > configuration to use page table level 0 in addition to levels 1, 2, and > 3. This allows the mapping of up to 48 bits of memory space and is the > maximum that can be mapped without

[PATCH] aarch64: Use page table level 0

2022-07-19 Thread Kinsey Moore
This alters the AArch64 page table generation and mapping code and MMU configuration to use page table level 0 in addition to levels 1, 2, and 3. This allows the mapping of up to 48 bits of memory space and is the maximum that can be mapped without relying on additional processor extensions. Mappin