Re: Upgrading tools - gcc, binutils, and gdb

perspective, having it also in RTEMS6 releases sounds very good. Thanks, Daniel Den 5/30/2024 kl. 1:44 AM, skrev Joel Sherrill: Thanks. It may be a couple of days before I have a merge request ready. Thanks. On Wed, May 29, 2024, 6:28 PM Chris Johns wrote: On 30/5/2024 7:22 am, Joel Sherrill

Re: [PATCH rtems-tools v4] tester/rtemstoolkit: add renode implementation

eally interesting GSoC project. /Daniel On 2023-08-18 16:25, Gedare Bloom wrote: Daniel / Gaisler: On Sun, Aug 6, 2023 at 11:05 PM Muhammad Sulthan Mazaya wrote: Add gpl to the prom binary file name + include the leon3 prom assembly source with licensing commented --- .../testing

Re: UT699 ABI CFLAGS Question

Hi Joel, The UT699 uses --mcpu=leon because it has a matching ISA. The mcpu=leon3 generates CAS instruction which is not present in UT699. With --mcpu=leon is used with --mfix-ut699 there are some UT699 specifics enabled. I think the yml-file looks correct. /Daniel On 2023-04-28 23:38

Re: Project Discussion for GSoC 2023

-examples https://www.gaisler.com/index.php/products/debug-tools/grmon3 Kind Regards, Daniel On 2023-02-13 04:25, Viraj Jagadale wrote: Dear Community, I am interested in contributing to RTEMS and will be participating in GSoC 2023. I am interested in projects #4595 <ht

Re: [PATCH 1/2] bsps/include/libchip: Remove legacy networking header file

copied to rtems-net-legacy but not deleted here. On Mon, Nov 14, 2022 at 2:50 AM Daniel Cederman wrote: --- bsps/include/libchip/greth.h | 152 --- 1 file changed, 152 deletions(-) delete mode 100644 bsps/include/libchip/greth.h diff --git a/bsps/include/libchip

[PATCH 6/6] testsuites/smptests: Change license to BSD-2 for files with Gaisler copyright

This patch changes the license to BSD-2 for all source files where the copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research. Updates #3053. --- testsuites/smptests/smpcapture02/init.c | 25 ++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --gi

[PATCH 5/6] cpukit: Change license to BSD-2 for files with Gaisler copyright

/ #ifndef __PCI_CFG_STATIC_H__ diff --git a/cpukit/include/pci/ids_extra.h b/cpukit/include/pci/ids_extra.h index 41907ba33b..aa0605758a 100644 --- a/cpukit/include/pci/ids_extra.h +++ b/cpukit/include/pci/ids_extra.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @fil

[PATCH 3/6] bsps/sparc: Change license to BSD-2 for files with Gaisler copyright

This patch changes the license to BSD-2 for all source files where the copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research. Some files also includes copyright right statements from OAR and/or embedded Brains in addition to Gaisler. Updates #3053. --- bsps/sparc/erc32/includ

[PATCH 4/6] bsps/riscv: Change license to BSD-2 for files with Gaisler copyright

This patch changes the license to BSD-2 for all source files where the copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research. Some files also includes copyright right statements from OAR and/or embedded Brains in addition to Gaisler. Updates #3053. --- bsps/riscv/griscv/clock

[PATCH 2/6] bsps/shared/grlib: Change license to BSD-2 for files with Gaisler copyright

This patch changes the license to BSD-2 for all source files where the copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research. Some files also includes copyright right statements from OAR and/or embedded Brains in addition to Gaisler. Updates #3053. --- bsps/shared/grlib/1553/

[PATCH 1/6] bsps/include/grlib: Change license to BSD-2 for files with Gaisler copyright

This patch changes the license to BSD-2 for all source files where the copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research. Some files also includes copyright right statements from OAR and/or embedded Brains in addition to Gaisler. Updates #3053. --- bsps/include/grlib/ahbs

[PATCH 1/2] bsps/include/libchip: Remove legacy networking header file

--- bsps/include/libchip/greth.h | 152 --- 1 file changed, 152 deletions(-) delete mode 100644 bsps/include/libchip/greth.h diff --git a/bsps/include/libchip/greth.h b/bsps/include/libchip/greth.h deleted file mode 100644 index c6e000dbd3..00 --- a/bsps/i

[PATCH 2/2] user: Add documentation for leon2 and leon3 BSP

--- user/bsps/bsps-sparc.rst | 74 ++-- 1 file changed, 72 insertions(+), 2 deletions(-) diff --git a/user/bsps/bsps-sparc.rst b/user/bsps/bsps-sparc.rst index d0316a9..a2c2a47 100644 --- a/user/bsps/bsps-sparc.rst +++ b/user/bsps/bsps-sparc.rst @@ -20,11 +20,8

[PATCH 1/2] user: Add documentation for NOEL-V BSP

--- user/bsps/bsps-riscv.rst | 57 1 file changed, 57 insertions(+) diff --git a/user/bsps/bsps-riscv.rst b/user/bsps/bsps-riscv.rst index 48e7ee7..73a6038 100644 --- a/user/bsps/bsps-riscv.rst +++ b/user/bsps/bsps-riscv.rst @@ -248,6 +248,63 @@ Serial ter

[PATCH v6 1/1] bsp/riscv: Add NOEL-V BSP

From: Martin Aberg Added support for Cobham Gaisler NOEL-V systems. The NOEL-V support is implemented as a riscv BSP. Both 32-bit and 64-bit processor systems are supported. Cobham Gaisler's NOEL-V RISC-V processor IP is described here: https://www.gaisler.com/NOELV Compatible with the followi

[PATCH v6 0/1] NOEL-V BSP

v6 Change family entry to noel in all BSP build specs Synchronize irq.h and riscv.h with versions in riscv BSP Martin Aberg (1): bsp/riscv: Add NOEL-V BSP bsps/include/bsp/fatal.h | 3 + bsps/riscv/noel/console/console-config.c | 208 ++ bsps/riscv/n

Re: [PATCH v5 0/1] NOEL-V BSP

e yet. --joel On Tue, Aug 30, 2022 at 6:39 AM Daniel Cederman wrote: Hi, Is it OK to push this or should I wait for additional comments? On 2022-08-25 10:33, Daniel Cederman wrote: v5 Made RISCV_CONSOLE_MAX_APBUART_DEVICES an option bsp_fatal if no uart clock frequen

Re: [PATCH v5 1/1] bsp/riscv: Add NOEL-V BSP

On 2022-08-30 21:04, Sebastian Huber wrote: On 25/08/2022 10:33, Daniel Cederman wrote: +#define BSP_INTERRUPT_VECTOR_MIN 0 + +#define BSP_INTERRUPT_VECTOR_MAX RISCV_INTERRUPT_VECTOR_EXTERNAL(RISCV_MAXIMUM_EXTERNAL_INTERRUPTS - 1) I am a bit surprised that this worked, since the API changed

Re: [PATCH v5 0/1] NOEL-V BSP

Hi, Is it OK to push this or should I wait for additional comments? On 2022-08-25 10:33, Daniel Cederman wrote: v5 Made RISCV_CONSOLE_MAX_APBUART_DEVICES an option bsp_fatal if no uart clock frequency is found Changed CONSOLE_USE_INTERRUPTS to BSP_CONSOLE_USE_INTERRUPTS Added error codes for

[PATCH v5 1/1] bsp/riscv: Add NOEL-V BSP

From: Martin Aberg Added support for Cobham Gaisler NOEL-V systems. The NOEL-V support is implemented as a riscv BSP. Both 32-bit and 64-bit processor systems are supported. Cobham Gaisler's NOEL-V RISC-V processor IP is described here: https://www.gaisler.com/NOELV Compatible with the followi

[PATCH v5 0/1] NOEL-V BSP

v5 Made RISCV_CONSOLE_MAX_APBUART_DEVICES an option bsp_fatal if no uart clock frequency is found Changed CONSOLE_USE_INTERRUPTS to BSP_CONSOLE_USE_INTERRUPTS Added error codes for APBUART Get work area size from /memory node Martin Aberg (1): bsp/riscv: Add NOEL-V BSP bsps/include/bsp/fatal.h

[PATCH 2/2] tester: Load RISC-V image using -bios and increase memory size

This avoids overlapping the RTEMS image with the builtin opensbi image and the location of the fdt. --- tester/rtems/testing/bsps/rv64imafd_medany.ini | 3 ++- tester/rtems/testing/bsps/rv64imafdc_medany.ini | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/tester/rtems/test

[PATCH 1/2] tester: Add option to specify how to load image with QEMU

Defaults to "-kernel", but can be changed to, for example, "-bios". --- tester/rtems/testing/qemu.cfg | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/tester/rtems/testing/qemu.cfg b/tester/rtems/testing/qemu.cfg index 3c51bee..0b592ef 100644 --- a/tester/rtems/testing/qemu.

Re: [PATCH v2 1/1] bsp/riscv: Work area size based on /memory node in fdt

On 2022-08-19 11:16, Hesham Almatary wrote: On Thu, 18 Aug 2022 at 13:55, Daniel Cederman wrote: I missed your comment, but have made the change now. Are there any instructions on how to run the RISCV BSP tests on QEMU or Spike? I could not get it to work. Do I need a special version of QEMU

Re: [PATCH v2 1/1] bsp/riscv: Work area size based on /memory node in fdt

t;end == 0" with "end == NULL" as per my comment above. Also please test on other RISC-V QEMU platforms to make sure nothing got broken. On Wed, 17 Aug 2022 at 14:10, Joel Sherrill wrote: I'm ok with this if Hesham acks as well. --joel On Wed, Aug 17, 2022 at 6:35 AM Daniel Ce

[PATCH v2 1/1] bsp/riscv: Work area size based on /memory node in fdt

Uses the first entry in the /memory node to determine the end of the work area. Falls back on linker symbol if unable to parse the node. --- bsps/riscv/shared/start/bspgetworkarea.c | 144 +++ spec/build/bsps/riscv/riscv/obj.yml | 1 + 2 files changed, 145 insertions(+)

Re: [PATCH] bsp/riscv: Work area size based on /memory node in fdt

Sure, I can move it to the shared directory (riscv/shared/start). On 2022-08-17 11:16, Hesham Almatary wrote: Thanks for the patch. LGTM. I wonder if we can also reuse that for the generic shared RISC-V BSP (e.g., bsps/riscv/riscv) instead of just NOEL? On Wed, 17 Aug 2022 at 09:58, Daniel

[PATCH] bsp/riscv: Work area size based on /memory node in fdt

Uses the first entry in the /memory node to determine the end of the work area. Falls back on linker symbol if unable to parse the node. --- bsps/riscv/noel/start/bspgetworkarea.c | 144 + spec/build/bsps/riscv/noel/obj.yml | 1 + 2 files changed, 145 insertions(+) c

Re: [PATCH v4 1/2] bsp/riscv: Work area size based on stack pointer

On 2022-08-15 17:19, Hesham Almatary wrote: On Mon, 15 Aug 2022 at 15:35, Daniel Cederman wrote: On 2022-08-15 15:43, Hesham Almatary wrote: On Mon, 15 Aug 2022 at 08:16, Daniel Cederman wrote: From: Martin Aberg Remember the initial stack pointer in start.S. It can later be used to

Re: [PATCH v4 1/2] bsp/riscv: Work area size based on stack pointer

On 2022-08-15 15:43, Hesham Almatary wrote: On Mon, 15 Aug 2022 at 08:16, Daniel Cederman wrote: From: Martin Aberg Remember the initial stack pointer in start.S. It can later be used to determine top of RAM. --- bsps/riscv/include/bsp/start.h| 67

[PATCH v4 1/2] bsp/riscv: Work area size based on stack pointer

From: Martin Aberg Remember the initial stack pointer in start.S. It can later be used to determine top of RAM. --- bsps/riscv/include/bsp/start.h| 67 .../shared/start/bspgetworkarea-fromstack.c | 76 +++ bsps/riscv/shared/start/start.S

[PATCH v4 2/2] bsp/riscv: Add NOEL-V BSP

From: Martin Aberg Added support for Cobham Gaisler NOEL-V systems. The NOEL-V support is implemented as a riscv BSP. Both 32-bit and 64-bit processor systems are supported. Cobham Gaisler's NOEL-V RISC-V processor IP is described here: https://www.gaisler.com/NOELV Compatible with the followi

[PATCH v4 0/2] NOEL-V BSP

v4 Changed .data to .bsp_start_data Moved assembly defines to asm.h Use the common optextirqmax Use optconsoleirq instead of optconirq Declared riscv_start_stack_pointer as const Martin Aberg (2): bsp/riscv: Work area size based on stack pointer bsp/riscv: Add NOEL-V BSP bsps/riscv/include/b

[PATCH v3 2/2] bsp/riscv: Add NOEL-V BSP

From: Martin Aberg Added support for Cobham Gaisler NOEL-V systems. The NOEL-V support is implemented as a riscv BSP. Both 32-bit and 64-bit processor systems are supported. Cobham Gaisler's NOEL-V RISC-V processor IP is described here: https://www.gaisler.com/NOELV Compatible with the followi

[PATCH v3 1/2] bsp/riscv: Work area size based on stack pointer

From: Martin Aberg Remember the initial stack pointer in start.S. It can later be used to determine top of RAM. --- bsps/riscv/include/bsp/start.h| 67 .../shared/start/bspgetworkarea-fromstack.c | 76 +++ bsps/riscv/shared/start/start.S

[PATCH v3 0/2] NOEL-V BSP

Thanks Joel, I have updated the license information. Martin Aberg (2): bsp/riscv: Work area size based on stack pointer bsp/riscv: Add NOEL-V BSP bsps/riscv/include/bsp/start.h| 67 ++ bsps/riscv/noel/console/console-config.c | 209 ++ bsps/riscv/noe

[PATCH v2 2/2] bsp/riscv: Add NOEL-V BSP

From: Martin Aberg Added support for Cobham Gaisler NOEL-V systems. The NOEL-V support is implemented as a riscv BSP. Both 32-bit and 64-bit processor systems are supported. Cobham Gaisler's NOEL-V RISC-V processor IP is described here: https://www.gaisler.com/NOELV Compatible with the followi

[PATCH v2 1/2] bsp/riscv: Work area size based on stack pointer

From: Martin Aberg Remember the initial stack pointer in start.S. It can later be used to determine top of RAM. --- bsps/riscv/include/bsp/start.h| 65 +++ .../shared/start/bspgetworkarea-fromstack.c | 53 +++ bsps/riscv/shared/start/start.S

[PATCH v2 0/2] NOEL-V BSP

Thank you Sebastian for reviewing the patches. I have updated them according to your comments. Martin Aberg (2): bsp/riscv: Work area size based on stack pointer bsp/riscv: Add NOEL-V BSP bsps/riscv/include/bsp/start.h| 65 ++ bsps/riscv/noel/console/console-config.c

[PATCH 5/5] bsp/riscv: Add NOEL-V configuration files

From: Martin Aberg --- bsps/riscv/noel/config/noel32im.cfg | 9 + bsps/riscv/noel/config/noel32imafd.cfg | 9 + bsps/riscv/noel/config/noel64imac.cfg | 9 + bsps/riscv/noel/config/noel64imafd.cfg | 9 + bsps/riscv/noel/config/noel64imafdc.cfg | 9 +

[PATCH 4/5] bsp/riscv: Add NOEL-V BSP build specification

From: Martin Aberg --- spec/build/bsps/riscv/noel/abi.yml| 48 +++ spec/build/bsps/riscv/noel/bspnoel32im.yml| 19 ++ spec/build/bsps/riscv/noel/bspnoel32imafd.yml | 19 ++ spec/build/bsps/riscv/noel/bspnoel64imac.yml | 19 ++ spec/build/bsps/riscv/noel/b

[PATCH 3/5] bsp/riscv: Work area size based on stack pointer

From: Martin Aberg Remember the initial stack pointer in start.S. It can later be used to determine top of RAM. --- bsps/riscv/include/bsp/start.h| 65 +++ .../shared/start/bspgetworkarea-fromstack.c | 53 +++ bsps/riscv/shared/start/start.S

[PATCH 2/5] bsp/riscv: Add NOEL-V BSP

From: Martin Aberg Added support for Cobham Gaisler NOEL-V systems. The NOEL-V support is implemented as a riscv BSP. Both 32-bit and 64-bit processor systems are supported. Cobham Gaisler's NOEL-V RISC-V processor IP is described here: https://www.gaisler.com/NOELV Compatible with the followi

[PATCH 0/5] NOEL-V BSP

Hello, This patch set adds support for the NOEL-V RISC-V processors. Currently there is a problem linking the ts-validation-cache.exe test for 64-bit configurations. It fails with the following error message: bsps/riscv/shared/start/start.S:100:(.bsp_start_text+0x70): relocation truncated to fit

[PATCH 1/5] apbuart_termios: use bsp/irq.h

From: Martin Aberg The real dependency in this case is on rtems/irq-extension.h. The theme in other other console drivers is to get it via bsp/irq.h, so that pattern is followed. --- bsps/shared/grlib/uart/apbuart_termios.c | 1 + 1 file changed, 1 insertion(+) diff --git a/bsps/shared/grlib/ua

Re: [PATCH v1 1/1] gpiolib/grgpio: Add support for newer grgpio features

fo.irq = -1" will disable all interrupts from that GPIO core? Kind Regards, Daniel On 2021-08-25 10:13, jan.som...@dlr.de wrote: Does anyone have any objections to this? See also https://lists.rtems.org/pipermail/devel/2021-July/068086.html for the cover letter. Best regards

Re: [PATCH v2 1/1] grlib/genirq: Taking into account that it could be more than one ISR enabled/disabled

Looks good. Thanks, Daniel On 2021-04-15 11:52, Moyano, Gabriel wrote: --- bsps/shared/grlib/irq/genirq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/bsps/shared/grlib/irq/genirq.c b/bsps/shared/grlib/irq/genirq.c index 285416b0d3..ca80445c70 100644

Re: [PATCH 0/1] grlib/genirq: Issue when enabling/disabling interrupt

enabled = 1;     }     isrentry = isrentry->next;     } Kind Regards, Daniel On 2021-04-15 09:07, jan.som...@dlr.de wrote: Does someone have any objections to this patch? I would like to push it to master and 5. Or should we reach out to someone at Gaisler to check if it is ok? Best rega

Re: Fwd: New Defects reported by Coverity Scan for RTEMS

yes, it must have, so I will look into that. /Daniel On 2021-03-12 14:07, Joel Sherrill wrote: Without looking, I would assume this was introduced by Daniel's recent patches. -- Forwarded message - From: mailto:scan-ad...@coverity.com>> Date: Fri, Mar 12,

Re: [PATCH 00/26] leon: various fixes and TN0018 errata workaround

On 2021-03-08 16:43, Joel Sherrill wrote: On Sun, Mar 7, 2021 at 9:51 AM Daniel Hellstrom <mailto:dan...@gaisler.com>> wrote: On 2020-09-23 17:05, Gedare Bloom wrote: On Wed, Sep 23, 2020 at 4:34 AM Daniel Hellstrom <mailto:dan...@gaisler.com> wrote:

[PATCH, RSB] sparc, leon: GCC-7.5 patch needed for LEON3FT TN0018 errata

Set the __FIX_LEON3FT_TN0018 define for the affected LEON3FT multilibs: * UT699 * UT700 * GR712RC Update #4322. --- rtems/config/5/rtems-sparc.bset | 6 ++ 1 file changed, 6 insertions(+) diff --git a/rtems/config/5/rtems-sparc.bset b/rtems/config/5/rtems-sparc.bset index ccb3e10..3d4d403

Re: [PATCH 00/26] leon: various fixes and TN0018 errata workaround

On 2020-09-23 17:05, Gedare Bloom wrote: On Wed, Sep 23, 2020 at 4:34 AM Daniel Hellstrom wrote: Hi Sebastian, Thanks for asking and sorry for dropping the ball on these. The status is that two needs updating (BSD license for new CAN files and the last tn0018 patch needs some redesign based

Re: [PATCH] grtc.c: Fix four Missing break in switch Coverity errors

Hi, The patch looks good. The fall through is by design intended. Thanks, Daniel Hellstrom Software Section Head T : +46 (0) 31 775 8657 F : +46 (0) 31 421407 dan...@gaisler.com <mailto:dan...@gaisler.com> To receive update notifications, please subscribe tohttps://gaisler.com/news

Re: Device Drivers Which Include mkdir("/dev")

cing a new supporting function rtems_io_register_name_dircreat()? However, I suppose that would mean we would drag in mkdir() routines in all cases even when the IO drivers are only registering devices directly under /dev/ which is the most common case. Daniel On 2021-02-20 20:31, Chris J

Re: [PATCH 0/4] RISC-V: NOEL-V BSP

Hi, Thanks all for your comments. The logs have been attached, I'm a bit unsure why the PSXKEY07 was reported as a failure from the log, we should probably double check that can get back to you. /Daniel On 2021-02-09 16:59, Sebastian Huber wrote: On 08/02/2021 20:44, D

[PATCH 4/4 v2] bsp/riscv: Add NOEL-V BSP build specification

From: Martin Aberg --- spec/build/bsps/riscv/noel/abi.yml | 48 +++ spec/build/bsps/riscv/noel/bspnoel32im.yml | 19 + spec/build/bsps/riscv/noel/bspnoel32imafd.yml | 19 + spec/build/bsps/riscv/noel/bspnoel64imac.yml | 19 + spec/bu

[PATCH 3/4 v2] bsp/riscv: work area size based on stack pointer

From: Martin Aberg Remember the initial stack pointer in start.S. It can later be used to determine top of RAM. --- bsps/riscv/include/bsp/start.h | 65 ++ bsps/riscv/shared/start/bspgetworkarea-fromstack.c | 53 ++ bsps/riscv/shared/start/

[PATCH] bsp/riscv: move riscv/riscv build spec one level up

From: Martin Aberg These build specifications can be useful for other BSPs aswell. --- spec/build/bsps/riscv/{riscv => }/objsmp.yml | 0 spec/build/bsps/riscv/{riscv => }/optextirqmax.yml | 0 spec/build/bsps/riscv/{riscv => }/optfdtcpyro.yml | 0 spec/build/bsps/riscv/{riscv => }/optf

[PATCH 2/4 v2] bsp/riscv: Add NOEL-V BSP

From: Martin Aberg Added support for Cobham Gaisler NOEL-V systems. The NOEL-V support is implemented as a riscv BSP. Both 32-bit and 64-bit processor systems are supported. Cobham Gaisler's NOEL-V RISC-V processor IP is described here: https://www.gaisler.com/NOELV Compatible with the followi

Re: [PATCH] bsp,riscv: change to BSD-2 license on console_config.c

Ok, didn't notice that. Will the noelv bsp rebase on top for it. Thanks, Daniel Hellstrom Software Section Head T : +46 (0) 31 775 8657 F : +46 (0) 31 421407 dan...@gaisler.com <mailto:dan...@gaisler.com> To receive update notifications, please subscribe tohttps://gaisler.com

[PATCH] bsp,riscv: change to BSD-2 license on console_config.c

--- bsps/riscv/riscv/console/console-config.c | 25 ++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/bsps/riscv/riscv/console/console-config.c b/bsps/riscv/riscv/console/console-config.c index 9454eac..c7a0261 100644 --- a/bsps/riscv/riscv/console/console-c

[PATCH 4/4] bsp/riscv: Add NOEL-V BSP build specification

From: Martin Aberg --- spec/build/bsps/riscv/noel/abi.yml | 48 ++ spec/build/bsps/riscv/noel/bspnoel32im.yml | 19 + spec/build/bsps/riscv/noel/bspnoel32imafd.yml | 19 + spec/build/bsps/riscv/noel/bspnoel64imac.yml | 19 + spec/bui

[PATCH 3/4] bsp/riscv: work area size based on stack pointer

From: Martin Aberg Remember the initial stack pointer in start.S. It can later be used to determine top of RAM. --- bsps/riscv/shared/start/bspgetworkarea-fromstack.c | 55 ++ bsps/riscv/shared/start/start.S| 15 ++ 2 files changed, 70 insertions(+) c

[PATCH 2/4] bsp/riscv: Add NOEL-V BSP

From: Martin Aberg Added support for Cobham Gaisler NOEL-V systems. The NOEL-V support is implemented as a riscv BSP. Both 32-bit and 64-bit processor systems are supported. Cobham Gaisler's NOEL-V RISC-V processor IP is described here: https://www.gaisler.com/NOELV Compatible with the followi

[PATCH 1/4] apbuart_termios: use bsp/irq.h

From: Martin Aberg The real dependency in this case is on rtems/irq-extension.h. The theme in other other console drivers is to get it via bsp/irq.h, so that pattern is followed. --- bsps/shared/grlib/uart/apbuart_termios.c | 1 + 1 file changed, 1 insertion(+) diff --git a/bsps/shared/grlib/ua

[PATCH 0/4] RISC-V: NOEL-V BSP

, however it is reusing the APBUART device driver as it is used by NOEL-V designs. There is a patch that allows auto-detection of End-of-Memory similar to the LEON BSPs using the same GRLIB SW ecosystem. Thanks, Martin & Daniel --- bsps/riscv/noel/console/console-config.c |

[GCC PATCH] rtems: add __FIX_LEON3FT_TN0018 for affected targets

Enable a define FIX_LEON3FT_TN0018 for the LEON3FT targets affecdted by the GRLIB-TN-0018 errata described here: https://www.gaisler.com/notes --- gcc/config/sparc/rtemself.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/gcc/config/sparc/rtemself.h b/gcc/config/sparc/rtemself.h index 657

Re: Various Gaisler Patches

n they are related to the same thing (like the tn0009 ticket Sebastian created), then there will be one. So approx 20 tickets then. /Daniel 2020-10-16 14:07 skrev Joel Sherrill: Hi I assume these are needed on 5 and will all have tickets. Is that right? And will also be applie

Re: [PATCH 01/26] sparc: Remove sequences that the B2BST scan script warns about

2020-10-16 07:40 skrev Sebastian Huber: On 29/06/2020 13:27, Daniel Hellstrom wrote: From: Daniel Cederman --- cpukit/score/cpu/sparc/cpu_asm.S | 6 -- cpukit/score/cpu/sparc/syscall.S | 3 ++- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/cpukit/score/cpu/sparc

Re: [PATCH 08/26] leon, can: introduce common CAN baud-rate calculation function

2020-10-16 07:35 skrev Sebastian Huber: Hello Daniel, On 29/06/2020 14:27, Sebastian Huber wrote: On 29/06/2020 14:22, Daniel Hellstrom wrote: On 2020-06-29 13:48, Sebastian Huber wrote: On 29/06/2020 13:27, Daniel Hellstrom wrote: +/* + *  COPYRIGHT (c) 2019. + *  Cobham Gaisler AB

Re: [PATCHv3 08/26] leon, can: introduce common CAN baud-rate calculation function

Thanks for the comment Joel, I sent an updated patch. I noticed just now I've also missed @brief so I will had that too before pushing.. /Daniel 2020-10-16 14:06 skrev Joel Sherrill: On Fri, Oct 16, 2020, 6:50 AM Daniel Hellstrom wrote: Reimplemented the baud-rate algorithm from sc

[PATCHv4 08/26] leon, can: introduce common CAN baud-rate calculation function

Reimplemented the baud-rate algorithm from scratch to cope with GRCAN, GRCANFD and OC_CAN devices. --- bsps/headers.am | 1 + bsps/include/grlib/canbtrs.h| 80 ++ bsps/shared/grlib-sources.am| 1 + bsps/shared/grlib/can/canbtrs.c | 143 +

[PATCH] LICENSE.BSD-2-Clause: sync with template from RTEMS homepage

This adds the doxygen template. --- LICENSE.BSD-2-Clause | 17 +++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/LICENSE.BSD-2-Clause b/LICENSE.BSD-2-Clause index 60a74e9..349b8df 100644 --- a/LICENSE.BSD-2-Clause +++ b/LICENSE.BSD-2-Clause @@ -23,9 +23,22 @@ copyrig

[PATCHv2 01/26] sparc: Remove sequences that the B2BST scan script warns about

From: Daniel Cederman Update #4154. --- cpukit/score/cpu/sparc/cpu_asm.S | 6 -- cpukit/score/cpu/sparc/syscall.S | 3 ++- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/cpukit/score/cpu/sparc/cpu_asm.S b/cpukit/score/cpu/sparc/cpu_asm.S index d5afd5f..bfad3fb 100644 --- a

[PATCHv2 25/26] sparc,leon: avoid triggering LEON3FT errata TN-0009

Update #4154. --- cpukit/score/cpu/sparc/cpu_asm.S | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/cpukit/score/cpu/sparc/cpu_asm.S b/cpukit/score/cpu/sparc/cpu_asm.S index bfad3fb..1251faa 100644 --- a/cpukit/score/cpu/sparc/cpu_asm.S +++ b/cpukit/score/cpu/sparc/cpu_asm.

[PATCHv2 26/26] leon,tn-0018: work around GRLIB-TN-0018 errata

Overview The errata is worked around in the kernel without requiring toolchain modifications. It is triggered the JMPL/RETT return from trap instruction sequence never generated by the compiler and. There are also other conditions that must must be true to trigger the errata, for example

[PATCHv2 24/26] sparc,leon: avoid triggering TN-0009 bad sequence

Update #4154. --- cpukit/score/cpu/sparc/sparc-counter-asm.S | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/cpukit/score/cpu/sparc/sparc-counter-asm.S b/cpukit/score/cpu/sparc/sparc-counter-asm.S index a1e18ae..fb7783e 100644 --- a/cpukit/score/cpu/sparc/sparc-counter-asm.S

[PATCHv3 08/26] leon, can: introduce common CAN baud-rate calculation function

Reimplemented the baud-rate algorithm from scratch to cope with GRCAN, GRCANFD and OC_CAN devices. --- bsps/headers.am | 1 + bsps/include/grlib/canbtrs.h| 80 ++ bsps/shared/grlib-sources.am| 1 + bsps/shared/grlib/can/canbtrs.c | 143 +

Re: [PATCH 26/26] leon,tn-0018: work around GRLIB-TN-0018 errata

2020-10-16 07:33 skrev Sebastian Huber: On 23/09/2020 12:24, Daniel Hellstrom wrote: >> Command line defines are discouraged and in cpukit only multilib >> defined defines should be used. Can't you the existing >> __FIX_LEON3FT_B2BST define to enable

Re: [PATCH 0/3] grlib: Some clean ups

Hi Sebastian, The patch set looks good. Thanks! /Daniel On 2020-09-18 10:00, Sebastian Huber wrote: Sebastian Huber (3): grlib: Remove superfluous forward decls grlib: Remove unused conversion macros grlib: Add ambapp_common_info to derived types bsps/include/grlib

Re: [PATCH 00/26] leon: various fixes and TN0018 errata workaround

rrata patch just now. I would like to push them on the 5 and master branches. To get them onto 5, should  I create a ticket for the whole patch set? I will try getting this done next next couple of days, and have a look at you patches too, thanks! Kind Regards, Daniel On 2020-09-18 10:03, Seba

Re: [PATCH 26/26] leon,tn-0018: work around GRLIB-TN-0018 errata

Hi, Thank you for your comments. Sorry for my late reply, please see my responses below. On 2020-06-29 15:13, Joel Sherrill wrote: On Mon, Jun 29, 2020 at 8:02 AM Sebastian Huber <mailto:sebastian.hu...@embedded-brains.de>> wrote: On 29/06/2020 14:34, Daniel Hellst

Re: [PATCH 26/26] leon,tn-0018: work around GRLIB-TN-0018 errata

On 2020-06-29 13:57, Sebastian Huber wrote: On 29/06/2020 13:28, Daniel Hellstrom wrote: diff --git a/bsps/sparc/leon3/config/gr712rc.cfg b/bsps/sparc/leon3/config/gr712rc.cfg index 3852932..e8f0731 100644 --- a/bsps/sparc/leon3/config/gr712rc.cfg +++ b/bsps/sparc/leon3/config/gr712rc.cfg

Re: [PATCH 08/26] leon, can: introduce common CAN baud-rate calculation function

On 2020-06-29 13:48, Sebastian Huber wrote: On 29/06/2020 13:27, Daniel Hellstrom wrote: +/* + *  COPYRIGHT (c) 2019. + *  Cobham Gaisler AB. + * + *  The license and distribution terms for this file may be + *  found in the file LICENSE in this distribution or at + *http://www.rtems.org

[PATCH 21/26] leon, ahbstat: register definitions for AHBSTAT version 1

From: Martin Aberg --- bsps/include/grlib/ahbstat.h | 2 ++ bsps/shared/grlib/amba/ahbstat.c | 8 2 files changed, 10 insertions(+) diff --git a/bsps/include/grlib/ahbstat.h b/bsps/include/grlib/ahbstat.h index 71e2330..0baaad0 100644 --- a/bsps/include/grlib/ahbstat.h +++ b/bsps/i

[PATCH 20/26] leon, grspw_router: added router_port_link_div()

From: Martin Aberg Allows user to set SpaceWire run clock divisor for an individual port. --- bsps/include/grlib/grspw_router.h| 1 + bsps/shared/grlib/spw/grspw_router.c | 5 + 2 files changed, 6 insertions(+) diff --git a/bsps/include/grlib/grspw_router.h b/bsps/include/grlib/grspw_r

[PATCH 26/26] leon,tn-0018: work around GRLIB-TN-0018 errata

The errata is worked around in the kernel without requiring toolchain modifications. It is triggered the JMPL/RETT return from trap instruction sequence never generated by the compiler and. There are also other conditions that must must be true to trigger the errata, for example the instruction tha

[PATCH 01/26] sparc: Remove sequences that the B2BST scan script warns about

From: Daniel Cederman --- cpukit/score/cpu/sparc/cpu_asm.S | 6 -- cpukit/score/cpu/sparc/syscall.S | 3 ++- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/cpukit/score/cpu/sparc/cpu_asm.S b/cpukit/score/cpu/sparc/cpu_asm.S index d5afd5f..bfad3fb 100644 --- a/cpukit/score

[PATCH 18/26] leon: restart and load timer counter at initialization

Without this smp05 and smpthreadlife01 tests may fail depending on how the boot loader initialized the GPTIMER. Before the time counter stopped counting when reaching zero, but tests could work since it could take 2^32 us before stopping. The timer driver will potentially overwrite this, but it ha

[PATCH 24/26] sparc,leon: avoid triggering TN-0009 bad sequence

--- cpukit/score/cpu/sparc/sparc-counter-asm.S | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/cpukit/score/cpu/sparc/sparc-counter-asm.S b/cpukit/score/cpu/sparc/sparc-counter-asm.S index a1e18ae..fb7783e 100644 --- a/cpukit/score/cpu/sparc/sparc-counter-asm.S +++ b/cpukit/

[PATCH 25/26] sparc,leon: avoid triggering LEON3FT errata TN-0009

--- cpukit/score/cpu/sparc/cpu_asm.S | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/cpukit/score/cpu/sparc/cpu_asm.S b/cpukit/score/cpu/sparc/cpu_asm.S index bfad3fb..1251faa 100644 --- a/cpukit/score/cpu/sparc/cpu_asm.S +++ b/cpukit/score/cpu/sparc/cpu_asm.S @@ -523,8 +5

[PATCH 19/26] sparc: fix bad register alignment for 64 bit store

--- cpukit/score/cpu/sparc/sparc-access.S | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/cpukit/score/cpu/sparc/sparc-access.S b/cpukit/score/cpu/sparc/sparc-access.S index 9397cb8..277fb7e 100644 --- a/cpukit/score/cpu/sparc/sparc-access.S +++ b/cpukit/score/cpu/sparc/spa

[PATCH 15/26] leon, greth: added support for variable sized descriptor table sizes

The descriptor table size is equal to its alignment and set when configuring the HW IP through VHDL generics. This SW patch simply probes the HW how large the RX/TX descriptor tables are and adjusts accordingly. The number of descriptors actual used are controlled by other settings (rxDescs and tx

[PATCH 23/26] grlib,grspw_pkt: correct link state enum numbering

Not used by the driver itself, but shuold be correct if used by application. --- bsps/include/grlib/grspw_pkt.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/bsps/include/grlib/grspw_pkt.h b/bsps/include/grlib/grspw_pkt.h index 595625b..ede60b7 100644 --- a/bsps/include/g

[PATCH 13/26] leon, grcanfd: split out GRCANFD specific support in separate file

--- bsps/shared/grlib-sources.am | 1 + bsps/shared/grlib/can/grcan.c | 638 + bsps/shared/grlib/can/grcan_internal.h | 140 bsps/shared/grlib/can/grcanfd.c| 535 +++ 4 files changed, 687 insertions(+), 6

[PATCH 14/26] leon, grcan: split out GRCAN non-FD specific support in separate file

--- bsps/shared/grlib-sources.am | 1 + bsps/shared/grlib/can/grcan.c| 405 bsps/shared/grlib/can/grcanstd.c | 435 +++ 3 files changed, 436 insertions(+), 405 deletions(-) create mode 100644 bsps/shared/grlib/can/

[PATCH 22/26] leon, l2cache: prevent unused diagnostic access

From: Martin Aberg --- bsps/shared/grlib/l2c/l2c.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/bsps/shared/grlib/l2c/l2c.c b/bsps/shared/grlib/l2c/l2c.c index ddef0ad..4a443ed 100644 --- a/bsps/shared/grlib/l2c/l2c.c +++ b/bsps/shared/grlib/l2c/l2c.c @@ -894,9 +894,9

[PATCH 12/26] leon,grcan: added support for GRCANFD

The new GRCAN_FD IP supports CAN FD standard and is mostly backwards compatible with GRCAN SW interface. The GRCAN driver have been extended to support the GRCANFD IP using the same driver. Additional functions have been added that uses a new CAN FD frame format and read/write/baud-rate functions

[PATCH 11/26] grlib: added 64-bit read no-cache function

--- bsps/include/grlib/grlib_impl.h | 10 ++ 1 file changed, 10 insertions(+) diff --git a/bsps/include/grlib/grlib_impl.h b/bsps/include/grlib/grlib_impl.h index e795e7f..3bff2af 100644 --- a/bsps/include/grlib/grlib_impl.h +++ b/bsps/include/grlib/grlib_impl.h @@ -122,6 +122,16 @@ RTEMS

[PATCH 02/26] leon,gr1553rt: Fixed memory leak

From: Arvid Bjorkengren --- bsps/shared/grlib/1553/gr1553rt.c | 16 +++- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/bsps/shared/grlib/1553/gr1553rt.c b/bsps/shared/grlib/1553/gr1553rt.c index 339e856..668a39e 100644 --- a/bsps/shared/grlib/1553/gr1553rt.c +++ b/b

  1   2   3   4   5   6   7   8   >