[PATCH v2 1/2] bsp/xilinx-zynq: Add SLCR driver

+ * Author: Patrick Gauvin + */ + +/** + * @defgroup zynq_slcr_regs SLCR Register Definitions + * @ingroup zynq_slcr + * @brief SLCR Register Definitions + */ + +#ifndef LIBBSP_ARM_XILINX_ZYNQ_SLCR_REGS_H +#define LIBBSP_ARM_XILINX_ZYNQ_SLCR_REGS_H + +#include + +#ifdef __cplusplus +extern &qu

[PATCH v2 2/2] bsp/xilinx-zynq: Add device configuration driver

TY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation + * are those of the authors and should not be interpreted as representing + * official policies, either expressed or implied, of CHREC. + * + * Author: Patrick Gauvin + */ +#include +#include

[PATCH v2 0/2] Zynq7000 series device configuration driver

s programmed. I still need to test if that sort of access is allowed when a secure bitfile is loaded. For now I just have warnings in comments that secure loading is not supported. Please let me know if I've missed anything or you spot anything new. Patrick Gauvin (2): bsp/xilinx-zynq: Add SLCR

Re: [PATCH 2/2] bsp/xilinx-zynq: Add device configuration driver

On Thu, Apr 20, 2017 at 7:41 PM, Chris Johns wrote: > On 21/04/2017 07:52, Patrick Gauvin wrote: > >> Chris, >> >> >> + >> +static drvdata data; >> +/* TODO: Abstract DMA buffer retrieval better */ >> >> >>

Re: [PATCH 0/2] Zynq7000 series device configuration driver

do. If there is an alternative I'd love to hear it, I dislike being tied to the SDK for initialization. -Patrick On Thu, Apr 20, 2017 at 6:37 PM, Chris Johns wrote: > On 21/04/2017 07:55, Patrick Gauvin wrote: > >> Gedare, >> >> >> if the test pr

Re: [PATCH 1/2] bsp/xilinx-zynq: Add SLCR driver

Thank you, that does simplify things quite a bit. -Patrick On Thu, Apr 20, 2017 at 5:50 PM, Chris Johns wrote: > On 21/04/2017 07:22, Patrick Gauvin wrote: > >> >> I so not like the reset value being written to like this. I know you >> need to set the lower 4 bi

Re: [PATCH 0/2] Zynq7000 series device configuration driver

Gedare, > if the test programs are specific to the Zynq BSP, then we don't > currently have a very good mechanism for maintaining them. Probably > submitting them as "example programs" in the > git.rtems.org/examples-v2.git is the best place to look at integrating > application/bsp-level tests. T

Re: [PATCH 2/2] bsp/xilinx-zynq: Add device configuration driver

or the > device is closed. OK, I'm open to talking more about secure mode offline. It sounds like you've used it extensively. > > > + case ZYNQ_DEVCFG_IOCTL_BITSTREAM_LEN_GET: >> +*(size_t *)ioctl_args->buffer = get_bitstream_len(); >> +break; >

Re: [PATCH 1/2] bsp/xilinx-zynq: Add SLCR driver

ONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, >> SPECIAL, >> + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, >> + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR >> + * PROFITS; OR BUSINESS

[PATCH 2/2] bsp/xilinx-zynq: Add device configuration driver

views and conclusions contained in the software and documentation + * are those of the authors and should not be interpreted as representing + * official policies, either expressed or implied, of CHREC. + * + * Author: Patrick Gauvin + */ +#include +#include +#include +#include +#include +#include

[PATCH 1/2] bsp/xilinx-zynq: Add SLCR driver

+ * Author: Patrick Gauvin + */ + +/** + * @defgroup zynq_slcr_regs SLCR Register Definitions + * @ingroup zynq_slcr + * @brief SLCR Register Definitions + */ + +#ifndef LIBBSP_ARM_XILINX_ZYNQ_SLCR_REGS_H +#define LIBBSP_ARM_XILINX_ZYNQ_SLCR_REGS_H + +#include + +#ifdef __cplusplus +extern &qu

[PATCH 1/2] bsp/xilinx-zynq: Add SLCR driver

+ * Author: Patrick Gauvin + */ + +/** + * @defgroup zynq_slcr_regs SLCR Register Definitions + * @ingroup zynq_slcr + * @brief SLCR Register Definitions + */ + +#ifndef LIBBSP_ARM_XILINX_ZYNQ_SLCR_REGS_H +#define LIBBSP_ARM_XILINX_ZYNQ_SLCR_REGS_H + +#include + +#ifdef __cplusplus +extern &qu

[PATCH 0/2] Zynq7000 series device configuration driver

ot had the time yet. The platform I have been using to test is the ZedBoard. Thank you, Patrick Patrick Gauvin (2): bsp/xilinx-zynq: Add SLCR driver bsp/xilinx-zynq: Add device configuration driver c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am | 10 + .../libbsp/arm/xilinx-zynq/devcfg/zyn

[PATCH] bsp/xilinx-zynq: Correct the ZedBoard PERIPHCLK frequency

With the default CPU clock ratio of 6:2:1 with a PS_CLK of 33.33 MHz, the CPU/SCU clock is 667 MHz (See UG585 v1.11 section 25.3). In the Zynq7000 series, PERIPHCLK is equivalent to the CPU/SCU clock divided by 2. This was discovered by noticing that the ticker sample program was running two times

Re: [PATCH 2/4] libdl: Fix cache corruption bugs.

> @@ -84,8 +99,15 @@ rtems_rtl_obj_cache_read (rtems_rtl_obj_cache_t* cache, >return false; > } > > +/* > + * We sometimes are asked to read strings of a length we do not know. > + */ > if ((offset + *length) > cache->file_size) > +{ >*length = cache->file_

[PATCH] Fix RTEMS Tools source symlink generation.

When rsb_released was not 0, a build failure would occur. Updates #2495. --- rtems/config/tools/rtems-tools-common-1.cfg | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/rtems/config/tools/rtems-tools-common-1.cfg b/rtems/config/tools/rtems-tools-common-1.cfg index 60aa5c1..

Re: [PATCH] Fix RTEMS Tools source symlink generation.

This patch is against the 4.11 branch, I will send the patch for master in a few minutes. On Sun, Jan 24, 2016 at 7:07 PM, Patrick Gauvin wrote: > Updates #2495. > --- > rtems/config/tools/rtems-tools-common-1.cfg | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > >

[PATCH] Fix RTEMS Tools source symlink generation.

Updates #2495. --- rtems/config/tools/rtems-tools-common-1.cfg | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/rtems/config/tools/rtems-tools-common-1.cfg b/rtems/config/tools/rtems-tools-common-1.cfg index 0de16ba..eecd121 100644 --- a/rtems/config/tools/rtems-tools-common-