Re: Re: I can not run rtems 5.1 smp correctly on bsp xilinx-zynqmp

The board is Ultra96 board with JTAG boot. And yes, there is a bspsmp.c in rtems-5.1\bsps\arm\xilinx-zynqmp\start\ small...@aliyun.com From: Gedare Bloom Date: 2020-10-06 00:16 To: small...@aliyun.com CC: devel Subject: Re: I can not run rtems 5.1 smp correctly on bsp xilinx-zynqmp It should,

Re: [PATCH v2] c-user: Generate I/O Manager documentation

On 06/10/2020 03:25, Chris Johns wrote: On 6/10/20 1:39 am, Sebastian Huber wrote: +.. This file was automatically generated. Do not edit it manually. +.. Please have a look at +.. +..https://docs.rtems.org/branches/master/eng/req/howto.html +.. +.. for information how to maintain and re-gener

Re: [PATCH v5] cpukit/librcxx: Add a C++ thread interface with attributes

Hello Chris, thanks, looks good. I would have added the stuff to similar to , but this is a matter of taste. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel

[PATCH] rtems: Improve RTEMS_NO_RETURN attribute

Provide RTEMS_NO_RETURN also in case RTEMS_DEBUG is defined to prevent errors like this: error: no return statement in function returning non-void [-Werror=return-type] Use C11 and C++11 standard means to declare a no-return function. Close #4122. --- cpukit/include/rtems/score/basedefs.h | 8 +

Update 4.11 RSB to work with python 3 and python 2

Hello, This change backports the RSB python source from master to 4.11 so 4.11 can be maintained on newer hosts. GDB has been updated to 9.1 for the architectures that can support it. The SPARC architecture has been lift at 7.9 with building with python been disabled. Builds on Ubuntu 20 and Fre

[PATCH v5] cpukit/librcxx: Add a C++ thread interface with attributes

From: Chris Johns --- cpukit/include/rtems/c++/error| 69 cpukit/include/rtems/c++/thread | 476 ++ cpukit/librtemscxx/error.cc | 76 cpukit/librtemscxx/thread.cc | 416 +++ spec/build/cpukit/grp.yml

Re: [PATCH v4] cpukit/librcxx: Add a C++ thread interface with attributes

On 5/10/20 3:52 am, Joel Sherrill wrote: > riscv and sparc leon3 should work with clang. Sure. Have you built clang and built these BSPs? > But I also wondered  (didn't > mentioned) if you had tried this as a native wrapper. It may be testable on > FreeBSD or Linux as well. Ensuring that may giv

Re: [PATCH v2] c-user: Generate I/O Manager documentation

On 6/10/20 1:39 am, Sebastian Huber wrote: > +.. This file was automatically generated. Do not edit it manually. > +.. Please have a look at > +.. > +.. https://docs.rtems.org/branches/master/eng/req/howto.html > +.. > +.. for information how to maintain and re-generate this file. This section is

Re: [PATCH v1] tester: Prevent crash with json output

Pushed. On Mon, Oct 5, 2020 at 6:26 PM Chris Johns wrote: > On 6/10/20 9:35 am, Kinsey Moore wrote: > > *From:* Joel Sherrill > > *Sent:* Monday, October 5, 2020 17:03 > > *To:* Chris Johns > > *Cc:* Kinsey Moore ; rtems-de...@rtems.org > > > > *Subject:* Re: [PATCH v1] tester: Prevent crash

Failures from Partial BSP Build Sweep

Hi Sebastian's fix for testopts seems to have resolved a lot of build failures. My build is ~220 BSPs in and this is the current set of failure messages: FAILED (2) autoconf build of arm lm3s3749 (NOSMP/NOMP/DEBUG/PROFILE) FAILED (1) waf build of arm lm3s3749 (NOSMP/NOMP/DEBUG/PROFILE) FAILED (

Re: [PATCH v1] tester: Prevent crash with json output

On 6/10/20 9:35 am, Kinsey Moore wrote: > *From:* Joel Sherrill > *Sent:* Monday, October 5, 2020 17:03 > *To:* Chris Johns > *Cc:* Kinsey Moore ; rtems-de...@rtems.org > > *Subject:* Re: [PATCH v1] tester: Prevent crash with json output > On Mon, Oct 5, 2020 at 4:57 PM Chris Johns

Re: Approachability of Documentation Generation

On 5/10/20 7:25 pm, Sebastian Huber wrote: > On 02/10/2020 20:11, Gedare Bloom wrote: >> On Fri, Oct 2, 2020 at 8:57 AM Joel Sherrill wrote: >>> Hi >>> >>> The other thread has a mix of detailed "review this" versus philosophy on >>> how >>> to make the documentation generation process approachab

RE: [PATCH v1] tester: Prevent crash with json output

From: Joel Sherrill Sent: Monday, October 5, 2020 17:03 To: Chris Johns Cc: Kinsey Moore ; rtems-de...@rtems.org Subject: Re: [PATCH v1] tester: Prevent crash with json output On Mon, Oct 5, 2020 at 4:57 PM Chris Johns mailto:chr...@rtems.org>> wrote: On 6/10/20 7:41 am, Kinsey Moore wrote:

Re: [PATCH v1] tester: Prevent crash with json output

On Mon, Oct 5, 2020 at 4:57 PM Chris Johns wrote: > On 6/10/20 7:41 am, Kinsey Moore wrote: > > This fixes an issue with json report output that causes a crash due to > > the incorrect object member being accessed for test-too-long. This also > > changes treatment of fatal errors to match how the

Re: [PATCH v4] cpukit/librcxx: Add a C++ thread interface with attributes

On 5/10/20 6:36 pm, Sebastian Huber wrote: > On 03/10/2020 08:23, chr...@rtems.org wrote: > >> diff --git a/cpukit/include/rtems/c++/error b/cpukit/include/rtems/c++/error >> new file mode 100644 >> index 00..8b9d875e0f >> --- /dev/null >> +++ b/cpukit/include/rtems/c++/error >> @@ -0,0 +1

Re: [PATCH v1] tester: Prevent crash with json output

On 6/10/20 7:41 am, Kinsey Moore wrote: > This fixes an issue with json report output that causes a crash due to > the incorrect object member being accessed for test-too-long. This also > changes treatment of fatal errors to match how they are displayed in the > tester log output and changes "fata

[PATCH v1] tester: Prevent crash with json output

This fixes an issue with json report output that causes a crash due to the incorrect object member being accessed for test-too-long. This also changes treatment of fatal errors to match how they are displayed in the tester log output and changes "fatal error" to "fatal-error" to better match the na

[PATCH v4 5/9] bsps/shared: Add PSCI-based bspreset implementation

This adds a bsp_reset implementation based on the ARM PSCI specification often present in ARMv8 systems. --- bsps/shared/start/bspreset-arm-psci.c | 56 +++ 1 file changed, 56 insertions(+) create mode 100644 bsps/shared/start/bspreset-arm-psci.c diff --git a/bsps/shared/

[PATCH v4 7/9] score: Add AArch64 port

This adds a CPU port for AArch64(ARMv8) with support for exceptions and interrupts. --- cpukit/include/rtems/score/tls.h | 6 +- .../cpu/aarch64/aarch64-context-validate.S| 305 ++ .../aarch64-context-volatile-clobber.S| 100 .../cpu/aarch64/aarch64-exceptio

[PATCH v4 8/9] bsps: Add Cortex-A53 LP64 basic BSP

This adds an AArch64 basic BSP based on Qemu's Cortex-A53 emulation with interrupt support using GICv3 and clock support using the ARM GPT. --- bsps/aarch64/a53/console/console.c| 69 ++ bsps/aarch64/a53/include/bsp.h| 74 +++ bsps/aarch64/a53/include/bsp/irq.h

[PATCH v4 6/9] spmsgq_err01: Use correct max values and fix 64bit

Fix spmsgq_err01 on systems with 64-bit pointers and correct max value mismatches and inaccuracies that are more noticable on 64-bit systems. --- testsuites/sptests/spmsgq_err01/init.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/testsuites/sptests/spmsgq_err01/init.c

[PATCH v5 2/2] Add AArch64 documentation

--- cpu-supplement/aarch64.rst | 134 + user/bsps/aarch64/a53.rst | 26 +++ user/bsps/bsps-aarch64.rst | 2 +- 3 files changed, 161 insertions(+), 1 deletion(-) create mode 100644 cpu-supplement/aarch64.rst create mode 100644 user/bsps/aarch64/a53.rst

[PATCH v4 4/9] bsps: Break out AArch32 GICv3 support

This breaks out AArch32-specific code so that the shared GICv3 code can be reused by other architectures. --- bsps/arm/altera-cyclone-v/include/bsp/irq.h | 2 +- bsps/arm/altera-cyclone-v/include/tm27.h | 2 +- bsps/arm/headers.am | 4 - bsps/arm/imx/include/

[PATCH v5 1/2] cpu-supplement: Fix formatting and missing words

--- cpu-supplement/arm.rst | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/cpu-supplement/arm.rst b/cpu-supplement/arm.rst index 63aa532..ac9e8c6 100644 --- a/cpu-supplement/arm.rst +++ b/cpu-supplement/arm.rst @@ -34,10 +34,10 @@ for the values. Count Leadi

[PATCH v4 2/9] spec: Add missing spintrcritical24 definition

--- spec/build/bsps/tstnointrcrit.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/spec/build/bsps/tstnointrcrit.yml b/spec/build/bsps/tstnointrcrit.yml index 0460aaabb3..46f7d974c8 100644 --- a/spec/build/bsps/tstnointrcrit.yml +++ b/spec/build/bsps/tstnointrcrit.yml @@ -24,6 +24,7 @@ act

[PATCH v4 3/9] bsps: Break out AArch32 portions of GPT driver

This breaks AArch32-specific portions of the ARM GPT driver into their own file so that the generic code can be moved for reuse by other architectures. --- bsps/arm/imx/headers.am | 4 + bsps/arm/imx/include/bsp.h| 2 - bsps/arm/imx/start/bspstart.c

[PATCH v4 9/9] bsps: Add Cortex-A53 ILP32 BSP variant

This adds an AArch64 ILP32 BSP variant based on Qemu's Cortex-A53 emulation with interrupt support using GICv3 and clock support using the ARM GPT. --- bsps/aarch64/shared/start/start.S | 16 + spec/build/bsps/aarch64/a53/abi.yml | 7 +- .../bsps/aarch64/a53/bspa53ilp32q

[PATCH v4 1/9] Move ARM PL011 UART driver

This UART driver is now needed for BSPs other than ARM. --- bsps/arm/headers.am | 2 -- bsps/arm/raspberrypi/console/console-config.c| 2 +- bsps/arm/realview-pbx-a9/include/bsp/console.h | 2 +- bsps/arm/xen/console/console.c

RE: [PATCH v3 04/10] bsps: Break out AArch32 GICv3 support

-Original Message- From: Sebastian Huber Sent: Monday, October 5, 2020 08:10 To: j...@rtems.org Cc: Kinsey Moore ; rtems-de...@rtems.org Subject: Re: [PATCH v3 04/10] bsps: Break out AArch32 GICv3 support On 05/10/2020 14:27, Joel Sherrill wrote: > > > On Mon, Oct 5, 2020 at 2:04 AM S

Re: RTEMS 5.1 pc686 BSP malloc_info problem?

On Mon, Oct 5, 2020 at 11:07 AM Alan Cudmore wrote: > I built the tools shortly after the announced 5.1 release. I'm using > the 5.1 branches for everything. > But some additional info..I built the full testsuite, and ran the > malloctest with no problems. It calls malloc_info a couple of times.

Re: I can not run rtems 5.1 smp correctly on bsp xilinx-zynqmp

It should, I believe. The bsp has bspsmp.c file. How did you configure (../rtems/configure)? What board/target do you run it on? On Mon, Oct 5, 2020 at 2:24 AM small...@aliyun.com wrote: > > Hi, all > I compile rtems 5.1 with bsp xilinx-zynqmp. The single core mode is ok. > But I can not use 2

Re: [PATCH v2] c-user: Generate I/O Manager documentation

On Mon, Oct 5, 2020 at 8:40 AM Sebastian Huber wrote: > > The manager documentation is a consolidation of the comments in Doxygen > markup and the documentation sources in Sphinx markup. The > documentation was transfered to interface specification items. This > header file was generated from th

Re: RTEMS 5.1 pc686 BSP malloc_info problem?

I built the tools shortly after the announced 5.1 release. I'm using the 5.1 branches for everything. But some additional info..I built the full testsuite, and ran the malloctest with no problems. It calls malloc_info a couple of times. I also compiled my RTEMS Kernel Image (RKI) for this BSP and

Re: RTEMS 5.1 pc686 BSP malloc_info problem?

On Mon, Oct 5, 2020 at 10:34 AM Gedare Bloom wrote: > This is an SMP related bug? Can you send the rtems configure command, > and the qemu run command? > > It might also help to know the number of tasks and their priorities. > The CONFIGURE* macros might also help. > > My first guess is that the

Re: RTEMS 5.1 pc686 BSP malloc_info problem?

This is an SMP related bug? Can you send the rtems configure command, and the qemu run command? It might also help to know the number of tasks and their priorities. The CONFIGURE* macros might also help. My first guess is that the lock primitive is somehow broken in the pc686, maybe it gets caug

RE: [PATCH v3 2/2] Add AArch64 documentation

-Original Message- From: Gedare Bloom Sent: Monday, October 5, 2020 10:19 To: Kinsey Moore Cc: devel@rtems.org Subject: Re: [PATCH v3 2/2] Add AArch64 documentation On Mon, Oct 5, 2020 at 9:13 AM Gedare Bloom wrote: > > On Sat, Oct 3, 2020 at 10:23 PM Kinsey Moore wrote: > > > > --- >

Re: [PATCH v3 1/2] cpu-supplement: Fix formatting and missing words

On 05/10/2020 17:19, Joel Sherrill wrote: Is it possible for these to cross-link into the appropriate section of the Users Guide? How the cross-linking is done across documents is an open issue. ___ devel mailing list devel@rtems.org http://lists.r

Re: [PATCH v3 03/10] bsps: Break out AArch32 portions of GPT driver

On Mon, Oct 5, 2020 at 6:28 AM Sebastian Huber wrote: > > On 05/10/2020 14:22, Joel Sherrill wrote: > > > > > > > On Mon, Oct 5, 2020 at 1:59 AM Sebastian Huber > > > > wrote: > > > > On 04/10/2020 06:18, Kinsey Moore wrote: > > > > > diff --git

Re: [PATCH v3 1/2] cpu-supplement: Fix formatting and missing words

On Sat, Oct 3, 2020 at 11:23 PM Kinsey Moore wrote: > --- > cpu-supplement/arm.rst | 18 +- > 1 file changed, 9 insertions(+), 9 deletions(-) > > diff --git a/cpu-supplement/arm.rst b/cpu-supplement/arm.rst > index 63aa532..ac9e8c6 100644 > --- a/cpu-supplement/arm.rst > +++ b/cp

Re: [PATCH v3 2/2] Add AArch64 documentation

On Mon, Oct 5, 2020 at 9:13 AM Gedare Bloom wrote: > > On Sat, Oct 3, 2020 at 10:23 PM Kinsey Moore wrote: > > > > --- > > cpu-supplement/aarch64.rst | 134 + > > user/bsps/aarch64/a53.rst | 26 +++ > > user/bsps/bsps-aarch64.rst | 2 +- > > 3 files ch

Re: [PATCH v3 2/2] Add AArch64 documentation

On Sat, Oct 3, 2020 at 10:23 PM Kinsey Moore wrote: > > --- > cpu-supplement/aarch64.rst | 134 + > user/bsps/aarch64/a53.rst | 26 +++ > user/bsps/bsps-aarch64.rst | 2 +- > 3 files changed, 161 insertions(+), 1 deletion(-) > create mode 100644 cpu-su

Re: [PATCH v3 1/2] cpu-supplement: Fix formatting and missing words

This seems fine. I'm not sure if there is any uniform guidance on how to do lists. Documentation for writing documentation :) On Sat, Oct 3, 2020 at 10:23 PM Kinsey Moore wrote: > > --- > cpu-supplement/arm.rst | 18 +- > 1 file changed, 9 insertions(+), 9 deletions(-) > > diff -

[PATCH v2] c-user: Generate I/O Manager documentation

The manager documentation is a consolidation of the comments in Doxygen markup and the documentation sources in Sphinx markup. The documentation was transfered to interface specification items. This header file was generated from the items by a script. Update #3993. --- v2: * Add comments to me

RE: [PATCH v3 06/10] bsps/arm: Break out linker script for AArch64

-Original Message- From: Sebastian Huber Sent: Monday, October 5, 2020 02:11 To: Kinsey Moore ; devel@rtems.org Subject: Re: [PATCH v3 06/10] bsps/arm: Break out linker script for AArch64 On 04/10/2020 06:18, Kinsey Moore wrote: > This breaks out the common section of the ARM linker scr

Re: BSP Build Sweep Report (5 Oct)

On Mon, Oct 5, 2020 at 8:36 AM Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote: > On 05/10/2020 15:30, Joel Sherrill wrote: > > > > > > > On Mon, Oct 5, 2020 at 8:05 AM Sebastian Huber > > > > wrote: > > > > On 05/10/2020 14:56, Joel Sher

Re: BSP Build Sweep Report (5 Oct)

On 05/10/2020 15:30, Joel Sherrill wrote: On Mon, Oct 5, 2020 at 8:05 AM Sebastian Huber > wrote: On 05/10/2020 14:56, Joel Sherrill wrote: > Hi > > The build sweep completed overnight and there were a lot of BSPs which > d

Re: BSP Build Sweep Report (5 Oct)

On Mon, Oct 5, 2020 at 8:05 AM Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote: > On 05/10/2020 14:56, Joel Sherrill wrote: > > > Hi > > > > The build sweep completed overnight and there were a lot of BSPs which > > did not build to completion. This is the summary: > > > > BSPs:192

Re: [PATCH v3 04/10] bsps: Break out AArch32 GICv3 support

On 05/10/2020 14:27, Joel Sherrill wrote: On Mon, Oct 5, 2020 at 2:04 AM Sebastian Huber > wrote: On 04/10/2020 06:18, Kinsey Moore wrote: > +/** > + * This architecture-specific function sets the exception vector for handling

Re: [PATCH v4 2/2] Add AArch64 documentation

Thanks, looks good. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel

Re: BSP Build Sweep Report (5 Oct)

On 05/10/2020 14:56, Joel Sherrill wrote: Hi The build sweep completed overnight and there were a lot of BSPs which did not build to completion. This is the summary: BSPs:    192 Total:   1745 all-bsps-log.txt Passed:  1532 Failed:  212 Failed autoconf:  178 Failed waf:       34 Failed (NOS

[PATCH v4 2/2] Add AArch64 documentation

--- cpu-supplement/aarch64.rst | 134 + user/bsps/aarch64/a53.rst | 26 +++ user/bsps/bsps-aarch64.rst | 2 +- 3 files changed, 161 insertions(+), 1 deletion(-) create mode 100644 cpu-supplement/aarch64.rst create mode 100644 user/bsps/aarch64/a53.rst

[PATCH v4 1/2] cpu-supplement: Fix formatting and missing words

--- cpu-supplement/arm.rst | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/cpu-supplement/arm.rst b/cpu-supplement/arm.rst index 63aa532..ac9e8c6 100644 --- a/cpu-supplement/arm.rst +++ b/cpu-supplement/arm.rst @@ -34,10 +34,10 @@ for the values. Count Leadi

BSP Build Sweep Report (5 Oct)

Hi The build sweep completed overnight and there were a lot of BSPs which did not build to completion. This is the summary: BSPs:192 Total: 1745 all-bsps-log.txt Passed: 1532 Failed: 212 Failed autoconf: 178 Failed waf: 34 Failed (NOSMP): 78 The full summary with one line resul

Re: [PATCH v3 03/10] bsps: Break out AArch32 portions of GPT driver

On 05/10/2020 14:22, Joel Sherrill wrote: On Mon, Oct 5, 2020 at 1:59 AM Sebastian Huber > wrote: On 04/10/2020 06:18, Kinsey Moore wrote: > diff --git a/bsps/arm/imx/start/bspstart.c b/bsps/arm/imx/start/bspstart.c > index 5fb07bf

Re: [PATCH v3 04/10] bsps: Break out AArch32 GICv3 support

On Mon, Oct 5, 2020 at 2:04 AM Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote: > On 04/10/2020 06:18, Kinsey Moore wrote: > > > +/** > > + * This architecture-specific function sets the exception vector for > handling > > + * IRQs. > > + */ > > +void aarch_interrupt_facility_set_excep

Re: [PATCH v3 03/10] bsps: Break out AArch32 portions of GPT driver

On Mon, Oct 5, 2020 at 1:59 AM Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote: > On 04/10/2020 06:18, Kinsey Moore wrote: > > > diff --git a/bsps/arm/imx/start/bspstart.c > b/bsps/arm/imx/start/bspstart.c > > index 5fb07bf60a..ff4b204790 100644 > > --- a/bsps/arm/imx/start/bspstart.c

Re: [PATCH v3 07/10] spmsgq_err01: Use correct max values and fix 64bit

On Mon, Oct 5, 2020 at 2:18 AM Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote: > On 04/10/2020 06:18, Kinsey Moore wrote: > > > Fix spmsgq_err01 on systems with 64-bit pointers and correct max value > > mismatches and inaccuracies that are more noticable on 64-bit systems. > > --- > >

Re: Approachability of Documentation Generation

On 02/10/2020 20:11, Gedare Bloom wrote: On Fri, Oct 2, 2020 at 8:57 AM Joel Sherrill wrote: Hi The other thread has a mix of detailed "review this" versus philosophy on how to make the documentation generation process approachable so Sebastian isn't the only human capable of maintaining it

I can not run rtems 5.1 smp correctly on bsp xilinx-zynqmp

Hi, all I compile rtems 5.1 with bsp xilinx-zynqmp. The single core mode is ok. But I can not use 2 or 3 or 4 cores of this bsp. After analysing the source code, I found there is no code to address smp condition. Does rtems 5.1 indeed not support smp mode for xilinx-zynqmp bsp? small...@aliyun

Re: [PATCH v4] cpukit/librcxx: Add a C++ thread interface with attributes

On 03/10/2020 08:23, chr...@rtems.org wrote: diff --git a/cpukit/include/rtems/c++/error b/cpukit/include/rtems/c++/error new file mode 100644 index 00..8b9d875e0f --- /dev/null +++ b/cpukit/include/rtems/c++/error @@ -0,0 +1,65 @@ +/* -*- C++ -*- + * SPDX-License-Identifier: BSD-2-Claus

Re: waf default number of jobs

On 03/10/2020 08:37, Chris Johns wrote: On 2/10/20 5:53 am, Joel Sherrill wrote: On Thu, Oct 1, 2020 at 2:39 PM Sebastian Huber mailto:sebastian.hu...@embedded-brains.de>> wrote: On 01/10/2020 20:09, Joel Sherrill wrote: > What was the rationale behind the choice of the default for

Re: [PATCH v3 10/10] bsps: Add Cortex-A53 ILP32 BSP variant

On 04/10/2020 06:18, Kinsey Moore wrote: This adds an AArch64 ILP32 BSP variant based on Qemu's Cortex-A53 emulation with interrupt support using GICv3 and clock support using the ARM GPT. Looks good. ___ devel mailing list devel@rtems.org http://list

Re: [PATCH v3 09/10] bsps: Add Cortex-A53 LP64 basic BSP

On 04/10/2020 06:18, Kinsey Moore wrote: This adds an AArch64 basic BSP based on Qemu's Cortex-A53 emulation with interrupt support using GICv3 and clock support using the ARM GPT. Looks good. ___ devel mailing list devel@rtems.org http://lists.rtems.

Re: [PATCH v3 08/10] score: Add AArch64 port

On 04/10/2020 06:18, Kinsey Moore wrote: This adds a CPU port for AArch64(ARMv8) with support for exceptions and interrupts. Looks good. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel

Re: [PATCH v3 07/10] spmsgq_err01: Use correct max values and fix 64bit

On 04/10/2020 06:18, Kinsey Moore wrote: Fix spmsgq_err01 on systems with 64-bit pointers and correct max value mismatches and inaccuracies that are more noticable on 64-bit systems. --- testsuites/sptests/spmsgq_err01/init.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff -

Re: [PATCH v3 06/10] bsps/arm: Break out linker script for AArch64

On 04/10/2020 06:18, Kinsey Moore wrote: This breaks out the common section of the ARM linker script that is usable by AArch64 BSPs to avoid duplication of the vast majority. To do so, it was necessary to add a new linker path at bsps/shared/start. Sorry, I didn't consider that using a linker sc

Re: [PATCH v3 05/10] bsps/shared: Add PSCI-based bspreset implementation

On 04/10/2020 06:18, Kinsey Moore wrote: This adds a bsp_reset implementation based on the ARM PSCI specification often present in ARMv8 systems. Looks good. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel

Re: [PATCH v3 02/10] spec: Add missing spintrcritical24 definition

Ok. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel

Re: [PATCH v3 01/10] Move ARM PL011 UART driver

On 04/10/2020 06:18, Kinsey Moore wrote: This UART driver is now needed for BSPs other than ARM. Looks good. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel

Re: [PATCH v3 04/10] bsps: Break out AArch32 GICv3 support

On 04/10/2020 06:18, Kinsey Moore wrote: +/** + * This architecture-specific function sets the exception vector for handling + * IRQs. + */ +void aarch_interrupt_facility_set_exception_handler(void); What are the rules for using an aarch prefix instead of an arm prefix?

Re: [PATCH v3 03/10] bsps: Break out AArch32 portions of GPT driver

On 04/10/2020 06:18, Kinsey Moore wrote: diff --git a/bsps/arm/imx/start/bspstart.c b/bsps/arm/imx/start/bspstart.c index 5fb07bf60a..ff4b204790 100644 --- a/bsps/arm/imx/start/bspstart.c +++ b/bsps/arm/imx/start/bspstart.c @@ -18,6 +18,7 @@ #include #include #include +#include #i