Re: STM32F4 register definitions and PLL settings patch

2014-10-18 Thread Chris Nott
Hi, On 18/10/2014 3:45 AM, Tomasz Gregorek wrote: Hi Chris - pll_q = ( (long) ( src_clk * pll_n + src_clk * pll_n / 2 ) ) / pll_m / 48; + pll_q = ( (long) ( src_clk * pll_n ) ) / pll_m / 48; Your fix for the PLL_Q calculation is correct. It supposed to be rounding from <=X.5 to X and from >X

Re: mpc8xx BSPs Have Most Warnings Help Request

2014-10-18 Thread Joel Sherrill
On October 18, 2014 1:53:50 PM CDT, Thomas Doerfler wrote: >Joel, > >we will see to this 'til Wednesday. Thanks. I tried to start addressing these but the complexity of conditionals in the console driver led me to move on to other BSPs. I think that properly disabling what isn't used in a co

Re: mpc8xx BSPs Have Most Warnings Help Request

2014-10-18 Thread Thomas Doerfler
Joel, we will see to this 'til Wednesday. CU, Thomas. Am 17.10.2014 17:33, schrieb Joel Sherrill: > Hi > > The only BSPs with more than 5 warnings in the BSP specific code > are the following: > > 21 powerpc-mbx821_001 (inBSP=18 inLibCPU=0) > 21 powerpc-mbx821_002b (inBSP=18 inLibCPU=0) >

Re: STM32F4 register definitions and PLL settings patch

2014-10-18 Thread Tomasz Gregorek
Hi Chris - pll_q = ( (long) ( src_clk * pll_n + src_clk * pll_n / 2 ) ) / pll_m / 48; + pll_q = ( (long) ( src_clk * pll_n ) ) / pll_m / 48; Your fix for the PLL_Q calculation is correct. It supposed to be rounding from <=X.5 to X and from >X.5 to (X+1) but first I messed up the equation second t

STM32F4 register definitions and PLL settings patch

2014-10-18 Thread Chris Nott
Hi, I sent these header file changes previously, they didn't get picked up. I re-merged with the head, cleaned up formatting and fixed a bug with PLL_Q setting not generating the right auxiliary clock frequency for USB peripheral - Tomasz this was your change, could you please review my fix.