[TVM Discuss] [Development/RFC] [RFC] [ETHOSN] Arm Ethos-N integration

2020-05-25 Thread aca88 via TVM Discuss
Hello, I have a more general question relating to the decision of using the BYOC infrastructure. [quote="Leo-arm, post:5, topic:6680"] It is more high-level than CPU instructions; it operates on the level of DMA, Conv2d etc [/quote] The Ethos-N coprocessor, to some extent, works similar to VT

[TVM Discuss] [Development] Relay model zoo?

2020-04-14 Thread aca88 via TVM Discuss
Hi, I find your post very interesting, I would expect that the frontend conversion into Relay is quite mature and stable. Therefore I would want to gather more info on your POV. Would you mind elaborating on these points? 1. What models where you trying to convert? 2. From what framework were

[TVM Discuss] [Development/RFC] [Relay] Improved graph partitioning algorithm

2020-04-06 Thread aca88 via TVM Discuss
>I believe your example would be taken care of using the Merge Composite pass >before partitioning. You can imagine that after running this pass add+conv2d >for the blue compiler would be represented by a single node. Ok then I wasn't really sure of what passes come before and after. So you ar

[TVM Discuss] [Development/RFC] [Relay] Improved graph partitioning algorithm

2020-04-06 Thread aca88 via TVM Discuss
Hi, Thanks for the nice animation and the work put into this. I was wondering if the subgraph partitions for the same compiler (at this level) have any repercussions for downstream passes. So for example assume that the last node of A1(called a1) is a Conv2d and the first of A3 (called a3) is

[TVM Discuss] [Development] [Discuss] Modify PassUpDomain for efficiency

2019-06-25 Thread aca88 via TVM Discuss
I just wanted to point out that there is a general documentation of the `InferBound` routine and the case you have here is also explained as a [limitation of `passupdomain`](https://docs.tvm.ai/dev/inferbound.html#limitations-of-passupdomain). If your algorithm could fix this limitation, I be

[TVM Discuss] [Development] Google lasted work: MLIR Primer

2019-04-11 Thread aca88 via TVM Discuss
[quote="grwlf, post:28, topic:1721, full:true"] Let me stress the attention on the fact, that MLIR doesn’t only offer different IR, it also offers different approach to scheduling via its Polyhedral dialect. For example, I see affine transformations as types in the standard. [/quote] This is w

[TVM Discuss] [Development] Google lasted work: MLIR Primer

2019-04-09 Thread aca88 via TVM Discuss
[quote="junrushao1994, post:23, topic:1721, full:true"] It’s true. Handcrafting doesn’t scale when # of ASICs increases. [/quote] Hmm I dont think TVM really has a bigger problem of hand-crafting (read my comment to the next quote), also I think every ASIC developer would have to commit to "at

[TVM Discuss] [Development] Google lasted work: MLIR Primer

2019-04-04 Thread aca88 via TVM Discuss
[quote="tqchen, post:2, topic:1721"] MLIR as itself is a meta-way of defining IRs, in the folks’ word “XML for IRs” ... Concrete compiler solutions still need to be built for each layer of the dialect languages, and they can be very different due to the difference in the semantics of the opera