I have begun to experiment with writing a new library called `astgen` to
replace the large quantity of boilerplate required by the AST today, and enable
us to more flexibly evolve the node system, and its APIs.
The first version of this tool will take a Python file like this:
```python
import as
@tqchen, if we use avg_pool2d , we also need to modify it. But the modified
code is not much. For example, we should make the sum UInt8 result be Int16 to
avoid overflow. In our internal implementation, we use q_avg_pool2d to
distinguish avg_pool2d. Relu shouldn’t be modified. However, if we hav
Can we elaborate a bit if avg_pool2d, relu is necessary or if they are more of
a direct mapping to the standard ops? Do we allow mix of standard ops and qnn
ones？
--
You are receiving this because you are subscribed to this thread.
Reply to this email directly or view it on GitHub:
https://gith
@tqchen What are your thoughts?
Seems like we are agreeing on the proposed design abstraction. There is a
concern of not being able to achieve the best schedule performance. We can try
to tackle it with fusion and schedule_tagging.
--
You are receiving this because you are subscribed to this t
@jnorwood Yes, I understand your point. We can use the clip to saturate the
values even if Relu was not fused. It fits in the design and the proposed
abstractions.
--
You are receiving this because you are subscribed to this thread.
Reply to this email directly or view it on GitHub:
https://git
+0.5 to floordiv given the familarity and the usage in isl and MLIR.
--
You are receiving this because you are subscribed to this thread.
Reply to this email directly or view it on GitHub:
https://github.com/dmlc/tvm/issues/3478#issuecomment-508878526
To summarize the discussion so far. I think everyone agrees that we should
introduce one of FloorDiv or EuclideanDiv, and this is a pretty close call (see
the technical summary above).
@derisavi @sgrechanik-h suggested eucildean div for the reason of being
consistent with Halide smt-libs. My un
Thank you for the catch @zhiics. I believe this stresses the importance of
extended unit test coverage for quantization passes. Do you want to go ahead
and issue a PR fix? If VTA quantization is broken, it will be caught when we
build the sphinx gallery.
---
[Visit
Topic](https://discuss
I just want to point out, again, that the output_activation_min and
output_activation_max are required even if there is no specified activation
operation, since they provide saturation to the quantization range ... avoiding
overflow error.
Also, if you fuse activation operations during train
Thanks, @derisavi @sgrechanik-h for putting in your thoughts. Let me try to
summarize the trade-offs dimensions so far.
## Power of simplification
- They are going to be similar because in most cases divisors are positive.
- Floordiv and euclidean div are the same when divisors are positive.
##
@FrozenGene Thanks for the quick feedback on the design.
I understand the performance concern. Let's try to tackle them in fusion.
Fusion already performs compute_inline to bring the computation at right
location. Hopefully, with some tagging and with some arm-twisting, we can
achieve same tens
Looking forward for the updates on this!
---
[Visit
Topic](https://discuss.tvm.ai/t/quantization-broken-due-to-pr-3135/3237/2) to
respond.
You are receiving this because you enabled mailing list mode.
To unsubscribe from these emails, [click
here](https://discuss.tvm.ai/email/unsubscrib
Not sure whether the decision has already been done but I'll put my two cents
here.
You have covered all the tradeoffs. Since in most cases, the divisor is
positive, I believe the important move was to add one of floordiv or
euclideandiv (which you are doing now). The difference between floordi
@anijain2305 Generally Good. About the performance of HW, let us say ARM CPU,
For the depthwise convolution, we even could optimize without tensorize. After
some work of optimization for int8 using pure TVM schedule without tensorize,
we could also beat QNNPACK (some workload we test we even cou
14 matches
Mail list logo
