shiltian wrote:
@alexey-bataev any other comment?
https://github.com/llvm/llvm-project/pull/102717
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https://github.com/llvm/llvm-project/pull/104661
Clang uses a long-time special handling of the case where 3 element vector
loads
and stores are performed as 4 element, and then a shufflevector is used to
extract
the used elements. Odd sized vector codegen
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* **#104661** https://app.graphite.dev/github/pr/llvm/llvm-project/104661?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
width="10px" height="10px"/> π
* `main`
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@@ -761,7 +761,8 @@ void
AMDGPUTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
if (EnableLowerModuleLDS)
PM.addPass(AMDGPULowerModuleLDSPass(*this));
if (EnableAMDGPUAttributor && Level != OptimizationLevel::O0)
- PM.addPass(AM
https://github.com/shiltian approved this pull request.
LGTM with one nit
https://github.com/llvm/llvm-project/pull/105845
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Oops, replied the wrong PR. Sorry.
https://github.com/llvm/llvm-project/pull/105845
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@@ -0,0 +1,12 @@
+// RUN: clang -x hip -O3 -fgpu-rdc %s -mllvm -debug-only=amdgpu-attributor -o
- | FileCheck %s
shiltian wrote:
This should not be a clang test. You can have an opt test.
https://github.com/llvm/llvm-project/pull/105845
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https://github.com/llvm/llvm-project/pull/94576
>From f16b927ab1b582d1b53c24b846618a5bb87a52e1 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 21 Jun 2024 16:58:02 -0400
Subject: [PATCH] [Clang][AMDGPU] Add builtins for instrinsic
`llvm.amdgcn.raw.buff
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shiltian wrote:
ping
https://github.com/llvm/llvm-project/pull/94576
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shiltian wrote:
you have test failure
https://buildkite.com/llvm-project/github-pull-requests/builds/73905#01902d01-7814-41af-b8e6-4d7d258fd4ec
and
https://buildkite.com/llvm-project/github-pull-requests/builds/73905#01902d01-7817-438a-b2cc-554580bfe611.
Need to get it fixed before we merge i
https://github.com/shiltian approved this pull request.
LG and good to know we have format support :-)
https://github.com/llvm/llvm-project/pull/96650
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shiltian wrote:
> > don't you need more code in AST?
>
> Sorry, I don't quite understand the question! Could you elaborate a little
> please?
I was thinking maybe you need changes in AST related files, like
`ASTWriter.cpp`, but that might be not needed as this is adding a new directive.
http
@@ -0,0 +1,31 @@
+// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -ast-print %s | FileCheck %s
+// expected-no-diagnostics
+
+extern int bar(int);
+
+int foo(int arg)
+{
+ #pragma omp assume no_openmp_routines
+ {
+auto fn = [](int x) { return bar(x); };
+// CHECK: auto fn = [
@@ -10343,6 +10343,23 @@ void CGOpenMPRuntime::emitTargetDataStandAloneCall(
MapNamesArray,
InputInfo.MappersArray.emitRawPointer(CGF)};
+// Nowait calls have header declarations that take 13 arguments. Hence, the
shiltian wrote:
You can m
https://github.com/shiltian commented:
Besides, don't you need to update clang tests?
https://github.com/llvm/llvm-project/pull/96386
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@@ -444,32 +444,81 @@ template struct
omptarget_nvptx_LoopSupport {
// KMP interface implementation (dyn loops)
-// TODO: This is a stopgap. We probably want to expand the dispatch API to take
@@ -444,32 +444,81 @@ template struct
omptarget_nvptx_LoopSupport {
// KMP interface implementation (dyn loops)
-// TODO: This is a stopgap. We probably want to expand the dispatch API to take
@@ -34,6 +34,7 @@ inititializeRuntime(bool IsSPMD, KernelEnvironmentTy
&KernelEnvironment,
mapping::init(IsSPMD);
state::init(IsSPMD, KernelEnvironment, KernelLaunchEnvironment);
allocator::init(IsSPMD, KernelEnvironment);
+ __init_thread_dst();
shiltia
@@ -359,6 +359,10 @@ int32_t __kmpc_cancel(IdentTy *Loc, int32_t TId, int32_t
CancelVal);
///{
int32_t __kmpc_shuffle_int32(int32_t val, int16_t delta, int16_t size);
int64_t __kmpc_shuffle_int64(int64_t val, int16_t delta, int16_t size);
+
+/// Manage dynamic schedule data st
@@ -444,32 +444,81 @@ template struct
omptarget_nvptx_LoopSupport {
// KMP interface implementation (dyn loops)
-// TODO: This is a stopgap. We probably want to expand the dispatch API to take
@@ -444,32 +444,81 @@ template struct
omptarget_nvptx_LoopSupport {
// KMP interface implementation (dyn loops)
-// TODO: This is a stopgap. We probably want to expand the dispatch API to take
@@ -444,32 +444,81 @@ template struct
omptarget_nvptx_LoopSupport {
// KMP interface implementation (dyn loops)
-// TODO: This is a stopgap. We probably want to expand the dispatch API to take
@@ -444,32 +444,81 @@ template struct
omptarget_nvptx_LoopSupport {
// KMP interface implementation (dyn loops)
-// TODO: This is a stopgap. We probably want to expand the dispatch API to take
https://github.com/shiltian commented:
The code changes look good now, but I'd prefer to have a non-SPMD mode test
case.
https://github.com/llvm/llvm-project/pull/97065
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None
>From 56b15c3dc7d0b6967047c6cc79ef2145a93f8dfc Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 15 Sep 2024 21:53:50 -0400
Subject: [PATCH] [IR] Introduce `T` to `DataLayout` to
represent flat addre
shiltian wrote:
* **#108786** https://app.graphite.dev/github/pr/llvm/llvm-project/108786?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
width="10px" height="10px"/> π
* `main`
This stack of pull requests is managed by Grap
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@@ -579,7 +579,7 @@ static StringRef computeDataLayout(const Triple &TT) {
"-p7:160:256:256:32-p8:128:128-p9:192:256:256:32-i64:64-v16:16-v24:32-"
"v32:32-v48:64-v96:"
"128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-"
- "G
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@@ -66,12 +66,12 @@ NVPTXTargetInfo::NVPTXTargetInfo(const llvm::Triple &Triple,
HasFloat16 = true;
if (TargetPointerWidth == 32)
-resetDataLayout("e-p:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64");
+resetDataLayout("e-p:32:32-i64:64-i128:128-v16:16-v32:32-n16:32
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/108786
>From 0518fe9d148b371a1a148032f3738fb2fe4fd927 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 15 Sep 2024 21:53:50 -0400
Subject: [PATCH] [IR] Introduce `T` to `DataLayout` to
represent flat address spa
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/108713
>From 0518fe9d148b371a1a148032f3738fb2fe4fd927 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 15 Sep 2024 21:53:50 -0400
Subject: [PATCH 1/3] [IR] Introduce `T` to `DataLayout` to
represent flat address
@@ -245,6 +246,7 @@ class DataLayout {
unsigned getDefaultGlobalsAddressSpace() const {
return DefaultGlobalsAddrSpace;
}
+ unsigned getFlatAddressSpace() const { return FlatAddressSpace; }
shiltian wrote:
It is optional from a target's perspective, b
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shiltian wrote:
I updated the PR description. Hopefully it can make the motivation of this
patch more clear. I think the central question is, why it can't be just address
space 0. I don't have a clear answer to that. @arsenm first introduced this
concept to LLVM at least 8 years ago. I agree t
@@ -245,6 +246,7 @@ class DataLayout {
unsigned getDefaultGlobalsAddressSpace() const {
return DefaultGlobalsAddrSpace;
}
+ unsigned getFlatAddressSpace() const { return FlatAddressSpace; }
shiltian wrote:
@arsenm made a point in
https://github.com/l
shiltian wrote:
> Just to clarify, does this mean any two non-flat address space pointers
> _cannot_ alias?
If I read it correctly, it is equivalent to ask, whether an AS X pointer can
alias an AS Y pointer, assuming neither X nor Y is the flat address space. I
think that is orthogonal to thi
https://github.com/shiltian commented:
Not sure if you still want to keep it for backward compatibility.
https://github.com/llvm/llvm-project/pull/111579
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shiltian wrote:
I think the default AS is expected to be losslessly converted to other AS but
not the other way around, though I understand it is not clearly stated in
LangRef or other places and a lot of code just assumes it can.
https://github.com/llvm/llvm-project/pull/112248
__
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https://github.com/llvm/llvm-project/pull/108786
>From c2be824d5935b57a87a7ccf618ee4eecf55b4e3a Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 17 Sep 2024 21:47:45 -0400
Subject: [PATCH] [IR] Introduce `T` to `DataLayout` to
represent flat address spa
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https://github.com/llvm/llvm-project/pull/102462
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https://github.com/shiltian commented:
It looks reasonable to me.
https://github.com/llvm/llvm-project/pull/111890
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shiltian wrote:
> The LangRef doesn't need to know why it's undesirable. It's like the n field
`n` field? The following?
```
n::...
This specifies a set of native integer widths for the target CPU in bits. For
example, it might contain n32 for 32-bit PowerPC, n32:64 for PowerPC 64, or
n8:16:3
@@ -1,21 +1,17 @@
-// REQUIRES: x86-registered-target
-// REQUIRES: amdgpu-registered-target
-// REQUIRES: system-linux
shiltian wrote:
I'm not sure if the removal of `system-linux` would cause issue.
https://github.com/llvm/llvm-project/pull/111975
https://github.com/shiltian approved this pull request.
Can't believe this many Lol
https://github.com/llvm/llvm-project/pull/112899
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shiltian wrote:
> > > Just a heads up, this change is gonna break some OpenMP tests,
> > > specifically those prefix with `ompx`.
> >
> >
> > Just to clarify, adding the deprecation warning will break them, or the
> > eventual, as-of-yet not-scheduled, removal, will?
>
> On my system, the de
@@ -46,7 +46,7 @@ set(all_amdgpu_architectures
"gfx700;gfx701;gfx801;gfx803;gfx900;gfx902;gfx906"
"gfx908;gfx90a;gfx90c;gfx940;gfx941;gfx942;gfx1010"
"gfx1030;gfx1031;gfx1032;gfx1033;gfx1034;gfx1035"
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/113138
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https://github.com/shiltian commented:
Just a heads up, this change is gonna break some OpenMP tests, specifically
those prefix with `ompx`.
https://github.com/llvm/llvm-project/pull/112849
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@@ -439,6 +439,26 @@ struct AAAMDAttributesFunction : public AAAMDAttributes {
indicatePessimisticFixpoint();
return;
}
+
+SmallPtrSet VisitedConsts;
+
+for (Instruction &I : instructions(F)) {
shiltian wrote:
I don't think it is genera
@@ -439,6 +451,36 @@ struct AAAMDAttributesFunction : public AAAMDAttributes {
indicatePessimisticFixpoint();
return;
}
+
+{ // FLAT_SCRATCH_INIT
shiltian wrote:
This is misuse of `initialize`. This code should go to `updateImpl` of the
co
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/114547
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@@ -744,7 +744,10 @@ void
AMDGPUTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
#include "llvm/Passes/TargetPassRegistry.inc"
PB.registerPipelineStartEPCallback(
- [](ModulePassManager &PM, OptimizationLevel Level) {
+ [this](ModulePassManager &PM,
shiltian wrote:
I'll need to double check my recent PRs (that have not been merged) because I
used this word a lot. Lol.
https://github.com/llvm/llvm-project/pull/114795
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@@ -36,6 +36,8 @@ int main(int argc, char **argv) {
#pragma omp depobj(b) update(mutexinoutset)
#pragma omp depobj(a) depend(iterator(char *p = argv[argc]:argv[0]:-1), out:
p[0])
(void)tmain(a), tmain(b);
+ omp_depend_t obj;
shiltian wrote:
Auto-gen check
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https://github.com/llvm/llvm-project/pull/114577
>From 76d44f744fc9b859e4ffe151c8c71d0e16d8eb39 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 1 Nov 2024 12:39:52 -0400
Subject: [PATCH] [PassBuilder] Add `ThinOrFullLTOPhase` to optimizer pipeline
---
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https://github.com/llvm/llvm-project/pull/114547
>From 3da52a072583f835b69694b9649ccc66986cd346 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 1 Nov 2024 10:51:20 -0400
Subject: [PATCH] [PassBuilder] Add `LTOPreLink` to early simplication EP call
back
@@ -0,0 +1,154 @@
+//===-- amdgpuintrin.h - AMDPGU intrinsic functions
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
shiltian wrote:
* **#114547** https://app.graphite.dev/github/pr/llvm/llvm-project/114547?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
width="10px" height="10px"/> π
* `main`
This stack of pull requests is managed by Grap
@@ -478,7 +478,8 @@ class PassBuilder {
/// This extension point allows adding optimization right after passes that
do
/// basic simplification of the input IR.
void registerPipelineEarlySimplificationEPCallback(
- const std::function &C) {
+ const std::functio
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https://github.com/llvm/llvm-project/pull/114547
>From c271a3252ad3bbcf7c251c68244be2be55a9d387 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 1 Nov 2024 12:22:06 -0400
Subject: [PATCH 1/2] [PassBuilder] Replace `bool LTOPreLink` with
`ThinOrFullLTOPh
https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/114547
The early simplication pipeline is used in non-LTO and (Thin/Full)LTO pre-link
stage. There are some passes that we want them in non-LTO mode, but not at LTO
pre-link stage. The control is missing currently. Thi
@@ -683,6 +698,65 @@ struct AAAMDAttributesFunction : public AAAMDAttributes {
return !A.checkForAllCallLikeInstructions(DoesNotRetrieve, *this,
UsedAssumedInformation);
}
+
+ // Returns true if FlatScratchInit is needed, i.e
@@ -683,6 +698,65 @@ struct AAAMDAttributesFunction : public AAAMDAttributes {
return !A.checkForAllCallLikeInstructions(DoesNotRetrieve, *this,
UsedAssumedInformation);
}
+
+ // Returns true if FlatScratchInit is needed, i.e
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/114547
>From 56d807b8e73fca6f507056d2670dc4f4682bc921 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 1 Nov 2024 10:51:20 -0400
Subject: [PATCH] [PassBuilder] Add `LTOPreLink` to early simplication EP call
back
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https://github.com/llvm/llvm-project/pull/108786
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shiltian wrote:
It seems like we canβt reach consensus on how to move forward with this. I
already worked my issue around so I guess we no longer need this PR.
https://github.com/llvm/llvm-project/pull/108786
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@@ -64,8 +64,13 @@ template __DEVICE__ _Tp norm(const
std::complex<_Tp> &__c) {
}
// conj
-
-template std::complex<_Tp> conj(const std::complex<_Tp> &__c) {
+#ifdef _GLIBCXX20_CONSTEXPR
+#define CXX20_CONSTEXPR_DEVICE __DEVICE__
shiltian wrote:
I wonder wh
https://github.com/shiltian commented:
LGTM. @alexey-bataev What do you think?
https://github.com/llvm/llvm-project/pull/114221
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@@ -0,0 +1,179 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
+// RUN: %clang_cc1 %s -emit-llvm -o - -triple=amdgcn-amd-amdhsa -ffreestanding
\
+// RUN: -fvisibility=hidden | FileCheck --check-prefix=AMDGCN %s
+//: %clan
@@ -0,0 +1,179 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
+// RUN: %clang_cc1 %s -emit-llvm -o - -triple=amdgcn-amd-amdhsa -ffreestanding
\
+// RUN: -fvisibility=hidden | FileCheck --check-prefix=AMDGCN %s
+//: %clan
@@ -121,6 +121,7 @@ static const OffloadArchToStringMap arch_names[] = {
GFX(909), // gfx909
GFX(90a), // gfx90a
GFX(90c), // gfx90c
+{OffloadArch::GFX9_4_GENERIC, "gfx9-4-generic", "compute_amdgcn"},
shiltian wrote:
In fact, `gfx10-1-generi
shiltian wrote:
### Merge activity
* **Nov 12, 11:06 PM EST**: A user started a stack merge that includes this
pull request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/115190).
https://github.com/llvm/llvm-project/pull/115190
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/115190
>From 15a01715c36063e35cf01043e51da26c60b00246 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 6 Nov 2024 12:49:45 -0500
Subject: [PATCH] [AMDGPU] Introduce a new generic target `gfx9-4-generic`
---
cla
https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/115190
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https://github.com/shiltian commented:
Hmm, I thought this is already the default one if nothing is specified
https://github.com/llvm/llvm-project/pull/116077
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https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/116077
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https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/116077
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shiltian wrote:
gentle ping
https://github.com/llvm/llvm-project/pull/115190
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/115190
>From 43ef3b94c4a716134b4f3cdeb1405277cd06f6ea Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 6 Nov 2024 12:49:45 -0500
Subject: [PATCH] [AMDGPU] Introduce a new generic target `gfx9-4-generic`
---
cla
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